Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 3 | config ROCKCHIP_RK3036 |
| 4 | bool "Support Rockchip RK3036" |
| 5 | select CPU_V7 |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 6 | select SUPPORT_SPL |
| 7 | select SPL |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 8 | help |
| 9 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 10 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 11 | and video codec support. Peripherals include Gigabit Ethernet, |
| 12 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 13 | |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 14 | config ROCKCHIP_RK3188 |
| 15 | bool "Support Rockchip RK3188" |
| 16 | select CPU_V7 |
Ley Foon Tan | 48fcc4a | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 17 | select SPL_BOARD_INIT if SPL |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 18 | select SUPPORT_SPL |
| 19 | select SUPPORT_TPL |
| 20 | select SPL |
| 21 | select TPL |
Heiko Stübner | 015f69a | 2017-04-06 00:19:36 +0200 | [diff] [blame] | 22 | select BOARD_LATE_INIT |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 23 | select ROCKCHIP_BROM_HELPER |
| 24 | help |
| 25 | The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 |
| 26 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two |
| 27 | video interfaces, several memory options and video codec support. |
| 28 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, |
| 29 | UART, SPI, I2C and PWMs. |
| 30 | |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 31 | config ROCKCHIP_RK322X |
| 32 | bool "Support Rockchip RK3228/RK3229" |
| 33 | select CPU_V7 |
| 34 | select SUPPORT_SPL |
| 35 | select SPL |
| 36 | select ROCKCHIP_BROM_HELPER |
| 37 | select DEBUG_UART_BOARD_INIT |
| 38 | help |
| 39 | The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 |
| 40 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 41 | and video codec support. Peripherals include Gigabit Ethernet, |
| 42 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 43 | |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 44 | config ROCKCHIP_RK3288 |
| 45 | bool "Support Rockchip RK3288" |
Andreas Färber | 6c42703 | 2016-07-14 05:09:26 +0200 | [diff] [blame] | 46 | select CPU_V7 |
Ley Foon Tan | 48fcc4a | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 47 | select SPL_BOARD_INIT if SPL |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 48 | select SUPPORT_SPL |
| 49 | select SPL |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 50 | help |
| 51 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 52 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 53 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 54 | and video codec support. Peripherals include Gigabit Ethernet, |
Andreas Färber | 531e8e0 | 2016-11-02 18:03:01 +0100 | [diff] [blame] | 55 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 56 | |
Kever Yang | ec02b3c | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 57 | config ROCKCHIP_RK3328 |
| 58 | bool "Support Rockchip RK3328" |
| 59 | select ARM64 |
| 60 | help |
| 61 | The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. |
| 62 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 63 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 64 | and video codec support. Peripherals include Gigabit Ethernet, |
| 65 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 66 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 67 | config ROCKCHIP_RK3368 |
| 68 | bool "Support Rockchip RK3368" |
| 69 | select ARM64 |
Philipp Tomsich | 84af43e | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 70 | select SUPPORT_SPL |
| 71 | select SUPPORT_TPL |
Philipp Tomsich | 01b219e | 2017-07-28 20:03:07 +0200 | [diff] [blame^] | 72 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 73 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Philipp Tomsich | 84af43e | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 74 | imply SPL_SEPARATE_BSS |
| 75 | imply SPL_SERIAL_SUPPORT |
| 76 | imply TPL_SERIAL_SUPPORT |
| 77 | select ENABLE_ARM_SOC_BOOT0_HOOK |
| 78 | select DEBUG_UART_BOARD_INIT |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 79 | select SYS_NS16550 |
| 80 | help |
Philipp Tomsich | 9f3deaf | 2017-06-10 00:47:53 +0200 | [diff] [blame] | 81 | The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised |
| 82 | into a big and little cluster with 4 cores each) Cortex-A53 including |
| 83 | AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache |
| 84 | (for the little cluster), PowerVR G6110 based graphics, one video |
| 85 | output processor supporting LVDS/HDMI/eDP, several DDR3 options and |
| 86 | video codec support. |
| 87 | |
| 88 | On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, |
| 89 | I2S, UARTs, SPI, I2C and PWMs. |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 90 | |
Philipp Tomsich | cbacb40 | 2017-08-02 21:26:18 +0200 | [diff] [blame] | 91 | if ROCKCHIP_RK3368 |
| 92 | |
| 93 | config TPL_LDSCRIPT |
| 94 | default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" |
| 95 | |
| 96 | endif |
| 97 | |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 98 | config ROCKCHIP_RK3399 |
| 99 | bool "Support Rockchip RK3399" |
| 100 | select ARM64 |
Kever Yang | 16efdfd | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 101 | select SUPPORT_SPL |
| 102 | select SPL |
| 103 | select SPL_SEPARATE_BSS |
Philipp Tomsich | d17d8cf | 2017-07-26 12:29:01 +0200 | [diff] [blame] | 104 | select SPL_SERIAL_SUPPORT |
| 105 | select SPL_DRIVERS_MISC_SUPPORT |
Philipp Tomsich | c244871 | 2017-03-15 12:08:44 +0100 | [diff] [blame] | 106 | select ENABLE_ARM_SOC_BOOT0_HOOK |
Philipp Tomsich | 41029e6 | 2017-04-01 12:59:25 +0200 | [diff] [blame] | 107 | select DEBUG_UART_BOARD_INIT |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 108 | help |
| 109 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 |
| 110 | and quad-core Cortex-A53. |
| 111 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 112 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 113 | and video codec support. Peripherals include Gigabit Ethernet, |
| 114 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 115 | |
Andy Yan | 2d982da | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 116 | config ROCKCHIP_RV1108 |
| 117 | bool "Support Rockchip RV1108" |
| 118 | select CPU_V7 |
| 119 | help |
| 120 | The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 |
| 121 | and a DSP. |
| 122 | |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 123 | config SPL_ROCKCHIP_BACK_TO_BROM |
Xu Ziyuan | 5401eb8 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 124 | bool "SPL returns to bootrom" |
| 125 | default y if ROCKCHIP_RK3036 |
Heiko Stübner | 355a880 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 126 | select ROCKCHIP_BROM_HELPER |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 127 | depends on SPL |
Xu Ziyuan | 5401eb8 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 128 | help |
| 129 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 130 | SPL will return to the boot rom, which will then load the U-Boot |
| 131 | binary to keep going on. |
| 132 | |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 133 | config TPL_ROCKCHIP_BACK_TO_BROM |
| 134 | bool "TPL returns to bootrom" |
| 135 | default y if ROCKCHIP_RK3368 |
| 136 | select ROCKCHIP_BROM_HELPER |
| 137 | depends on TPL |
| 138 | help |
| 139 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 140 | SPL will return to the boot rom, which will then load the U-Boot |
| 141 | binary to keep going on. |
| 142 | |
Kever Yang | e484f77 | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 143 | config ROCKCHIP_SPL_RESERVE_IRAM |
| 144 | hex "Size of IRAM reserved in SPL" |
| 145 | default 0x4000 |
| 146 | help |
| 147 | SPL may need reserve memory for firmware loaded by SPL, whose load |
| 148 | address is in IRAM and may overlay with SPL text area if not |
| 149 | reserved. |
| 150 | |
Heiko Stübner | 355a880 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 151 | config ROCKCHIP_BROM_HELPER |
| 152 | bool |
| 153 | |
Sandy Patterson | d70f0f3 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 154 | config SPL_MMC_SUPPORT |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 155 | default y if !SPL_ROCKCHIP_BACK_TO_BROM |
Sandy Patterson | d70f0f3 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 156 | |
huang lin | 1115b64 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 157 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 158 | source "arch/arm/mach-rockchip/rk3188/Kconfig" |
Kever Yang | a4f460d | 2017-06-23 17:17:54 +0800 | [diff] [blame] | 159 | source "arch/arm/mach-rockchip/rk322x/Kconfig" |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 160 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
Kever Yang | ec02b3c | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 161 | source "arch/arm/mach-rockchip/rk3328/Kconfig" |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 162 | source "arch/arm/mach-rockchip/rk3368/Kconfig" |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 163 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
Andy Yan | 2d982da | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 164 | source "arch/arm/mach-rockchip/rv1108/Kconfig" |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 165 | endif |