blob: 13eb6ecee101ad200a1ff0deb2eb27b780fbaeff [file] [log] [blame]
Angelo Dureghello9ffe1eb2019-03-13 21:46:53 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019
4 * Angelo Dureghello <angleo@sysam.it>
5 *
6 * CPU specific dspi routines
7 */
8
Angelo Dureghello9ffe1eb2019-03-13 21:46:53 +01009#include <asm/immap.h>
10#include <asm/io.h>
11
12#ifdef CONFIG_CF_DSPI
13void dspi_chip_select(int cs)
14{
15 struct gpio *gpio = (struct gpio *)MMAP_GPIO;
16
Angelo Dureghello9ffe1eb2019-03-13 21:46:53 +010017#ifdef CONFIG_MCF5441x
18 switch (cs) {
19 case 0:
20 clrbits_8(&gpio->par_dspi0,
21 ~GPIO_PAR_DSPI0_PCS0_MASK);
22 setbits_8(&gpio->par_dspi0,
23 GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
24 break;
25 case 1:
26 clrbits_8(&gpio->par_dspiow,
27 GPIO_PAR_DSPIOW_DSPI0PSC1);
28 setbits_8(&gpio->par_dspiow,
29 GPIO_PAR_DSPIOW_DSPI0PSC1);
30 break;
31 }
32#endif
33}
34
35void dspi_chip_unselect(int cs)
36{
37 struct gpio *gpio = (struct gpio *)MMAP_GPIO;
38
Angelo Dureghello9ffe1eb2019-03-13 21:46:53 +010039#ifdef CONFIG_MCF5441x
40 if (cs == 1)
41 clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
42#endif
43}
44#endif /* CONFIG_CF_DSPI */