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git01.mediatek.com / filogic / uboot / 7b38e310e77598bfe9f951293b904e286944c9e0 / . / include / ethsw.h
blob: 04e002d39f510ef673c5ac784ddacf1f0aa46114 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]2/*
3 * Copyright 2015 Freescale Semiconductor, Inc.
4 *
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]5 * Ethernet Switch commands
6 */
7
8#ifndef _CMD_ETHSW_H_
9#define _CMD_ETHSW_H_
10
11#define ETHSW_MAX_CMD_PARAMS 20
12#define ETHSW_CMD_PORT_ALL -1
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]13#define ETHSW_CMD_VLAN_ALL -1
Codrin Ciubotariud73a9492015-12-15 15:21:06 +0200[diff] [blame]14#define ETHSW_CMD_AGGR_GRP_NONE -1
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]15
16/* IDs used to track keywords in a command */
17enum ethsw_keyword_id {
18 ethsw_id_key_end = -1,
19 ethsw_id_help,
20 ethsw_id_show,
21 ethsw_id_port,
22 ethsw_id_enable,
23 ethsw_id_disable,
Codrin Ciubotariuc0034732015-07-24 16:55:29 +0300[diff] [blame]24 ethsw_id_statistics,
25 ethsw_id_clear,
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +0300[diff] [blame]26 ethsw_id_learning,
27 ethsw_id_auto,
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]28 ethsw_id_vlan,
29 ethsw_id_fdb,
30 ethsw_id_add,
31 ethsw_id_del,
32 ethsw_id_flush,
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300[diff] [blame]33 ethsw_id_pvid,
34 ethsw_id_untagged,
35 ethsw_id_all,
36 ethsw_id_none,
37 ethsw_id_egress,
38 ethsw_id_tag,
39 ethsw_id_classified,
Codrin Ciubotariu3a74bbe2015-07-24 16:55:34 +0300[diff] [blame]40 ethsw_id_shared,
41 ethsw_id_private,
Codrin Ciubotariud1c9fe52015-07-24 16:55:35 +0300[diff] [blame]42 ethsw_id_ingress,
43 ethsw_id_filtering,
Codrin Ciubotariud73a9492015-12-15 15:21:06 +0200[diff] [blame]44 ethsw_id_aggr,
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]45 ethsw_id_count, /* keep last */
46};
47
48enum ethsw_keyword_opt_id {
49 ethsw_id_port_no = ethsw_id_count + 1,
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]50 ethsw_id_vlan_no,
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300[diff] [blame]51 ethsw_id_pvid_no,
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]52 ethsw_id_add_del_no,
53 ethsw_id_add_del_mac,
Codrin Ciubotariud73a9492015-12-15 15:21:06 +0200[diff] [blame]54 ethsw_id_aggr_no,
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]55 ethsw_id_count_all, /* keep last */
56};
57
58struct ethsw_command_def {
59 int cmd_to_keywords[ETHSW_MAX_CMD_PARAMS];
60 int cmd_keywords_nr;
61 int port;
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]62 int vid;
Codrin Ciubotariud73a9492015-12-15 15:21:06 +0200[diff] [blame]63 int aggr_grp;
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]64 uchar ethaddr[6];
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]65 int (*cmd_function)(struct ethsw_command_def *parsed_cmd);
66};
67
68/* Structure to be created and initialized by an Ethernet Switch driver */
69struct ethsw_command_func {
70 const char *ethsw_name;
71 int (*port_enable)(struct ethsw_command_def *parsed_cmd);
72 int (*port_disable)(struct ethsw_command_def *parsed_cmd);
73 int (*port_show)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariuc0034732015-07-24 16:55:29 +0300[diff] [blame]74 int (*port_stats)(struct ethsw_command_def *parsed_cmd);
75 int (*port_stats_clear)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +0300[diff] [blame]76 int (*port_learn)(struct ethsw_command_def *parsed_cmd);
77 int (*port_learn_show)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300[diff] [blame]78 int (*fdb_show)(struct ethsw_command_def *parsed_cmd);
79 int (*fdb_flush)(struct ethsw_command_def *parsed_cmd);
80 int (*fdb_entry_add)(struct ethsw_command_def *parsed_cmd);
81 int (*fdb_entry_del)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300[diff] [blame]82 int (*pvid_show)(struct ethsw_command_def *parsed_cmd);
83 int (*pvid_set)(struct ethsw_command_def *parsed_cmd);
84 int (*vlan_show)(struct ethsw_command_def *parsed_cmd);
85 int (*vlan_set)(struct ethsw_command_def *parsed_cmd);
86 int (*port_untag_show)(struct ethsw_command_def *parsed_cmd);
87 int (*port_untag_set)(struct ethsw_command_def *parsed_cmd);
88 int (*port_egr_vlan_show)(struct ethsw_command_def *parsed_cmd);
89 int (*port_egr_vlan_set)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariu3a74bbe2015-07-24 16:55:34 +0300[diff] [blame]90 int (*vlan_learn_show)(struct ethsw_command_def *parsed_cmd);
91 int (*vlan_learn_set)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariud1c9fe52015-07-24 16:55:35 +0300[diff] [blame]92 int (*port_ingr_filt_show)(struct ethsw_command_def *parsed_cmd);
93 int (*port_ingr_filt_set)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariud73a9492015-12-15 15:21:06 +0200[diff] [blame]94 int (*port_aggr_show)(struct ethsw_command_def *parsed_cmd);
95 int (*port_aggr_set)(struct ethsw_command_def *parsed_cmd);
Codrin Ciubotariubfafe5c2015-07-24 16:55:27 +0300[diff] [blame]96};
97
98int ethsw_define_functions(const struct ethsw_command_func *cmd_func);
99
100#endif /* _CMD_ETHSW_H_ */