Wolfgang Grandegger | 7789aab2 | 2019-05-12 19:25:18 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2015 Marek Vasut <marex@denx.de> |
| 4 | */ |
| 5 | #ifndef __CONFIG_ARIES_MCVEVK_H__ |
| 6 | #define __CONFIG_ARIES_MCVEVK_H__ |
| 7 | |
| 8 | #include <asm/arch/base_addr_ac5.h> |
| 9 | |
| 10 | /* Memory configurations */ |
| 11 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */ |
| 12 | |
Wolfgang Grandegger | 7789aab2 | 2019-05-12 19:25:18 +0200 | [diff] [blame] | 13 | /* Environment is in MMC */ |
Wolfgang Grandegger | 7789aab2 | 2019-05-12 19:25:18 +0200 | [diff] [blame] | 14 | |
| 15 | /* Extra Environment */ |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 16 | #define CFG_EXTRA_ENV_SETTINGS \ |
Wolfgang Grandegger | 7789aab2 | 2019-05-12 19:25:18 +0200 | [diff] [blame] | 17 | "consdev=ttyS0\0" \ |
| 18 | "baudrate=115200\0" \ |
| 19 | "bootscript=boot.scr\0" \ |
| 20 | "setuuid=part uuid mmc 0:3 uuid\0" \ |
| 21 | "netdev=eth0\0" \ |
| 22 | "hostname=mcvevk\0" \ |
| 23 | "kernel_addr_r=0x10000000\0" \ |
| 24 | "socfpga_legacy_reset_compat=1\0" \ |
| 25 | "bootm_size=0xa000000\0" \ |
| 26 | "dfu_alt_info=mmc raw 0 3867148288\0" \ |
| 27 | "update_filename=u-boot-with-spl.sfp\0" \ |
| 28 | "update_sd_offset=0x800\0" \ |
| 29 | "update_sd=" /* Update the SD firmware partition */ \ |
| 30 | "if mmc rescan ; then " \ |
| 31 | "if tftp ${update_filename} ; then " \ |
| 32 | "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ |
| 33 | "setexpr fw_sz ${fw_sz} + 1 ; " \ |
| 34 | "mmc write ${loadaddr} ${update_sd_offset} ${fw_sz} ; " \ |
| 35 | "fi ; " \ |
| 36 | "fi\0" \ |
| 37 | "update_qspi_offset=0x0\0" \ |
| 38 | "update_qspi=" /* Update the QSPI firmware */ \ |
| 39 | "if sf probe ; then " \ |
| 40 | "if tftp ${update_filename} ; then " \ |
| 41 | "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \ |
| 42 | "fi ; " \ |
| 43 | "fi\0" \ |
| 44 | "fpga_filename=output_file.rbf\0" \ |
| 45 | "load_fpga=" /* Load FPGA bitstream */ \ |
| 46 | "if tftp ${fpga_filename} ; then " \ |
| 47 | "fpga load 0 $loadaddr $filesize ; " \ |
| 48 | "bridge enable ; " \ |
| 49 | "fi\0" \ |
| 50 | "addcons=" \ |
| 51 | "setenv bootargs ${bootargs} " \ |
| 52 | "console=${consdev},${baudrate}\0" \ |
| 53 | "addip=" \ |
| 54 | "setenv bootargs ${bootargs} " \ |
| 55 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ |
| 56 | "${netmask}:${hostname}:${netdev}:off\0" \ |
| 57 | "addmisc=" \ |
| 58 | "setenv bootargs ${bootargs} ${miscargs}\0" \ |
| 59 | "addargs=run addcons addmisc\0" \ |
| 60 | "mmcload=" \ |
| 61 | "mmc rescan ; " \ |
| 62 | "load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \ |
| 63 | "netload=" \ |
| 64 | "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \ |
| 65 | "miscargs=nohlt panic=1\0" \ |
| 66 | "mmcargs=setenv bootargs root=PARTUUID=${uuid} rw rootwait\0" \ |
| 67 | "nfsargs=" \ |
| 68 | "setenv bootargs root=/dev/nfs rw " \ |
| 69 | "nfsroot=${serverip}:${rootpath},v3,tcp\0" \ |
| 70 | "mmc_mmc=" \ |
| 71 | "run mmcload setuuid mmcargs addargs ; " \ |
| 72 | "bootm ${kernel_addr_r}\0" \ |
| 73 | "mmc_nfs=" \ |
| 74 | "run mmcload nfsargs addip addargs ; " \ |
| 75 | "bootm ${kernel_addr_r}\0" \ |
| 76 | "net_mmc=" \ |
| 77 | "run netload setuuid mmcargs addargs ; " \ |
| 78 | "bootm ${kernel_addr_r}\0" \ |
| 79 | "net_nfs=" \ |
| 80 | "run netload nfsargs addip addargs ; " \ |
| 81 | "bootm ${kernel_addr_r}\0" \ |
| 82 | "try_bootscript=" \ |
| 83 | "mmc rescan;" \ |
| 84 | "if test -e mmc 0:2 ${bootscript} ; then " \ |
| 85 | "if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \ |
| 86 | "then ; " \ |
| 87 | "echo Running bootscript... ; " \ |
| 88 | "source ${kernel_addr_r} ; " \ |
| 89 | "fi ; " \ |
| 90 | "fi\0" |
| 91 | |
| 92 | /* The rest of the configuration is shared */ |
| 93 | #include <configs/socfpga_common.h> |
| 94 | |
| 95 | #endif /* __CONFIG_ARIES_MCVEVK_H__ */ |