Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 7b38e310e77598bfe9f951293b904e286944c9e0 / . / configs / socfpga_agilex_defconfig
blob: eaa2161a2f7759c73ee79789e5877564b9c210df [file] [log] [blame]
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=400000000
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]3CONFIG_ARCH_SOCFPGA=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]4CONFIG_TEXT_BASE=0x1000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_SYS_MALLOC_LEN=0x500000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=2
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]9CONFIG_SF_DEFAULT_MODE=0x2003
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]10CONFIG_ENV_SIZE=0x1000
11CONFIG_ENV_OFFSET=0x200
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]12CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]14CONFIG_DM_RESET=y
15CONFIG_SPL_STACK=0xffe3f000
Tom Rini27280b62024-11-12 13:45:12 -0600[diff] [blame]16CONFIG_SPL_TEXT_BASE=0xFFE00000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]17CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
18CONFIG_SPL_BSS_START_ADDR=0x3ff00000
19CONFIG_SPL_BSS_MAX_SIZE=0x100000
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]20CONFIG_SYS_BOOTM_LEN=0x2000000
21CONFIG_SYS_LOAD_ADDR=0x02000000
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]22CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
23CONFIG_IDENT_STRING="socfpga_agilex"
24CONFIG_SPL_FS_FAT=y
Chee Hong Ang02bb64f2020-08-14 11:07:23 +0800[diff] [blame]25# CONFIG_PSCI_RESET is not set
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]26CONFIG_SYS_MEMTEST_START=0x00000000
27CONFIG_SYS_MEMTEST_END=0x3fe00000
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]28CONFIG_REMAKE_ELF=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]29CONFIG_BOOTDELAY=5
Tom Rini97faf612020-06-16 19:06:12 -0400[diff] [blame]30CONFIG_USE_BOOTARGS=y
31CONFIG_BOOTARGS="earlycon"
Siew Chin Lim14b8a482021-03-01 20:04:14 +0800[diff] [blame]32CONFIG_USE_BOOTCOMMAND=y
33CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]34CONFIG_SYS_PBSIZE=2082
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]35CONFIG_SPL_MAX_SIZE=0x40000
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]36# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]37CONFIG_SPL_SYS_MALLOC=y
38CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
39CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000
40CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]41CONFIG_SPL_CACHE=y
42CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]43CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
Tom Rini06d06f72022-05-27 17:13:52 -0400[diff] [blame]44CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]45CONFIG_HUSH_PARSER=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]46CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]47CONFIG_CMD_MEMTEST=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]48CONFIG_CMD_GPIO=y
49CONFIG_CMD_I2C=y
50CONFIG_CMD_MMC=y
51CONFIG_CMD_SPI=y
52CONFIG_CMD_USB=y
53CONFIG_CMD_DHCP=y
54CONFIG_CMD_MII=y
55CONFIG_CMD_PING=y
56CONFIG_CMD_CACHE=y
57CONFIG_CMD_EXT4=y
58CONFIG_CMD_FAT=y
59CONFIG_CMD_FS_GENERIC=y
Tom Riniddb1ec12024-01-10 13:46:10 -0500[diff] [blame]60# CONFIG_CMD_MTDPARTS is not set
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]61CONFIG_ENV_IS_IN_MMC=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]62CONFIG_USE_BOOTFILE=y
63CONFIG_BOOTFILE="Image"
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]64CONFIG_NET_RANDOM_ETHADDR=y
65CONFIG_SPL_DM_SEQ_ALIAS=y
66CONFIG_SPL_ALTERA_SDRAM=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]67CONFIG_DWAPB_GPIO=y
68CONFIG_DM_I2C=y
69CONFIG_SYS_I2C_DW=y
Tom Rini91735482022-10-28 20:27:05 -0400[diff] [blame]70CONFIG_SYS_MMC_MAX_BLK_COUNT=256
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]71CONFIG_MMC_DW=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]72CONFIG_SPI_FLASH_SPANSION=y
73CONFIG_SPI_FLASH_STMICRO=y
74CONFIG_PHY_MICREL=y
75CONFIG_PHY_MICREL_KSZ90X1=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]76CONFIG_ETH_DESIGNWARE=y
77CONFIG_MII=y
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]78CONFIG_SYS_NS16550_MEM32=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]79CONFIG_SPI=y
80CONFIG_CADENCE_QSPI=y
81CONFIG_DESIGNWARE_SPI=y
82CONFIG_USB=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]83CONFIG_USB_DWC2=y
84CONFIG_USB_STORAGE=y
Chee Hong Ang346431c2020-08-06 12:15:33 +0800[diff] [blame]85CONFIG_DESIGNWARE_WATCHDOG=y
86CONFIG_WDT=y
Ley Foon Tan461d2982019-11-27 15:55:32 +0800[diff] [blame]87# CONFIG_SPL_USE_TINY_PRINTF is not set
Chin Liang Seea0437392020-08-05 18:34:33 +0800[diff] [blame]88CONFIG_PANIC_HANG=y