blob: 0d44c008aa9fe30d9ddf4c4070937d3318617ebd [file] [log] [blame]
Kumar Galae1c09492010-07-15 16:49:03 -05001/*
Jerry Huanged413672011-01-06 23:42:19 -06002 * Copyright 2009-2011 Freescale Semiconductor, Inc.
Kumar Galae1c09492010-07-15 16:49:03 -05003 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Kumar Galae1c09492010-07-15 16:49:03 -05005 */
6
7/*
8 * P4080 DS board configuration file
Scott Wooda1ef48c2012-08-14 10:14:51 +00009 * Also supports P4040 DS
Kumar Galae1c09492010-07-15 16:49:03 -050010 */
11#define CONFIG_P4080DS
Kumar Galae1c09492010-07-15 16:49:03 -050012#define CONFIG_PPC_P4080
Kumar Galae1c09492010-07-15 16:49:03 -050013
Kumar Galad0af3b92011-08-31 09:50:13 -050014#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
15
16#define CONFIG_MMC
17#define CONFIG_PCIE3
18
Shaohui Xie829187b2013-11-08 10:46:44 +080019#define CONFIG_CMD_SATA
20#define CONFIG_SATA_SIL
21#define CONFIG_SYS_SATA_MAX_DEVICE 2
22#define CONFIG_LIBATA
23#define CONFIG_LBA48
24
Timur Tabi830b76f2012-10-05 09:48:53 +000025#define CONFIG_SYS_SRIO
26#define CONFIG_SRIO1 /* SRIO port 1 */
27#define CONFIG_SRIO2 /* SRIO port 2 */
Liu Gang27afb9c2013-05-07 16:30:46 +080028#define CONFIG_SRIO_PCIE_BOOT_MASTER
Kumar Gala3b2a1af2010-09-30 15:47:16 -050029#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
30
Kumar Galae1c09492010-07-15 16:49:03 -050031#include "corenet_ds.h"