| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX8M=y |
| 3 | CONFIG_TEXT_BASE=0x40200000 |
| 4 | CONFIG_SYS_MALLOC_LEN=0x1000000 |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x18000 |
| 6 | CONFIG_SPL_GPIO=y |
| 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 9 | CONFIG_NR_DRAM_BANKS=2 |
| 10 | CONFIG_SF_DEFAULT_SPEED=50000000 |
| 11 | CONFIG_ENV_SIZE=0x10000 |
| 12 | CONFIG_ENV_OFFSET=0xFE0000 |
| 13 | CONFIG_ENV_SECT_SIZE=0x1000 |
| 14 | CONFIG_DM_GPIO=y |
| 15 | CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-drc02" |
| 16 | CONFIG_SPL_TEXT_BASE=0x920000 |
| 17 | CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y |
| 18 | CONFIG_DM_RESET=y |
| 19 | CONFIG_SYS_MONITOR_LEN=1048576 |
| 20 | CONFIG_SPL_MMC=y |
| 21 | CONFIG_SPL_SERIAL=y |
| 22 | CONFIG_SPL_DRIVERS_MISC=y |
| 23 | CONFIG_BOOTCOUNT_BOOTLIMIT=3 |
| 24 | CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 |
| 25 | CONFIG_SPL_STACK=0x96fc00 |
| 26 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 27 | CONFIG_SPL_BSS_START_ADDR=0x96fc00 |
| 28 | CONFIG_SPL_BSS_MAX_SIZE=0x400 |
| Tom Rini | c427a58 | 2024-10-08 09:18:32 -0600 | [diff] [blame] | 29 | CONFIG_SYS_BOOTM_LEN=0x8000000 |
| 30 | CONFIG_SYS_LOAD_ADDR=0x50000000 |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 31 | CONFIG_SPL=y |
| 32 | CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y |
| 33 | CONFIG_DEBUG_UART_BASE=0x30860000 |
| 34 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 35 | CONFIG_ENV_OFFSET_REDUND=0xFF0000 |
| 36 | CONFIG_IMX_BOOTAUX=y |
| 37 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 38 | CONFIG_PCI=y |
| 39 | CONFIG_DEBUG_UART=y |
| 40 | CONFIG_ENV_VARS_UBOOT_CONFIG=y |
| 41 | CONFIG_FIT=y |
| 42 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 43 | CONFIG_SPL_LOAD_FIT=y |
| 44 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 |
| 45 | CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 46 | CONFIG_SUPPORT_RAW_INITRD=y |
| 47 | CONFIG_OF_SYSTEM_SETUP=y |
| 48 | CONFIG_USE_BOOTARGS=y |
| 49 | CONFIG_USE_BOOTCOMMAND=y |
| 50 | CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset" |
| 51 | CONFIG_USE_PREBOOT=y |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 52 | CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-drc02.dtb" |
| 53 | CONFIG_SYS_CBSIZE=2048 |
| 54 | CONFIG_SYS_PBSIZE=2081 |
| 55 | CONFIG_CONSOLE_MUX=y |
| 56 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
| 57 | CONFIG_ARCH_MISC_INIT=y |
| 58 | CONFIG_BOARD_LATE_INIT=y |
| 59 | CONFIG_SPL_MAX_SIZE=0x26000 |
| 60 | CONFIG_SPL_BOARD_INIT=y |
| 61 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 62 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 63 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 64 | CONFIG_SPL_SYS_MALLOC=y |
| 65 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y |
| 66 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x4c000000 |
| 67 | CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 |
| 68 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 69 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 |
| 70 | # CONFIG_SPL_FIT_IMAGE_TINY is not set |
| 71 | CONFIG_SPL_I2C=y |
| 72 | CONFIG_SPL_POWER=y |
| 73 | CONFIG_SPL_WATCHDOG=y |
| 74 | CONFIG_HUSH_PARSER=y |
| 75 | CONFIG_SYS_PROMPT="u-boot=> " |
| 76 | # CONFIG_BOOTM_NETBSD is not set |
| 77 | # CONFIG_BOOTM_PLAN9 is not set |
| 78 | # CONFIG_BOOTM_RTEMS is not set |
| 79 | # CONFIG_BOOTM_VXWORKS is not set |
| 80 | CONFIG_CMD_ASKENV=y |
| 81 | # CONFIG_CMD_EXPORTENV is not set |
| 82 | CONFIG_CMD_ERASEENV=y |
| 83 | CONFIG_CRC32_VERIFY=y |
| 84 | CONFIG_CMD_EEPROM=y |
| 85 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
| 86 | CONFIG_SYS_EEPROM_SIZE=16384 |
| 87 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 |
| 88 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 |
| 89 | CONFIG_CMD_MD5SUM=y |
| 90 | CONFIG_MD5SUM_VERIFY=y |
| 91 | CONFIG_CMD_MEMTEST=y |
| 92 | CONFIG_CMD_SHA1SUM=y |
| 93 | CONFIG_SHA1SUM_VERIFY=y |
| 94 | CONFIG_CMD_CLK=y |
| 95 | CONFIG_CMD_DFU=y |
| 96 | CONFIG_CMD_FUSE=y |
| 97 | CONFIG_CMD_GPIO=y |
| 98 | CONFIG_CMD_GPT=y |
| 99 | CONFIG_CMD_GPT_RENAME=y |
| 100 | CONFIG_CMD_I2C=y |
| 101 | CONFIG_CMD_LSBLK=y |
| 102 | CONFIG_CMD_MBR=y |
| 103 | CONFIG_CMD_MMC=y |
| 104 | CONFIG_CMD_BKOPS_ENABLE=y |
| Tom Rini | c427a58 | 2024-10-08 09:18:32 -0600 | [diff] [blame] | 105 | CONFIG_MMC_SPEED_MODE_SET=y |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 106 | CONFIG_CMD_MTD=y |
| 107 | CONFIG_CMD_PART=y |
| 108 | CONFIG_CMD_PCI=y |
| 109 | CONFIG_CMD_READ=y |
| 110 | CONFIG_CMD_SPI=y |
| 111 | CONFIG_CMD_USB=y |
| 112 | CONFIG_CMD_USB_SDP=y |
| 113 | CONFIG_CMD_USB_MASS_STORAGE=y |
| 114 | CONFIG_CMD_CAT=y |
| 115 | CONFIG_CMD_XXD=y |
| 116 | CONFIG_CMD_DHCP=y |
| 117 | CONFIG_CMD_DHCP6=y |
| 118 | CONFIG_CMD_TFTPPUT=y |
| 119 | CONFIG_CMD_WGET=y |
| 120 | CONFIG_CMD_MII=y |
| 121 | CONFIG_CMD_PING=y |
| 122 | CONFIG_CMD_PXE=y |
| 123 | CONFIG_CMD_BOOTCOUNT=y |
| 124 | CONFIG_CMD_CACHE=y |
| 125 | CONFIG_CMD_TIME=y |
| 126 | CONFIG_CMD_GETTIME=y |
| 127 | CONFIG_CMD_KASLRSEED=y |
| 128 | CONFIG_CMD_SYSBOOT=y |
| 129 | CONFIG_CMD_UUID=y |
| 130 | CONFIG_CMD_PMIC=y |
| 131 | CONFIG_CMD_REGULATOR=y |
| 132 | CONFIG_CMD_SMC=y |
| 133 | CONFIG_HASH_VERIFY=y |
| 134 | CONFIG_CMD_BTRFS=y |
| 135 | CONFIG_CMD_EXT2=y |
| 136 | CONFIG_CMD_EXT4=y |
| 137 | CONFIG_CMD_EXT4_WRITE=y |
| 138 | CONFIG_CMD_FAT=y |
| 139 | CONFIG_CMD_FS_GENERIC=y |
| 140 | CONFIG_CMD_FS_UUID=y |
| 141 | CONFIG_CMD_MTDPARTS=y |
| 142 | CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y |
| 143 | CONFIG_MTDIDS_DEFAULT="nor0=flash@0" |
| 144 | CONFIG_MTDPARTS_DEFAULT="mtdparts=flash@0:-(sf)" |
| Marek Vasut | 1208f3e | 2024-09-25 18:07:17 +0200 | [diff] [blame] | 145 | CONFIG_PARTITION_TYPE_GUID=y |
| 146 | CONFIG_OF_CONTROL=y |
| 147 | CONFIG_SPL_OF_CONTROL=y |
| 148 | CONFIG_ENV_OVERWRITE=y |
| 149 | CONFIG_ENV_IS_NOWHERE=y |
| 150 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 151 | CONFIG_ENV_SECT_SIZE_AUTO=y |
| 152 | CONFIG_ENV_SPI_MAX_HZ=80000000 |
| 153 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
| 154 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 155 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| 156 | CONFIG_VERSION_VARIABLE=y |
| 157 | CONFIG_NET_RANDOM_ETHADDR=y |
| 158 | CONFIG_NETCONSOLE=y |
| 159 | CONFIG_IP_DEFRAG=y |
| 160 | CONFIG_TFTP_TSIZE=y |
| 161 | CONFIG_PROT_TCP_SACK=y |
| 162 | CONFIG_IPV6=y |
| 163 | CONFIG_SPL_DM=y |
| 164 | CONFIG_BOOTCOUNT_LIMIT=y |
| 165 | CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000 |
| 166 | CONFIG_SPL_CLK_COMPOSITE_CCF=y |
| 167 | CONFIG_CLK_COMPOSITE_CCF=y |
| 168 | CONFIG_SPL_CLK_IMX8MP=y |
| 169 | CONFIG_CLK_IMX8MP=y |
| 170 | CONFIG_FSL_CAAM=y |
| 171 | CONFIG_IMX8M_DRAM_INLINE_ECC=y |
| 172 | CONFIG_DFU_TFTP=y |
| 173 | CONFIG_DFU_TIMEOUT=y |
| 174 | CONFIG_DFU_MMC=y |
| 175 | CONFIG_DFU_MTD=y |
| 176 | CONFIG_DFU_RAM=y |
| 177 | CONFIG_USB_FUNCTION_FASTBOOT=y |
| 178 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
| 179 | CONFIG_FASTBOOT_BUF_SIZE=0x20000000 |
| 180 | CONFIG_FASTBOOT_FLASH=y |
| 181 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
| 182 | CONFIG_GPIO_HOG=y |
| 183 | CONFIG_SPL_GPIO_HOG=y |
| 184 | CONFIG_MXC_GPIO=y |
| 185 | CONFIG_DM_PCA953X=y |
| 186 | CONFIG_DM_I2C=y |
| 187 | CONFIG_I2C_MUX=y |
| 188 | CONFIG_I2C_MUX_PCA954x=y |
| 189 | # CONFIG_INPUT is not set |
| 190 | CONFIG_LED=y |
| 191 | CONFIG_LED_BLINK=y |
| 192 | CONFIG_LED_GPIO=y |
| 193 | CONFIG_I2C_EEPROM=y |
| 194 | CONFIG_SYS_I2C_EEPROM_ADDR=0x50 |
| 195 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 196 | CONFIG_MMC_IO_VOLTAGE=y |
| 197 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
| 198 | CONFIG_MMC_UHS_SUPPORT=y |
| 199 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
| 200 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 201 | CONFIG_MMC_HS400_SUPPORT=y |
| 202 | CONFIG_FSL_USDHC=y |
| 203 | CONFIG_MTD=y |
| 204 | CONFIG_DM_MTD=y |
| 205 | CONFIG_DM_SPI_FLASH=y |
| 206 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 207 | # CONFIG_SPI_FLASH_UNLOCK_ALL is not set |
| 208 | CONFIG_SPI_FLASH_WINBOND=y |
| 209 | CONFIG_SPI_FLASH_MTD=y |
| 210 | CONFIG_PHY_ANEG_TIMEOUT=20000 |
| 211 | CONFIG_PHY_MICREL=y |
| 212 | CONFIG_PHY_MICREL_KSZ90X1=y |
| 213 | CONFIG_PHY_SMSC=y |
| 214 | CONFIG_DM_MDIO=y |
| 215 | CONFIG_DM_ETH_PHY=y |
| 216 | CONFIG_DWC_ETH_QOS=y |
| 217 | CONFIG_DWC_ETH_QOS_IMX=y |
| 218 | CONFIG_FEC_MXC=y |
| 219 | CONFIG_RGMII=y |
| 220 | CONFIG_MII=y |
| 221 | CONFIG_NVME_PCI=y |
| 222 | CONFIG_PCIE_DW_IMX=y |
| 223 | CONFIG_PHY_IMX8MQ_USB=y |
| 224 | CONFIG_PHY_IMX8M_PCIE=y |
| 225 | CONFIG_PINCTRL=y |
| 226 | CONFIG_SPL_PINCTRL=y |
| 227 | CONFIG_PINCTRL_IMX8M=y |
| 228 | CONFIG_POWER_DOMAIN=y |
| 229 | CONFIG_IMX8M_POWER_DOMAIN=y |
| 230 | CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y |
| 231 | CONFIG_DM_PMIC=y |
| 232 | CONFIG_DM_PMIC_PCA9450=y |
| 233 | CONFIG_SPL_DM_PMIC_PCA9450=y |
| 234 | CONFIG_SPL_DM_REGULATOR=y |
| 235 | CONFIG_DM_REGULATOR_PCA9450=y |
| 236 | CONFIG_SPL_DM_REGULATOR_PCA9450=y |
| 237 | CONFIG_DM_REGULATOR_FIXED=y |
| 238 | CONFIG_DM_REGULATOR_GPIO=y |
| 239 | CONFIG_DM_RNG=y |
| 240 | CONFIG_DM_RTC=y |
| 241 | CONFIG_RTC_M41T62=y |
| 242 | CONFIG_CONS_INDEX=2 |
| 243 | CONFIG_DM_SERIAL=y |
| 244 | # CONFIG_SPL_DM_SERIAL is not set |
| 245 | CONFIG_MXC_UART=y |
| 246 | CONFIG_SPI=y |
| 247 | CONFIG_DM_SPI=y |
| 248 | CONFIG_NXP_FSPI=y |
| 249 | CONFIG_MXC_SPI=y |
| 250 | CONFIG_SYSRESET=y |
| 251 | CONFIG_SPL_SYSRESET=y |
| 252 | CONFIG_SYSRESET_PSCI=y |
| 253 | CONFIG_SYSRESET_WATCHDOG=y |
| 254 | CONFIG_DM_THERMAL=y |
| 255 | CONFIG_IMX_TMU=y |
| 256 | CONFIG_USB=y |
| 257 | # CONFIG_SPL_DM_USB is not set |
| 258 | CONFIG_DM_USB_GADGET=y |
| 259 | CONFIG_USB_XHCI_HCD=y |
| 260 | CONFIG_USB_XHCI_DWC3=y |
| 261 | CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y |
| 262 | CONFIG_USB_EHCI_HCD=y |
| 263 | CONFIG_USB_DWC3=y |
| 264 | CONFIG_USB_DWC3_GENERIC=y |
| 265 | CONFIG_USB_STORAGE=y |
| 266 | CONFIG_USB_HOST_ETHER=y |
| 267 | CONFIG_USB_ETHER_ASIX=y |
| 268 | CONFIG_USB_GADGET=y |
| 269 | CONFIG_USB_GADGET_MANUFACTURER="DH electronics" |
| 270 | CONFIG_USB_GADGET_VENDOR_NUM=0x0525 |
| 271 | CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 |
| 272 | CONFIG_USB_FUNCTION_ACM=y |
| 273 | CONFIG_USB_ETHER=y |
| 274 | CONFIG_USB_ETH_CDC=y |
| 275 | CONFIG_IMX_WATCHDOG=y |