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Nikita Kiryanov2b7487c2015-07-30 23:56:23 +03001/*
2 * cm_t43.h
3 *
4 * Copyright (C) 2015 Compulab, Ltd.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_CM_T43_H
10#define __CONFIG_CM_T43_H
11
12#define CONFIG_AM43XX
13#define CONFIG_CM_T43
14#define CONFIG_ARCH_CPU_INIT
15#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
16#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
17
18#include <asm/arch/omap.h>
19
20/* Serial support */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030021#define CONFIG_DM_SERIAL
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030022#define CONFIG_SYS_NS16550_SERIAL
23#define CONFIG_SYS_NS16550_CLK 48000000
24#define CONFIG_SYS_NS16550_COM1 0x44e09000
25
26/* NAND support */
27#define CONFIG_NAND
28#define CONFIG_NAND_OMAP_ELM
29#define CONFIG_SYS_NAND_ONFI_DETECTION
30#define CONFIG_SYS_NAND_5_ADDR_CYCLE
31#define CONFIG_SYS_NAND_PAGE_SIZE 2048
32#define CONFIG_SYS_NAND_OOBSIZE 64
33#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
34#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
35#define CONFIG_SYS_NAND_ECCSIZE 512
36#define CONFIG_SYS_NAND_ECCBYTES 14
37#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
38#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
39 CONFIG_SYS_NAND_PAGE_SIZE)
40#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
41 10, 11, 12, 13, 14, 15, 16, 17, \
42 18, 19, 20, 21, 22, 23, 24, 25, \
43 26, 27, 28, 29, 30, 31, 32, 33, \
44 34, 35, 36, 37, 38, 39, 40, 41, \
45 42, 43, 44, 45, 46, 47, 48, 49, \
46 50, 51, 52, 53, 54, 55, 56, 57, }
47
48/* CPSW Ethernet support */
49#define CONFIG_DRIVER_TI_CPSW
50#define CONFIG_MII
51#define CONFIG_BOOTP_DEFAULT
52#define CONFIG_BOOTP_SEND_HOSTNAME
53#define CONFIG_BOOTP_GATEWAY
54#define CONFIG_NET_MULTI
55#define CONFIG_PHY_GIGE
56#define CONFIG_PHY_ATHEROS
57#define CONFIG_PHYLIB
58#define CONFIG_SYS_RX_ETH_BUFFER 64
59
60/* USB support */
61#define CONFIG_USB_HOST
62#define CONFIG_USB_XHCI
63#define CONFIG_USB_XHCI_OMAP
64#define CONFIG_USB_XHCI_DWC3
65#define CONFIG_USB_STORAGE
66#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
67#define CONFIG_OMAP_USB_PHY
68#define CONFIG_AM437X_USB2PHY2_HOST
69
70/* SPI Flash support */
71#define CONFIG_SPI_FLASH
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030072#define CONFIG_TI_SPI_MMAP
73#define CONFIG_SPI_FLASH_BAR
74#define CONFIG_SF_DEFAULT_SPEED 48000000
75#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
76
77/* Power */
78#define CONFIG_POWER
79#define CONFIG_POWER_I2C
80#define CONFIG_POWER_TPS65218
81
82/* Enabling L2 Cache */
83#define CONFIG_SYS_L2_PL310
84#define CONFIG_SYS_PL310_BASE 0x48242000
85#define CONFIG_SYS_CACHELINE_SIZE 32
86
87/*
88 * Since SPL did pll and ddr initialization for us,
89 * we don't need to do it twice.
90 */
91#if !defined(CONFIG_SPL_BUILD)
92#define CONFIG_SKIP_LOWLEVEL_INIT
93#endif
94
95#define CONFIG_HSMMC2_8BIT
96
97#include <configs/ti_armv7_omap.h>
98#undef CONFIG_SPL_OS_BOOT
99#undef CONFIG_SPL_GPIO_SUPPORT
100#undef CONFIG_SPL_NAND_SUPPORT
101#undef CONFIG_SPL_BOARD_INIT
102#undef CONFIG_BOOTDELAY
103#include <config_distro_defaults.h>
104#define CONFIG_ZERO_BOOTDELAY_CHECK
105#undef CONFIG_CMD_IMLS
106
107#define CONFIG_ENV_SIZE (16 * 1024)
108#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
109
110#define V_OSCK 24000000 /* Clock output from T2 */
111#define V_SCLK (V_OSCK)
112
113#define CONFIG_ENV_IS_IN_SPI_FLASH
114#define CONFIG_ENV_SECT_SIZE (64 * 1024)
115#define CONFIG_ENV_OFFSET (768 * 1024)
116#define CONFIG_ENV_SPI_MAX_HZ 48000000
117
118#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
119
120/* Enhance our eMMC support / experience. */
121#define CONFIG_CMD_GPT
122#define CONFIG_EFI_PARTITION
123
124#define CONFIG_EXTRA_ENV_SETTINGS \
125 "loadaddr=0x80200000\0" \
126 "fdtaddr=0x81200000\0" \
127 "bootm_size=0x8000000\0" \
128 "autoload=no\0" \
129 "console=ttyO0,115200n8\0" \
130 "fdtfile=am437x-sb-som-t43.dtb\0" \
131 "kernel=zImage-cm-t43\0" \
132 "bootscr=bootscr.img\0" \
133 "emmcroot=/dev/mmcblk0p2 rw\0" \
134 "emmcrootfstype=ext4 rootwait\0" \
135 "emmcargs=setenv bootargs console=${console} " \
136 "root=${emmcroot} " \
137 "rootfstype=${emmcrootfstype}\0" \
138 "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
139 "bootscript=echo Running bootscript from mmc ...; " \
140 "source ${loadaddr}\0" \
141 "emmcboot=echo Booting from emmc ... && " \
142 "run emmcargs && " \
143 "load mmc 1 ${loadaddr} ${kernel} && " \
144 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
145 "bootz ${loadaddr} - ${fdtaddr}\0"
146
147#define CONFIG_BOOTCOMMAND \
148 "mmc dev 0; " \
149 "if mmc rescan; then " \
150 "if run loadbootscript; then " \
151 "run bootscript; " \
152 "fi; " \
153 "fi; " \
154 "mmc dev 1; " \
155 "if mmc rescan; then " \
156 "run emmcboot; " \
157 "fi;"
158
159
160#define CONFIG_CONS_INDEX 1
161
162/* SPL defines. */
163#define CONFIG_SPL_TEXT_BASE 0x40300350
164#define CONFIG_SPL_MAX_SIZE (64 * 1024)
165#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
166#define CONFIG_SPL_POWER_SUPPORT
167#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
168#define CONFIG_SPL_SPI_SUPPORT
169#define CONFIG_SPL_SPI_FLASH_SUPPORT
170#define CONFIG_SPL_SPI_LOAD
171
172#endif /* __CONFIG_CM_T43_H */