wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
Albert ARIBAUD | 60fbc8d | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef _PCI_I386_H_ |
Gabe Black | 67bb7b0 | 2012-10-10 13:12:57 +0000 | [diff] [blame] | 9 | #define _PCI_I386_H_ |
wdenk | 591dda5 | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 10 | |
Bin Meng | 39620f6 | 2015-02-02 22:35:25 +0800 | [diff] [blame] | 11 | /* bus mapping constants (used for PCI core initialization) */ |
| 12 | #define PCI_REG_ADDR 0xcf8 |
| 13 | #define PCI_REG_DATA 0xcfc |
| 14 | |
| 15 | #define PCI_CFG_EN 0x80000000 |
| 16 | |
| 17 | #ifndef __ASSEMBLY__ |
| 18 | |
Graeme Russ | 883c603 | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 19 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ |
| 20 | const struct pci_device_id _table[] |
| 21 | |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 22 | struct pci_controller; |
| 23 | |
Graeme Russ | 703ede5 | 2011-11-08 02:33:22 +0000 | [diff] [blame] | 24 | void pci_setup_type1(struct pci_controller *hose); |
Simon Glass | 7680550 | 2014-11-12 22:42:11 -0700 | [diff] [blame] | 25 | |
| 26 | /** |
| 27 | * board_pci_setup_hose() - Set up the PCI hose |
| 28 | * |
| 29 | * This is called by the common x86 PCI code to set up the PCI controller |
| 30 | * hose. It may be called when no memory/BSS is available so should just |
| 31 | * store things in 'hose' and not in BSS variables. |
| 32 | */ |
| 33 | void board_pci_setup_hose(struct pci_controller *hose); |
Simon Glass | a54d981 | 2014-11-12 22:42:12 -0700 | [diff] [blame] | 34 | |
| 35 | /** |
| 36 | * pci_early_init_hose() - Set up PCI host before relocation |
| 37 | * |
| 38 | * This allocates memory for, sets up and returns the PCI hose. It can be |
Bin Meng | f1b81fc | 2014-12-30 22:53:21 +0800 | [diff] [blame] | 39 | * called before relocation. The hose will be stored in gd->hose for |
Simon Glass | a54d981 | 2014-11-12 22:42:12 -0700 | [diff] [blame] | 40 | * later use, but will become invalid one DRAM is available. |
| 41 | */ |
| 42 | int pci_early_init_hose(struct pci_controller **hosep); |
Simon Glass | a205b1d | 2014-11-12 22:42:14 -0700 | [diff] [blame] | 43 | |
Simon Glass | 75a042b | 2014-11-14 18:18:28 -0700 | [diff] [blame] | 44 | int board_pci_pre_scan(struct pci_controller *hose); |
| 45 | int board_pci_post_scan(struct pci_controller *hose); |
| 46 | |
Simon Glass | a205b1d | 2014-11-12 22:42:14 -0700 | [diff] [blame] | 47 | /* |
| 48 | * Simple PCI access routines - these work from either the early PCI hose |
| 49 | * or the 'real' one, created after U-Boot has memory available |
| 50 | */ |
Simon Glass | 240d06d | 2015-03-05 12:25:15 -0700 | [diff] [blame] | 51 | unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where); |
| 52 | unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where); |
| 53 | unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where); |
Simon Glass | a205b1d | 2014-11-12 22:42:14 -0700 | [diff] [blame] | 54 | |
Simon Glass | 240d06d | 2015-03-05 12:25:15 -0700 | [diff] [blame] | 55 | void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value); |
| 56 | void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value); |
| 57 | void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value); |
Simon Glass | a205b1d | 2014-11-12 22:42:14 -0700 | [diff] [blame] | 58 | |
Bin Meng | 39620f6 | 2015-02-02 22:35:25 +0800 | [diff] [blame] | 59 | #endif /* __ASSEMBLY__ */ |
| 60 | |
| 61 | #endif /* _PCI_I386_H_ */ |