Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 3 | CONFIG_ARCH_AT91=y |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 4 | CONFIG_TEXT_BASE=0x26f00000 |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 5 | CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 6 | CONFIG_SPL_GPIO=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
Tom Rini | 9924ca1 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 |
Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 11 | CONFIG_SF_DEFAULT_SPEED=50000000 |
Tom Rini | f6e6e1a | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 12 | CONFIG_ENV_SIZE=0x4000 |
| 13 | CONFIG_DM_GPIO=y |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 14 | CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" |
Tom Rini | 0332a1a | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 15 | CONFIG_SPL_TEXT_BASE=0x200000 |
Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 16 | CONFIG_OF_LIBFDT_OVERLAY=y |
Tom Rini | 3d2b97c | 2023-05-29 10:43:26 -0400 | [diff] [blame] | 17 | CONFIG_SYS_MONITOR_LEN=524288 |
Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 18 | CONFIG_SPL_MMC=y |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 19 | CONFIG_SPL_SERIAL=y |
Simon Glass | 284cb9c | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 20 | CONFIG_SPL_DRIVERS_MISC=y |
Tom Rini | 9924ca1 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 21 | CONFIG_SPL_STACK=0x218000 |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 22 | CONFIG_SPL=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 23 | CONFIG_DEBUG_UART_BASE=0xf801c000 |
| 24 | CONFIG_DEBUG_UART_CLOCK=82000000 |
Tom Rini | 7c027e0 | 2022-06-20 08:13:12 -0400 | [diff] [blame] | 25 | CONFIG_DEBUG_UART_BOARD_INIT=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 26 | CONFIG_SPL_FS_FAT=y |
| 27 | CONFIG_SPL_LIBDISK_SUPPORT=y |
Tom Rini | 4b2fcb3 | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 28 | CONFIG_SYS_LOAD_ADDR=0x22000000 |
Tom Rini | 47dece3 | 2020-04-28 16:15:47 -0400 | [diff] [blame] | 29 | CONFIG_DEBUG_UART=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 30 | CONFIG_ENV_VARS_UBOOT_CONFIG=y |
| 31 | CONFIG_FIT=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 32 | CONFIG_SD_BOOT=y |
| 33 | CONFIG_BOOTDELAY=3 |
| 34 | CONFIG_USE_BOOTARGS=y |
Eugen Hristev | 86c0e33 | 2021-05-18 11:58:42 +0300 | [diff] [blame] | 35 | CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" |
Tom Rini | 5ddf172 | 2021-11-10 09:11:40 -0500 | [diff] [blame] | 36 | CONFIG_USE_BOOTCOMMAND=y |
| 37 | CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000" |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 38 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 39 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 40 | CONFIG_MISC_INIT_R=y |
Tom Rini | abb0f52 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 41 | CONFIG_SPL_MAX_SIZE=0x10000 |
Tom Rini | 65aa124 | 2022-05-27 10:19:45 -0400 | [diff] [blame] | 42 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 43 | CONFIG_SPL_BSS_START_ADDR=0x20000000 |
Tom Rini | 0cb89e7 | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 44 | CONFIG_SPL_BSS_MAX_SIZE=0x80000 |
Tom Rini | 8a14ac4 | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 45 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
Tom Rini | 166e322 | 2022-05-27 12:48:32 -0400 | [diff] [blame] | 46 | CONFIG_SYS_SPL_MALLOC=y |
| 47 | CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 48 | CONFIG_SPL_DISPLAY_PRINT=y |
| 49 | # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set |
Eugen Hristev | 4931406 | 2019-09-04 08:19:43 +0000 | [diff] [blame] | 50 | CONFIG_SPL_AT91_MCK_BYPASS=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 51 | CONFIG_HUSH_PARSER=y |
Tom Rini | ae17fa3 | 2022-05-11 18:01:06 -0400 | [diff] [blame] | 52 | CONFIG_SYS_CBSIZE=256 |
Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 53 | CONFIG_SYS_PBSIZE=276 |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 54 | CONFIG_CMD_BOOTZ=y |
Mihai Sain | bb41f99 | 2021-09-02 15:21:08 +0300 | [diff] [blame] | 55 | CONFIG_CMD_DM=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 56 | # CONFIG_CMD_FLASH is not set |
Tom Rini | b3e3fe4 | 2021-12-27 13:53:48 +0000 | [diff] [blame] | 57 | CONFIG_CMD_GPIO=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 58 | CONFIG_CMD_I2C=y |
| 59 | # CONFIG_CMD_LOADS is not set |
| 60 | CONFIG_CMD_MMC=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 61 | CONFIG_CMD_DHCP=y |
Tom Rini | 1c47c4a | 2022-02-25 11:19:50 -0500 | [diff] [blame] | 62 | CONFIG_BOOTP_BOOTFILESIZE=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 63 | CONFIG_CMD_MII=y |
| 64 | CONFIG_CMD_PING=y |
Eugen Hristev | 858f8d5 | 2021-05-26 16:05:57 +0300 | [diff] [blame] | 65 | CONFIG_CMD_HASH=y |
| 66 | CONFIG_HASH_VERIFY=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 67 | CONFIG_CMD_EXT4=y |
| 68 | CONFIG_CMD_FAT=y |
| 69 | CONFIG_OF_CONTROL=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 70 | CONFIG_SPL_OF_CONTROL=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 71 | CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 72 | CONFIG_ENV_IS_IN_FAT=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 73 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 74 | CONFIG_SPL_DM=y |
| 75 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 76 | CONFIG_CLK=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 77 | CONFIG_SPL_CLK=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 78 | CONFIG_CLK_AT91=y |
| 79 | CONFIG_AT91_UTMI=y |
| 80 | CONFIG_AT91_H32MX=y |
| 81 | CONFIG_AT91_GENERIC_CLK=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 82 | CONFIG_ATMEL_PIO4=y |
| 83 | CONFIG_DM_I2C=y |
| 84 | CONFIG_SYS_I2C_AT91=y |
| 85 | CONFIG_I2C_EEPROM=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 86 | CONFIG_MMC_SDHCI=y |
| 87 | CONFIG_MMC_SDHCI_ATMEL=y |
Miquel Raynal | 803baa2 | 2019-10-03 19:50:08 +0200 | [diff] [blame] | 88 | CONFIG_MTD=y |
Tom Rini | e799f92 | 2019-12-04 17:18:38 -0500 | [diff] [blame] | 89 | CONFIG_DM_SPI_FLASH=y |
Tudor Ambarus | 0b0c614 | 2019-11-13 15:42:58 +0000 | [diff] [blame] | 90 | CONFIG_SF_DEFAULT_BUS=2 |
Tudor Ambarus | 0b0c614 | 2019-11-13 15:42:58 +0000 | [diff] [blame] | 91 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 92 | CONFIG_SPI_FLASH_ATMEL=y |
| 93 | CONFIG_SPI_FLASH_MACRONIX=y |
Tudor Ambarus | 0b0c614 | 2019-11-13 15:42:58 +0000 | [diff] [blame] | 94 | CONFIG_SPI_FLASH_SPANSION=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 95 | CONFIG_SPI_FLASH_STMICRO=y |
| 96 | CONFIG_SPI_FLASH_SST=y |
| 97 | CONFIG_PHY_MICREL=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 98 | CONFIG_MACB=y |
| 99 | CONFIG_PINCTRL=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 100 | CONFIG_SPL_PINCTRL=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 101 | CONFIG_PINCTRL_AT91PIO4=y |
| 102 | CONFIG_DM_SERIAL=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 103 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 104 | CONFIG_ATMEL_USART=y |
| 105 | CONFIG_SPI=y |
| 106 | CONFIG_DM_SPI=y |
Tudor Ambarus | 0b0c614 | 2019-11-13 15:42:58 +0000 | [diff] [blame] | 107 | CONFIG_ATMEL_QSPI=y |
Sergiu Moga | 84567d4 | 2022-04-01 12:27:25 +0300 | [diff] [blame] | 108 | CONFIG_SYSRESET=y |
| 109 | CONFIG_SPL_SYSRESET=y |
Sergiu Moga | 84567d4 | 2022-04-01 12:27:25 +0300 | [diff] [blame] | 110 | CONFIG_SYSRESET_AT91=y |
Tom Rini | 59d1a71 | 2022-05-05 14:47:31 -0400 | [diff] [blame] | 111 | CONFIG_TIMER=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 112 | CONFIG_SPL_TIMER=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 113 | CONFIG_ATMEL_PIT_TIMER=y |
Eugen Hristev | 59d6289 | 2022-04-04 11:35:51 +0300 | [diff] [blame] | 114 | CONFIG_SPL_ATMEL_PIT_TIMER=y |
Eugen Hristev | d3446a4 | 2019-08-26 11:45:06 +0000 | [diff] [blame] | 115 | CONFIG_USB=y |
Eugen Hristev | d3446a4 | 2019-08-26 11:45:06 +0000 | [diff] [blame] | 116 | CONFIG_USB_EHCI_HCD=y |
| 117 | CONFIG_USB_STORAGE=y |
| 118 | CONFIG_USB_GADGET=y |
| 119 | CONFIG_USB_GADGET_ATMEL_USBA=y |
Simon Glass | 52cb504 | 2022-10-18 07:46:31 -0600 | [diff] [blame] | 120 | CONFIG_VIDEO=y |
Anatolij Gustschin | dba3670 | 2020-02-04 22:43:06 +0100 | [diff] [blame] | 121 | # CONFIG_VIDEO_BPP8 is not set |
| 122 | # CONFIG_VIDEO_BPP32 is not set |
Eugen Hristev | d3446a4 | 2019-08-26 11:45:06 +0000 | [diff] [blame] | 123 | CONFIG_ATMEL_HLCD=y |
Nicolas Ferre | 8ba10c7 | 2019-08-08 07:48:26 +0000 | [diff] [blame] | 124 | CONFIG_W1=y |
| 125 | CONFIG_W1_GPIO=y |
| 126 | CONFIG_W1_EEPROM=y |
| 127 | CONFIG_W1_EEPROM_DS24XXX=y |
Eugen Hristev | 1d15212 | 2019-08-08 07:48:35 +0000 | [diff] [blame] | 128 | # CONFIG_EFI_LOADER_HII is not set |