blob: d4457abfbdbe3d0880aa7c087824371759915061 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkabf7a7c2003-12-08 01:34:36 +00002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang95bed1f2012-03-26 21:49:04 +00006 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
wdenkabf7a7c2003-12-08 01:34:36 +00007 */
8
9#include <common.h>
TsiChungLiew1692b482007-08-15 20:32:06 -050010#include <asm/immap.h>
Alison Wang95bed1f2012-03-26 21:49:04 +000011#include <asm/io.h>
wdenkabf7a7c2003-12-08 01:34:36 +000012
Simon Glass39f90ba2017-03-31 08:40:25 -060013DECLARE_GLOBAL_DATA_PTR;
wdenke65527f2004-02-12 00:47:09 +000014
15int checkboard (void) {
16 puts ("Board: ");
TsiChungLiew1692b482007-08-15 20:32:06 -050017 puts ("Freescale MCF5272C3 EVB\n");
wdenkabf7a7c2003-12-08 01:34:36 +000018 return 0;
wdenke65527f2004-02-12 00:47:09 +000019 };
20
Simon Glassd35f3382017-04-06 12:47:05 -060021int dram_init(void)
Simon Glassb4de3f32017-03-31 08:40:24 -060022{
Alison Wang95bed1f2012-03-26 21:49:04 +000023 sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM);
wdenke65527f2004-02-12 00:47:09 +000024
Alison Wang95bed1f2012-03-26 21:49:04 +000025 out_be16(&sdp->sdram_sdtr, 0xf539);
26 out_be16(&sdp->sdram_sdcr, 0x4211);
wdenke65527f2004-02-12 00:47:09 +000027
28 /* Dummy write to start SDRAM */
29 *((volatile unsigned long *)0) = 0;
30
Simon Glass39f90ba2017-03-31 08:40:25 -060031 gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
32
33 return 0;
wdenke65527f2004-02-12 00:47:09 +000034 };
35
36int testdram (void) {
37 /* TODO: XXX XXX XXX */
38 printf ("DRAM test not implemented!\n");
wdenkabf7a7c2003-12-08 01:34:36 +000039
wdenke65527f2004-02-12 00:47:09 +000040 return (0);
wdenkabf7a7c2003-12-08 01:34:36 +000041}