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git01.mediatek.com / filogic / uboot / 78206427472bfbc9042bc82c5e18c5110dcba19e / . / arch / x86 / dts / chromebook_samus.dts
blob: ddff277046a411e0ffc2521fe6e05332781c73ed [file] [log] [blame]
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]1/dts-v1/;
2
3#include <dt-bindings/gpio/x86-gpio.h>
4
5/include/ "skeleton.dtsi"
6/include/ "keyboard.dtsi"
7/include/ "serial.dtsi"
Bin Mengaf5b8d22018-07-19 03:07:33 -0700[diff] [blame]8/include/ "reset.dtsi"
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]9/include/ "rtc.dtsi"
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]10
Bin Meng8967f632021-07-28 12:00:23 +0800[diff] [blame]11#include "tsc_timer.dtsi"
Simon Glassbee77f62020-11-05 06:32:17 -0700[diff] [blame]12#include "smbios.dtsi"
13
Simon Glassb415c102021-06-27 17:51:09 -0600[diff] [blame]14#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE)
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]15#include "chromeos-x86.dtsi"
16#include "flashmap-x86-ro.dtsi"
17#include "flashmap-8mb-rw.dtsi"
18#endif
19
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]20/ {
21 model = "Google Samus";
22 compatible = "google,samus", "intel,broadwell";
23
24 aliases {
25 spi0 = &spi;
26 usb0 = &usb_0;
27 usb1 = &usb_1;
Simon Glassa3514ba2019-05-07 21:41:13 -0600[diff] [blame]28 cros-ec0 = &cros_ec;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]29 };
30
31 config {
32 silent_console = <0>;
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 cpu@0 {
40 device_type = "cpu";
41 compatible = "intel,core-i3-gen5";
42 reg = <0>;
43 intel,apic-id = <0>;
44 intel,slow-ramp = <3>;
45 };
46
47 cpu@1 {
48 device_type = "cpu";
49 compatible = "intel,core-i3-gen5";
50 reg = <1>;
51 intel,apic-id = <1>;
52 };
53
54 cpu@2 {
55 device_type = "cpu";
56 compatible = "intel,core-i3-gen5";
57 reg = <2>;
58 intel,apic-id = <2>;
59 };
60
61 cpu@3 {
62 device_type = "cpu";
63 compatible = "intel,core-i3-gen5";
64 reg = <3>;
65 intel,apic-id = <3>;
66 };
67
68 };
69
70 chosen {
71 stdout-path = "/serial";
72 };
73
74 keyboard {
75 intel,duplicate-por;
76 };
77
78 pch_pinctrl {
79 compatible = "intel,x86-broadwell-pinctrl";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]80 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]81 reg = <0 0>;
82
83 /* Put this first: it is the default */
84 gpio_unused: gpio-unused {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]85 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]86 mode-gpio;
87 direction = <PIN_INPUT>;
88 owner = <OWNER_GPIO>;
89 sense-disable;
90 };
91
92 gpio_acpi_sci: acpi-sci {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]93 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]94 mode-gpio;
95 direction = <PIN_INPUT>;
96 invert;
97 route = <ROUTE_SCI>;
98 };
99
100 gpio_acpi_smi: acpi-smi {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]101 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]102 mode-gpio;
103 direction = <PIN_INPUT>;
104 invert;
105 route = <ROUTE_SMI>;
106 };
107
108 gpio_input: gpio-input {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]109 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]110 mode-gpio;
111 direction = <PIN_INPUT>;
112 owner = <OWNER_GPIO>;
113 };
114
115 gpio_input_invert: gpio-input-invert {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]116 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]117 mode-gpio;
118 direction = <PIN_INPUT>;
119 owner = <OWNER_GPIO>;
120 invert;
121 };
122
123 gpio_native: gpio-native {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]124 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]125 };
126
127 gpio_out_high: gpio-out-high {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]128 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]129 mode-gpio;
130 direction = <PIN_OUTPUT>;
131 output-value = <1>;
132 owner = <OWNER_GPIO>;
133 sense-disable;
134 };
135
136 gpio_out_low: gpio-out-low {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]137 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]138 mode-gpio;
139 direction = <PIN_OUTPUT>;
140 output-value = <0>;
141 owner = <OWNER_GPIO>;
142 sense-disable;
143 };
144
145 gpio_pirq: gpio-pirq {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]146 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]147 mode-gpio;
148 direction = <PIN_INPUT>;
149 owner = <OWNER_GPIO>;
150 pirq-apic = <PIRQ_APIC_ROUTE>;
151 };
152
153 soc_gpio@0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]154 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]155 config =
156 <0 &gpio_unused 0>, /* unused */
157 <1 &gpio_unused 0>, /* unused */
158 <2 &gpio_unused 0>, /* unused */
159 <3 &gpio_unused 0>, /* unused */
160 <4 &gpio_native 0>, /* native: i2c0_sda_gpio4 */
161 <5 &gpio_native 0>, /* native: i2c0_scl_gpio5 */
162 <6 &gpio_native 0>, /* native: i2c1_sda_gpio6 */
163 <7 &gpio_native 0>, /* native: i2c1_scl_gpio7 */
164 <8 &gpio_acpi_sci 0>, /* pch_lte_wake_l */
165 <9 &gpio_input_invert 0>, /* trackpad_int_l (wake) */
166 <10 &gpio_acpi_sci 0>, /* pch_wlan_wake_l */
167 <11 &gpio_unused 0>, /* unused */
168 <12 &gpio_unused 0>, /* unused */
169 <13 &gpio_pirq 3>, /* trackpad_int_l (pirql) */
170 <14 &gpio_pirq 4>, /* touch_int_l (pirqm) */
171 <15 &gpio_unused 0>, /* unused (strap) */
172 <16 &gpio_input 0>, /* pch_wp */
173 <17 &gpio_unused 0>, /* unused */
174 <18 &gpio_unused 0>, /* unused */
175 <19 &gpio_unused 0>, /* unused */
176 <20 &gpio_native 0>, /* pcie_wlan_clkreq_l */
177 <21 &gpio_out_high 0>, /* pp3300_ssd_en */
178 <22 &gpio_unused 0>, /* unused */
179 <23 &gpio_out_low 0>, /* pp3300_autobahn_en */
180 <24 &gpio_unused 0>, /* unused */
181 <25 &gpio_input 0>, /* ec_in_rw */
182 <26 &gpio_unused 0>, /* unused */
183 <27 &gpio_acpi_sci 0>, /* pch_wake_l */
184 <28 &gpio_unused 0>, /* unused */
185 <29 &gpio_unused 0>, /* unused */
186 <30 &gpio_native 0>, /* native: pch_suswarn_l */
187 <31 &gpio_native 0>, /* native: acok_buf */
188 <32 &gpio_native 0>, /* native: lpc_clkrun_l */
189 <33 &gpio_native 0>, /* native: ssd_devslp */
190 <34 &gpio_acpi_smi 0>, /* ec_smi_l */
191 <35 &gpio_acpi_smi 0>, /* pch_nmi_dbg_l (route in nmi_en) */
192 <36 &gpio_acpi_sci 0>, /* ec_sci_l */
193 <37 &gpio_unused 0>, /* unused */
194 <38 &gpio_unused 0>, /* unused */
195 <39 &gpio_unused 0>, /* unused */
196 <40 &gpio_native 0>, /* native: pch_usb1_oc_l */
197 <41 &gpio_native 0>, /* native: pch_usb2_oc_l */
198 <42 &gpio_unused 0>, /* wlan_disable_l */
199 <43 &gpio_out_high 0>, /* pp1800_codec_en */
200 <44 &gpio_unused 0>, /* unused */
201 <45 &gpio_acpi_sci 0>, /* dsp_int - codec wake */
202 <46 &gpio_pirq 6>, /* hotword_det_l_3v3 (pirqo) - codec irq */
203 <47 &gpio_out_low 0>, /* ssd_reset_l */
204 <48 &gpio_unused 0>, /* unused */
205 <49 &gpio_unused 0>, /* unused */
206 <50 &gpio_unused 0>, /* unused */
207 <51 &gpio_unused 0>, /* unused */
208 <52 &gpio_input 0>, /* sim_det */
209 <53 &gpio_unused 0>, /* unused */
210 <54 &gpio_unused 0>, /* unused */
211 <55 &gpio_unused 0>, /* unused */
212 <56 &gpio_unused 0>, /* unused */
213 <57 &gpio_out_high 0>, /* codec_reset_l */
214 <58 &gpio_unused 0>, /* unused */
215 <59 &gpio_out_high 0>, /* lte_disable_l */
216 <60 &gpio_unused 0>, /* unused */
217 <61 &gpio_native 0>, /* native: pch_sus_stat */
218 <62 &gpio_native 0>, /* native: pch_susclk */
219 <63 &gpio_native 0>, /* native: pch_slp_s5_l */
220 <64 &gpio_unused 0>, /* unused */
221 <65 &gpio_input 0>, /* ram_id3 */
222 <66 &gpio_input 0>, /* ram_id3_old (strap) */
223 <67 &gpio_input 0>, /* ram_id0 */
224 <68 &gpio_input 0>, /* ram_id1 */
225 <69 &gpio_input 0>, /* ram_id2 */
226 <70 &gpio_unused 0>, /* unused */
227 <71 &gpio_native 0>, /* native: modphy_en */
228 <72 &gpio_unused 0>, /* unused */
229 <73 &gpio_unused 0>, /* unused */
230 <74 &gpio_unused 0>, /* unused */
231 <75 &gpio_unused 0>, /* unused */
232 <76 &gpio_unused 0>, /* unused */
233 <77 &gpio_unused 0>, /* unused */
234 <78 &gpio_unused 0>, /* unused */
235 <79 &gpio_unused 0>, /* unused */
236 <80 &gpio_unused 0>, /* unused */
237 <81 &gpio_unused 0>, /* unused */
238 <82 &gpio_native 0>, /* native: ec_rcin_l */
239 <83 &gpio_native 0>, /* gspi0_cs */
240 <84 &gpio_native 0>, /* gspi0_clk */
241 <85 &gpio_native 0>, /* gspi0_miso */
242 <86 &gpio_native 0>, /* gspi0_mosi (strap) */
243 <87 &gpio_unused 0>, /* unused */
244 <88 &gpio_unused 0>, /* unused */
245 <89 &gpio_out_high 0>, /* pp3300_sd_en */
246 <90 &gpio_unused 0>, /* unused */
247 <91 &gpio_unused 0>, /* unused */
248 <92 &gpio_unused 0>, /* unused */
249 <93 &gpio_unused 0>, /* unused */
250 <94 &gpio_unused 0>; /* unused */
251 };
252 };
253
254 pci {
255 compatible = "pci-x86";
256 #address-cells = <3>;
257 #size-cells = <2>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]258 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]259 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
260 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
261 0x01000000 0x0 0x1000 0x1000 0 0xefff>;
262
263 northbridge@0,0 {
264 reg = <0x00000000 0 0 0 0>;
265 compatible = "intel,broadwell-northbridge";
266 board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>,
267 <&gpio_c 3 0>, <&gpio_c 1 0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]268 bootph-all;
Simon Glassce750ea2023-09-07 09:58:14 -0600[diff] [blame]269 fspm,training-delay = <7>;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]270 spd {
271 #address-cells = <1>;
272 #size-cells = <0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]273 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]274 samsung_4 {
275 reg = <6>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]276 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]277 data = [91 20 f1 03 04 11 05 0b
278 03 11 01 08 0a 00 50 01
279 78 78 90 50 90 11 50 e0
280 10 04 3c 3c 01 90 00 00
281 00 80 00 00 00 00 00 a8
282 00 00 00 00 00 00 00 00
283 00 00 00 00 00 00 00 00
284 00 00 00 00 0f 11 02 00
285 00 00 00 00 00 00 00 00
286 00 00 00 00 00 00 00 00
287 00 00 00 00 00 00 00 00
288 00 00 00 00 00 00 00 00
289 00 00 00 00 00 00 00 00
290 00 00 00 00 00 00 00 00
291 00 00 00 00 00 80 ce 01
292 00 00 55 00 00 00 00 00
293 4b 34 45 38 45 33 30 34
294 45 44 2d 45 47 43 45 20
295 20 20 00 00 80 ce 00 00
296 00 00 00 00 00 00 00 00
297 00 00 00 00 00 00 00 00
298 00 00 00 00 00 00 00 00
299 00 00 00 00 00 00 00 00
300 00 00 00 00 00 00 00 00
301 00 00 00 00 00 00 00 00
302 00 00 00 00 00 00 00 00
303 00 00 00 00 00 00 00 00
304 00 00 00 00 00 00 00 00
305 00 00 00 00 00 00 00 00
306 00 00 00 00 00 00 00 00
307 00 00 00 00 00 00 00 00
308 00 00 00 00 00 00 00 00];
309 };
310 hynix-h9ccnnnbltmlar-ntm-lpddr3-32 {
311 /*
312 * banks 8, ranks 2, rows 14,
313 * columns 10, density 4096 mb, x32
314 */
315 reg = <8>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]316 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]317 data = [91 20 f1 03 04 11 05 0b
318 03 11 01 08 0a 00 50 01
319 78 78 90 50 90 11 50 e0
320 10 04 3c 3c 01 90 00 00
321 00 80 00 00 00 00 00 a8
322 00 00 00 00 00 00 00 00
323 00 00 00 00 00 00 00 00
324 00 00 00 00 0f 01 02 00
325 00 00 00 00 00 00 00 00
326 00 00 00 00 00 00 00 00
327 00 00 00 00 00 00 00 00
328 00 00 00 00 00 00 00 00
329 00 00 00 00 00 00 00 00
330 00 00 00 00 00 00 00 00
331 00 00 00 00 00 80 ad 00
332 00 00 55 00 00 00 00 00
333 48 39 43 43 4e 4e 4e 42
334 4c 54 4d 4c 41 52 2d 4e
335 54 4d 00 00 80 ad 00 00
336 00 00 00 00 00 00 00 00
337 00 00 00 00 00 00 00 00
338 00 00 00 00 00 00 00 00
339 00 00 00 00 00 00 00 00
340 00 00 00 00 00 00 00 00
341 00 00 00 00 00 00 00 00
342 00 00 00 00 00 00 00 00
343 00 00 00 00 00 00 00 00
344 00 00 00 00 00 00 00 00
345 00 00 00 00 00 00 00 00
346 00 00 00 00 00 00 00 00
347 00 00 00 00 00 00 00 00
348 00 00 00 00 00 00 00 00];
349 };
350 samsung_8 {
351 reg = <10>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]352 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]353 data = [91 20 f1 03 04 12 05 0a
354 03 11 01 08 0a 00 50 01
355 78 78 90 50 90 11 50 e0
356 10 04 3c 3c 01 90 00 00
357 00 80 00 00 00 00 00 a8
358 00 00 00 00 00 00 00 00
359 00 00 00 00 00 00 00 00
360 00 00 00 00 0f 11 02 00
361 00 00 00 00 00 00 00 00
362 00 00 00 00 00 00 00 00
363 00 00 00 00 00 00 00 00
364 00 00 00 00 00 00 00 00
365 00 00 00 00 00 00 00 00
366 00 00 00 00 00 00 00 00
367 00 00 00 00 00 80 ce 01
368 00 00 55 00 00 00 00 00
369 4b 34 45 36 45 33 30 34
370 45 44 2d 45 47 43 45 20
371 20 20 00 00 80 ce 00 00
372 00 00 00 00 00 00 00 00
373 00 00 00 00 00 00 00 00
374 00 00 00 00 00 00 00 00
375 00 00 00 00 00 00 00 00
376 00 00 00 00 00 00 00 00
377 00 00 00 00 00 00 00 00
378 00 00 00 00 00 00 00 00
379 00 00 00 00 00 00 00 00
380 00 00 00 00 00 00 00 00
381 00 00 00 00 00 00 00 00
382 00 00 00 00 00 00 00 00
383 00 00 00 00 00 00 00 00
384 00 00 00 00 00 00 00 00];
385 };
386 hynix-h9ccnnnbltmlar-ntm-lpddr3-16 {
387 /*
388 * banks 8, ranks 2, rows 14,
389 * columns 11, density 4096 mb, x16
390 */
391 reg = <12>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]392 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]393 data = [91 20 f1 03 04 12 05 0a
394 03 11 01 08 0a 00 50 01
395 78 78 90 50 90 11 50 e0
396 10 04 3c 3c 01 90 00 00
397 00 80 00 00 00 00 00 a8
398 00 00 00 00 00 00 00 00
399 00 00 00 00 00 00 00 00
400 00 00 00 00 0f 01 02 00
401 00 00 00 00 00 00 00 00
402 00 00 00 00 00 00 00 00
403 00 00 00 00 00 00 00 00
404 00 00 00 00 00 00 00 00
405 00 00 00 00 00 00 00 00
406 00 00 00 00 00 00 00 00
407 00 00 00 00 00 80 ad 00
408 00 00 55 00 00 00 00 00
409 48 39 43 43 4e 4e 4e 42
410 4c 54 4d 4c 41 52 2d 4e
411 54 4d 00 00 80 ad 00 00
412 00 00 00 00 00 00 00 00
413 00 00 00 00 00 00 00 00
414 00 00 00 00 00 00 00 00
415 00 00 00 00 00 00 00 00
416 00 00 00 00 00 00 00 00
417 00 00 00 00 00 00 00 00
418 00 00 00 00 00 00 00 00
419 00 00 00 00 00 00 00 00
420 00 00 00 00 00 00 00 00
421 00 00 00 00 00 00 00 00
422 00 00 00 00 00 00 00 00
423 00 00 00 00 00 00 00 00
424 00 00 00 00 00 00 00 00];
425 };
426 hynix-h9ccnnncltmlar-lpddr3 {
427 /*
428 * banks 8, ranks 2, rows 15,
429 * columns 11, density 8192 mb, x16
430 */
431 reg = <13>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]432 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]433 data = [91 20 f1 03 05 1a 05 0a
434 03 11 01 08 0a 00 50 01
435 78 78 90 50 90 11 50 e0
436 90 06 3c 3c 01 90 00 00
437 00 80 00 00 00 00 00 a8
438 00 00 00 00 00 00 00 00
439 00 00 00 00 00 00 00 00
440 00 00 00 00 0f 01 02 00
441 00 00 00 00 00 00 00 00
442 00 00 00 00 00 00 00 00
443 00 00 00 00 00 00 00 00
444 00 00 00 00 00 00 00 00
445 00 00 00 00 00 00 00 00
446 00 00 00 00 00 00 00 00
447 00 00 00 00 00 80 ad 00
448 00 00 55 00 00 00 00 00
449 48 39 43 43 4e 4e 4e 43
450 4c 54 4d 4c 41 52 00 00
451 00 00 00 00 80 ad 00 00
452 00 00 00 00 00 00 00 00
453 00 00 00 00 00 00 00 00
454 00 00 00 00 00 00 00 00
455 00 00 00 00 00 00 00 00
456 00 00 00 00 00 00 00 00
457 00 00 00 00 00 00 00 00
458 00 00 00 00 00 00 00 00
459 00 00 00 00 00 00 00 00
460 00 00 00 00 00 00 00 00
461 00 00 00 00 00 00 00 00
462 00 00 00 00 00 00 00 00
463 00 00 00 00 00 00 00 00
464 00 00 00 00 00 00 00 00];
465 };
466 elpida-edfb232a1ma {
467 /*
468 * banks 8, ranks 2, rows 15,
469 * columns 11, density 8192 mb, x16
470 */
471 reg = <15>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]472 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]473 data = [91 20 f1 03 05 1a 05 0a
474 03 11 01 08 0a 00 50 01
475 78 78 90 50 90 11 50 e0
476 90 06 3c 3c 01 90 00 00
477 00 80 00 00 00 00 00 a8
478 00 00 00 00 00 00 00 00
479 00 00 00 00 00 00 00 00
480 00 00 00 00 0f 01 02 00
481 00 00 00 00 00 00 00 00
482 00 00 00 00 00 00 00 00
483 00 00 00 00 00 00 00 00
484 00 00 00 00 00 00 00 00
485 00 00 00 00 00 00 00 00
486 00 00 00 00 00 00 00 00
487 00 00 00 00 00 02 fe 00
488 00 00 00 00 00 00 00 00
489 45 44 46 42 32 33 32 41
490 31 4d 41 2d 47 44 2d 46
491 00 00 00 00 02 fe 00 00
492 00 00 00 00 00 00 00 00
493 00 00 00 00 00 00 00 00
494 00 00 00 00 00 00 00 00
495 00 00 00 00 00 00 00 00
496 00 00 00 00 00 00 00 00
497 00 00 00 00 00 00 00 00
498 00 00 00 00 00 00 00 00
499 00 00 00 00 00 00 00 00
500 00 00 00 00 00 00 00 00
501 00 00 00 00 00 00 00 00
502 00 00 00 00 00 00 00 00
503 00 00 00 00 00 00 00 00
504 00 00 00 00 00 00 00 00];
505 };
506 };
507 };
508
509 gma@2,0 {
510 reg = <0x00001000 0 0 0 0>;
511 compatible = "intel,broadwell-igd";
512 intel,dp-hotplug = <6 6 6>;
513 intel,port-select = <1>; /* eDP */
514 intel,power-cycle-delay = <6>;
515 intel,power-up-delay = <2000>;
516 intel,power-down-delay = <500>;
517 intel,power-backlight-on-delay = <2000>;
518 intel,power-backlight-off-delay = <2000>;
519 intel,cpu-backlight = <0x00000200>;
520 intel,pch-backlight = <0x04000200>;
521 intel,pre-graphics-delay = <200>;
522 };
523
Simon Glass7e111d42019-02-16 20:25:07 -0700[diff] [blame]524 adsp@13,0 {
525 reg = <0x00009800 0 0 0 0>;
526 compatible = "intel,wildcatpoint-adsp";
527 intel,adsp-d3-pg-enable = <0>;
528 intel,adsp-sram-pg-enable = <0>;
529 intel,sio-acpi-mode;
530 #address-cells = <1>;
531 #size-cells = <0>;
532
533 i2s: shim {
534 compatible = "intel,broadwell-i2s";
535 #sound-dai-cells = <1>;
536 reg = <0xfb000 0xfc000 0xfd000>;
537 };
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]538 };
539
540 usb_1: usb@14,0 {
541 reg = <0x0000a000 0 0 0 0>;
542 compatible = "xhci-pci";
543 };
544
Simon Glass7e111d42019-02-16 20:25:07 -0700[diff] [blame]545 i2c0: i2c@15,1 {
546 reg = <0x0000a900 0 0 0 0>;
547 compatible = "snps,designware-i2c";
548 #address-cells = <1>;
549 #size-cells = <0>;
550
551 rt5677: rt5677@2c {
552 compatible = "realtek,rt5677";
553 #sound-dai-cells = <1>;
554 reg = <0x2c>;
555 };
556 };
557
558 me@16,0 {
559 reg = <0x0000b000 0 0 0 0>;
560 compatible = "intel,me";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]561 bootph-all;
Simon Glass7e111d42019-02-16 20:25:07 -0700[diff] [blame]562 };
563
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]564 usb_0: usb@1d,0 {
565 status = "disabled";
566 reg = <0x0000e800 0 0 0 0>;
567 compatible = "ehci-pci";
568 };
569
Simon Glassa3514ba2019-05-07 21:41:13 -0600[diff] [blame]570 pch: pch@1f,0 {
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]571 reg = <0x0000f800 0 0 0 0>;
572 compatible = "intel,broadwell-pch";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]573 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]574 #address-cells = <1>;
575 #size-cells = <1>;
576 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
577 0x80 0x80 0x80 0x80>;
578 intel,gpi-routing = <0 0 0 0 0 0 0 2
579 1 0 0 0 0 0 0 0>;
580 /* Enable EC SMI source */
581 intel,alt-gp-smi-enable = <0x0040>;
582
583 /* EC-SCI is GPIO36 */
584 intel,gpe0-en = <0 0x10 0 0>;
585
586 power-enable-gpio = <&gpio_a 23 0>;
587
588 spi: spi {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]589 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]590 #address-cells = <1>;
591 #size-cells = <0>;
592 compatible = "intel,ich9-spi";
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]593 fwstore_spi: spi-flash@0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]594 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]595 #size-cells = <1>;
596 #address-cells = <1>;
597 reg = <0>;
Bin Mengac54e252021-07-29 20:18:23 +0800[diff] [blame]598 m25p,fast-read;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]599 compatible = "winbond,w25q64",
Neil Armstrongf6625b42019-02-10 10:16:21 +0000[diff] [blame]600 "jedec,spi-nor";
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]601 memory-map = <0xff800000 0x00800000>;
602 rw-mrc-cache {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]603 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]604 label = "rw-mrc-cache";
605 reg = <0x003e0000 0x00010000>;
606 };
607 };
608 };
609
610 gpio_a: gpioa {
611 compatible = "intel,broadwell-gpio";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]612 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]613 #gpio-cells = <2>;
614 gpio-controller;
615 reg = <0 0>;
616 bank-name = "A";
617 };
618
619 gpio_b: gpiob {
620 compatible = "intel,broadwell-gpio";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]621 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]622 #gpio-cells = <2>;
623 gpio-controller;
624 reg = <1 0>;
625 bank-name = "B";
626 };
627
628 gpio_c: gpioc {
629 compatible = "intel,broadwell-gpio";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]630 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]631 #gpio-cells = <2>;
632 gpio-controller;
633 reg = <2 0>;
634 bank-name = "C";
635 };
636
637 lpc {
638 compatible = "intel,broadwell-lpc";
639 #address-cells = <1>;
640 #size-cells = <0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]641 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]642 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
Simon Glassa3514ba2019-05-07 21:41:13 -0600[diff] [blame]643 cros_ec: cros-ec {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]644 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]645 compatible = "google,cros-ec-lpc";
646 reg = <0x204 1 0x200 1 0x880 0x80>;
647
648 /*
649 * Describes the flash memory within
650 * the EC
651 */
652 #address-cells = <1>;
653 #size-cells = <1>;
654 flash@8000000 {
655 reg = <0x08000000 0x20000>;
656 erase-value = <0xff>;
657 };
658 };
659 };
660 };
661
662 sata@1f,2 {
663 compatible = "intel,wildcatpoint-ahci";
664 reg = <0x0000fa00 0 0 0 0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]665 bootph-some-ram;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]666 intel,sata-mode = "ahci";
667 intel,sata-port-map = <1>;
668 intel,sata-port0-gen3-tx = <0x72>;
669 reset-gpio = <&gpio_b 15 GPIO_ACTIVE_LOW>;
670 };
671
672 smbus: smbus@1f,3 {
673 compatible = "intel,ich-i2c";
674 reg = <0x0000fb00 0 0 0 0>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]675 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]676 };
677 };
678
679 tpm {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]680 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]681 reg = <0xfed40000 0x5000>;
682 compatible = "infineon,slb9635lpc";
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]683 secdata {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]684 bootph-all;
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]685 compatible = "google,tpm-secdata";
686 };
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]687 };
688
689 microcode {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]690 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]691 update@0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]692 bootph-all;
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]693#include "microcode/mc0306d4_00000018.dtsi"
694 };
695 };
696
Simon Glass7e111d42019-02-16 20:25:07 -0700[diff] [blame]697 sound {
698 compatible = "google,samus-sound";
699 codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>;
700 cpu {
701 sound-dai = <&i2s 0>;
702 };
703
704 codec {
705 sound-dai = <&rt5677 0>;
706 };
707 };
708
Simon Glassa0b09612016-03-16 07:44:43 -0600[diff] [blame]709};
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]710
711&rtc {
712 #address-cells = <1>;
713 #size-cells = <0>;
714 nvdata {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]715 bootph-all;
Simon Glassa23e97d2019-05-07 21:41:14 -0600[diff] [blame]716 compatible = "google,cmos-nvdata";
717 reg = <0x26>;
718 };
719};