Rick Chen | 76c0a24 | 2017-12-26 13:55:51 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2017 Microsemi Corporation. |
| 3 | * Copyright (c) 2017 Padmarao Begari <Padmarao.Begari@microsemi.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | */ |
| 9 | #ifndef __ASM_RISCV_PTRACE_H |
| 10 | #define __ASM_RISCV_PTRACE_H |
| 11 | |
| 12 | struct pt_regs { |
| 13 | unsigned long sepc; |
| 14 | unsigned long ra; |
| 15 | unsigned long sp; |
| 16 | unsigned long gp; |
| 17 | unsigned long tp; |
| 18 | unsigned long t0; |
| 19 | unsigned long t1; |
| 20 | unsigned long t2; |
| 21 | unsigned long s0; |
| 22 | unsigned long s1; |
| 23 | unsigned long a0; |
| 24 | unsigned long a1; |
| 25 | unsigned long a2; |
| 26 | unsigned long a3; |
| 27 | unsigned long a4; |
| 28 | unsigned long a5; |
| 29 | unsigned long a6; |
| 30 | unsigned long a7; |
| 31 | unsigned long s2; |
| 32 | unsigned long s3; |
| 33 | unsigned long s4; |
| 34 | unsigned long s5; |
| 35 | unsigned long s6; |
| 36 | unsigned long s7; |
| 37 | unsigned long s8; |
| 38 | unsigned long s9; |
| 39 | unsigned long s10; |
| 40 | unsigned long s11; |
| 41 | unsigned long t3; |
| 42 | unsigned long t4; |
| 43 | unsigned long t5; |
| 44 | unsigned long t6; |
| 45 | /* Supervisor CSRs */ |
| 46 | unsigned long sstatus; |
| 47 | unsigned long sbadaddr; |
| 48 | unsigned long scause; |
| 49 | }; |
| 50 | |
| 51 | #ifdef CONFIG_64BIT |
| 52 | #define REG_FMT "%016lx" |
| 53 | #else |
| 54 | #define REG_FMT "%08lx" |
| 55 | #endif |
| 56 | |
| 57 | #define user_mode(regs) (((regs)->sstatus & SR_PS) == 0) |
| 58 | |
| 59 | /* Helpers for working with the instruction pointer */ |
| 60 | #define GET_IP(regs) ((regs)->sepc) |
| 61 | #define SET_IP(regs, val) (GET_IP(regs) = (val)) |
| 62 | |
| 63 | static inline unsigned long instruction_pointer(struct pt_regs *regs) |
| 64 | { |
| 65 | return GET_IP(regs); |
| 66 | } |
| 67 | |
| 68 | static inline void instruction_pointer_set(struct pt_regs *regs, |
| 69 | unsigned long val) |
| 70 | { |
| 71 | SET_IP(regs, val); |
| 72 | } |
| 73 | |
| 74 | #define profile_pc(regs) instruction_pointer(regs) |
| 75 | |
| 76 | /* Helpers for working with the user stack pointer */ |
| 77 | #define GET_USP(regs) ((regs)->sp) |
| 78 | #define SET_USP(regs, val) (GET_USP(regs) = (val)) |
| 79 | |
| 80 | static inline unsigned long user_stack_pointer(struct pt_regs *regs) |
| 81 | { |
| 82 | return GET_USP(regs); |
| 83 | } |
| 84 | |
| 85 | static inline void user_stack_pointer_set(struct pt_regs *regs, |
| 86 | unsigned long val) |
| 87 | { |
| 88 | SET_USP(regs, val); |
| 89 | } |
| 90 | |
| 91 | /* Helpers for working with the frame pointer */ |
| 92 | #define GET_FP(regs) ((regs)->s0) |
| 93 | #define SET_FP(regs, val) (GET_FP(regs) = (val)) |
| 94 | |
| 95 | static inline unsigned long frame_pointer(struct pt_regs *regs) |
| 96 | { |
| 97 | return GET_FP(regs); |
| 98 | } |
| 99 | |
| 100 | static inline void frame_pointer_set(struct pt_regs *regs, |
| 101 | unsigned long val) |
| 102 | { |
| 103 | SET_FP(regs, val); |
| 104 | } |
| 105 | |
| 106 | #endif /* __ASM_RISCV_PTRACE_H */ |