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git01.mediatek.com / filogic / uboot / 6bb92fcf7d2fea2314d616e5e2391a8bf2b0fdfa / . / Bindings / net / wireless / qcom,ath10k.yaml
blob: 9b3ef4bc373258be8037f51e713cf798fd233bd5 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies ath10k wireless devices
8
9maintainers:
10 - Kalle Valo <kvalo@kernel.org>
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame^]11 - Jeff Johnson <jjohnson@kernel.org>
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]12
13description:
14 Qualcomm Technologies, Inc. IEEE 802.11ac devices.
15
16properties:
17 compatible:
18 enum:
19 - qcom,ath10k # SDIO-based devices
20 - qcom,ipq4019-wifi
21 - qcom,wcn3990-wifi # SNoC-based devices
22
23 reg:
24 maxItems: 1
25
26 reg-names:
27 items:
28 - const: membase
29
30 interrupts:
31 minItems: 12
32 maxItems: 17
33
34 interrupt-names:
35 minItems: 12
36 maxItems: 17
37
38 memory-region:
39 maxItems: 1
40 description:
41 Reference to the MSA memory region used by the Wi-Fi firmware
42 running on the Q6 core.
43
44 iommus:
45 minItems: 1
46 maxItems: 2
47
48 clocks:
49 minItems: 1
50 maxItems: 3
51
52 clock-names:
53 minItems: 1
54 maxItems: 3
55
56 resets:
57 maxItems: 6
58
59 reset-names:
60 items:
61 - const: wifi_cpu_init
62 - const: wifi_radio_srif
63 - const: wifi_radio_warm
64 - const: wifi_radio_cold
65 - const: wifi_core_warm
66 - const: wifi_core_cold
67
68 ext-fem-name:
69 $ref: /schemas/types.yaml#/definitions/string
70 description: Name of external front end module used.
71 enum:
72 - microsemi-lx5586
73 - sky85703-11
74 - sky85803
75
76 wifi-firmware:
77 type: object
78 additionalProperties: false
79 description: |
80 The ath10k Wi-Fi node can contain one optional firmware subnode.
81 Firmware subnode is needed when the platform does not have Trustzone.
82 properties:
83 iommus:
84 maxItems: 1
85 required:
86 - iommus
87
88 ieee80211-freq-limit: true
89
90 qcom,ath10k-calibration-data:
91 $ref: /schemas/types.yaml#/definitions/uint8-array
92 description:
93 Calibration data + board-specific data as a byte array. The length
94 can vary between hardware versions.
95
96 qcom,ath10k-calibration-variant:
97 $ref: /schemas/types.yaml#/definitions/string
98 description:
99 Unique variant identifier of the calibration data in board-2.bin
100 for designs with colliding bus and device specific ids
101
102 qcom,ath10k-pre-calibration-data:
103 $ref: /schemas/types.yaml#/definitions/uint8-array
104 description:
105 Pre-calibration data as a byte array. The length can vary between
106 hardware versions.
107
108 qcom,coexist-support:
109 $ref: /schemas/types.yaml#/definitions/uint8
110 enum: [0, 1]
111 description:
112 Indicate coex support by the hardware.
113
114 qcom,coexist-gpio-pin:
115 $ref: /schemas/types.yaml#/definitions/uint32
116 description:
117 COEX GPIO number provided to the Wi-Fi firmware.
118
119 qcom,msa-fixed-perm:
120 type: boolean
121 description:
122 Whether to skip executing an SCM call that reassigns the memory
123 region ownership.
124
125 qcom,smem-states:
126 $ref: /schemas/types.yaml#/definitions/phandle-array
127 description: State bits used by the AP to signal the WLAN Q6.
128 items:
129 - description: Signal bits used to enable/disable low power mode
130 on WCN in the case of WoW (Wake on Wireless).
131
132 qcom,smem-state-names:
133 description: The names of the state bits used for SMP2P output.
134 items:
135 - const: wlan-smp2p-out
136
137 qcom,snoc-host-cap-8bit-quirk:
138 type: boolean
139 description:
140 Quirk specifying that the firmware expects the 8bit version
141 of the host capability QMI request
142
143 qcom,xo-cal-data:
144 $ref: /schemas/types.yaml#/definitions/uint32
145 description:
146 XO cal offset to be configured in XO trim register.
147
148 vdd-0.8-cx-mx-supply:
149 description: Main logic power rail
150
151 vdd-1.8-xo-supply:
152 description: Crystal oscillator supply
153
154 vdd-1.3-rfa-supply:
155 description: RFA supply
156
157 vdd-3.3-ch0-supply:
158 description: Primary Wi-Fi antenna supply
159
160 vdd-3.3-ch1-supply:
161 description: Secondary Wi-Fi antenna supply
162
163required:
164 - compatible
165 - reg
166
167additionalProperties: false
168
169allOf:
170 - $ref: ieee80211.yaml#
171 - if:
172 properties:
173 compatible:
174 contains:
175 enum:
176 - qcom,ipq4019-wifi
177 then:
178 properties:
179 interrupts:
180 minItems: 17
181 maxItems: 17
182
183 interrupt-names:
184 items:
185 - const: msi0
186 - const: msi1
187 - const: msi2
188 - const: msi3
189 - const: msi4
190 - const: msi5
191 - const: msi6
192 - const: msi7
193 - const: msi8
194 - const: msi9
195 - const: msi10
196 - const: msi11
197 - const: msi12
198 - const: msi13
199 - const: msi14
200 - const: msi15
201 - const: legacy
202
203 clocks:
204 items:
205 - description: Wi-Fi command clock
206 - description: Wi-Fi reference clock
207 - description: Wi-Fi RTC clock
208
209 clock-names:
210 items:
211 - const: wifi_wcss_cmd
212 - const: wifi_wcss_ref
213 - const: wifi_wcss_rtc
214
215 required:
216 - clocks
217 - clock-names
218 - interrupts
219 - interrupt-names
220 - resets
221 - reset-names
222
223 - if:
224 properties:
225 compatible:
226 contains:
227 enum:
228 - qcom,wcn3990-wifi
229
230 then:
231 properties:
232 clocks:
233 minItems: 1
234 items:
235 - description: XO reference clock
236 - description: Qualcomm Debug Subsystem clock
237
238 clock-names:
239 minItems: 1
240 items:
241 - const: cxo_ref_clk_pin
242 - const: qdss
243
244 interrupts:
245 items:
246 - description: CE0
247 - description: CE1
248 - description: CE2
249 - description: CE3
250 - description: CE4
251 - description: CE5
252 - description: CE6
253 - description: CE7
254 - description: CE8
255 - description: CE9
256 - description: CE10
257 - description: CE11
258
259 interrupt-names: false
260
261 required:
262 - interrupts
263
264examples:
265 # SNoC
266 - |
267 #include <dt-bindings/clock/qcom,rpmcc.h>
268 #include <dt-bindings/interrupt-controller/arm-gic.h>
269
270 wifi@18800000 {
271 compatible = "qcom,wcn3990-wifi";
272 reg = <0x18800000 0x800000>;
273 reg-names = "membase";
274 memory-region = <&wlan_msa_mem>;
275 clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
276 clock-names = "cxo_ref_clk_pin";
277 interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
289 iommus = <&anoc2_smmu 0x1900>,
290 <&anoc2_smmu 0x1901>;
291 qcom,snoc-host-cap-8bit-quirk;
292 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
293 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
294 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
295 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
296 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
297
298 wifi-firmware {
299 iommus = <&apps_smmu 0x1c02 0x1>;
300 };
301 };
302
303 # AHB
304 - |
305 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
306
307 wifi@a000000 {
308 compatible = "qcom,ipq4019-wifi";
309 reg = <0xa000000 0x200000>;
310 resets = <&gcc WIFI0_CPU_INIT_RESET>,
311 <&gcc WIFI0_RADIO_SRIF_RESET>,
312 <&gcc WIFI0_RADIO_WARM_RESET>,
313 <&gcc WIFI0_RADIO_COLD_RESET>,
314 <&gcc WIFI0_CORE_WARM_RESET>,
315 <&gcc WIFI0_CORE_COLD_RESET>;
316 reset-names = "wifi_cpu_init",
317 "wifi_radio_srif",
318 "wifi_radio_warm",
319 "wifi_radio_cold",
320 "wifi_core_warm",
321 "wifi_core_cold";
322 clocks = <&gcc GCC_WCSS2G_CLK>,
323 <&gcc GCC_WCSS2G_REF_CLK>,
324 <&gcc GCC_WCSS2G_RTC_CLK>;
325 clock-names = "wifi_wcss_cmd",
326 "wifi_wcss_ref",
327 "wifi_wcss_rtc";
328 interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
329 <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
330 <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
331 <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
332 <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
333 <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
334 <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
335 <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
336 <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
337 <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
338 <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
339 <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
340 <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
341 <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
342 <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
343 <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
344 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
345 interrupt-names = "msi0",
346 "msi1",
347 "msi2",
348 "msi3",
349 "msi4",
350 "msi5",
351 "msi6",
352 "msi7",
353 "msi8",
354 "msi9",
355 "msi10",
356 "msi11",
357 "msi12",
358 "msi13",
359 "msi14",
360 "msi15",
361 "legacy";
362 ieee80211-freq-limit = <5470000 5875000>;
363 };