Nobuhiro Iwamatsu | 5b6918e | 2008-08-31 22:48:33 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| 3 | * Copyright (C) 2008 Renesas Solutions Corp. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
| 26 | #include <asm/processor.h> |
| 27 | #include <asm/io.h> |
| 28 | |
| 29 | #define STBCR4 0xFFFE040C |
| 30 | #define cmt_clock_enable() do {\ |
| 31 | writeb(readb(STBCR4) & ~0x04, STBCR4);\ |
| 32 | } while (0) |
| 33 | #define scif0_enable() do {\ |
| 34 | writeb(readb(STBCR4) & ~0x80, STBCR4);\ |
| 35 | } while (0) |
| 36 | |
| 37 | int checkcpu(void) |
| 38 | { |
| 39 | #if defined(CONFIG_SH2A) |
| 40 | puts("CPU: SH2A\n"); |
| 41 | #else |
| 42 | puts("CPU: SH2\n"); |
| 43 | #endif |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | int cpu_init(void) |
| 48 | { |
| 49 | /* SCIF enable */ |
| 50 | scif0_enable(); |
| 51 | /* CMT clock enable */ |
| 52 | cmt_clock_enable() ; |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | int cleanup_before_linux(void) |
| 57 | { |
| 58 | disable_interrupts(); |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 63 | { |
| 64 | disable_interrupts(); |
| 65 | reset_cpu(0); |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | void flush_cache(unsigned long addr, unsigned long size) |
| 70 | { |
| 71 | |
| 72 | } |
| 73 | |
| 74 | void icache_enable(void) |
| 75 | { |
| 76 | } |
| 77 | |
| 78 | void icache_disable(void) |
| 79 | { |
| 80 | } |
| 81 | |
| 82 | int icache_status(void) |
| 83 | { |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | void dcache_enable(void) |
| 88 | { |
| 89 | } |
| 90 | |
| 91 | void dcache_disable(void) |
| 92 | { |
| 93 | } |
| 94 | |
| 95 | int dcache_status(void) |
| 96 | { |
| 97 | return 0; |
| 98 | } |