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Priyanka Jainfd45ca02018-11-28 13:04:27 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __LX2_RDB_H
7#define __LX2_RDB_H
8
9#include "lx2160a_common.h"
10
11/* Qixis */
12#define QIXIS_XMAP_MASK 0x07
13#define QIXIS_XMAP_SHIFT 5
14#define QIXIS_RST_CTL_RESET_EN 0x30
15#define QIXIS_LBMAP_DFLTBANK 0x00
16#define QIXIS_LBMAP_ALTBANK 0x20
17#define QIXIS_LBMAP_QSPI 0x00
18#define QIXIS_RCW_SRC_QSPI 0xff
19#define QIXIS_RST_CTL_RESET 0x31
20#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
21#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
22#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
23#define QIXIS_LBMAP_MASK 0x0f
24#define QIXIS_LBMAP_SD
25#define QIXIS_RCW_SRC_SD 0x08
26#define NON_EXTENDED_DUTCFG
27
28/* VID */
29
30#define I2C_MUX_CH_VOL_MONITOR 0xA
31/* Voltage monitor on channel 2*/
32#define I2C_VOL_MONITOR_ADDR 0x63
33#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
34#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
35#define I2C_VOL_MONITOR_BUS_V_SHIFT 3
36#define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv"
37#define CONFIG_VID
38
39/* The lowest and highest voltage allowed*/
40#define VDD_MV_MIN 775
41#define VDD_MV_MAX 855
42
43/* PM Bus commands code for LTC3882*/
44#define PMBUS_CMD_PAGE 0x0
45#define PMBUS_CMD_READ_VOUT 0x8B
46#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
47#define PMBUS_CMD_VOUT_COMMAND 0x21
48#define PWM_CHANNEL0 0x0
49
50#define CONFIG_VOL_MONITOR_LTC3882_SET
51#define CONFIG_VOL_MONITOR_LTC3882_READ
52
53/* RTC */
54#define CONFIG_SYS_RTC_BUS_NUM 4
55
56/* MAC/PHY configuration */
57#if defined(CONFIG_FSL_MC_ENET)
58#define CONFIG_MII
59#define CONFIG_ETHPRIME "DPMAC1@xgmii"
60
61#define AQR107_PHY_ADDR1 0x04
62#define AQR107_PHY_ADDR2 0x05
Florin Chiculitad90d5062019-04-22 11:57:47 +030063#define AQR107_IRQ_MASK 0x0C
Priyanka Jainfd45ca02018-11-28 13:04:27 +000064
65#define CORTINA_NO_FW_UPLOAD
66#define CORTINA_PHY_ADDR1 0x0
67#define INPHI_PHY_ADDR1 0x0
68
69#define RGMII_PHY_ADDR1 0x01
70#define RGMII_PHY_ADDR2 0x02
71
72#endif
73
Meenakshi Aggarwal936a68d2018-11-30 22:32:12 +053074/* EMC2305 */
75#define I2C_MUX_CH_EMC2305 0x09
76#define I2C_EMC2305_ADDR 0x4D
77#define I2C_EMC2305_CMD 0x40
78#define I2C_EMC2305_PWM 0x80
79
Priyanka Jainfd45ca02018-11-28 13:04:27 +000080/* EEPROM */
81#define CONFIG_ID_EEPROM
82#define CONFIG_SYS_I2C_EEPROM_NXID
83#define CONFIG_SYS_EEPROM_BUS_NUM 0
84#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
85#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
86#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
87#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
88
89/* Initial environment variables */
90#define CONFIG_EXTRA_ENV_SETTINGS \
Priyanka Jain16744062019-01-24 05:22:18 +000091 EXTRA_ENV_SETTINGS \
Priyanka Jainfd45ca02018-11-28 13:04:27 +000092 "lx2160ardb_vdd_mv=800\0" \
Priyanka Jain16744062019-01-24 05:22:18 +000093 "BOARD=lx2160ardb\0" \
94 "xspi_bootcmd=echo Trying load from flexspi..;" \
95 "sf probe 0:0 && sf read $load_addr " \
96 "$kernel_start $kernel_size ; env exists secureboot &&" \
97 "sf read $kernelheader_addr_r $kernelheader_start " \
98 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
99 " bootm $load_addr#$BOARD\0" \
100 "sd_bootcmd=echo Trying load from sd card..;" \
101 "mmcinfo; mmc read $load_addr " \
102 "$kernel_addr_sd $kernel_size_sd ;" \
103 "env exists secureboot && mmc read $kernelheader_addr_r "\
104 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
105 " && esbc_validate ${kernelheader_addr_r};" \
106 "bootm $load_addr#$BOARD\0"
Priyanka Jainfd45ca02018-11-28 13:04:27 +0000107
108#include <asm/fsl_secure_boot.h>
109
110#endif /* __LX2_RDB_H */