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Jagan Teki8466c3e2023-02-17 17:28:37 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Radxa Limited
4 * Copyright (c) 2022 Amarula Solutions(India)
5 */
6
7/dts-v1/;
8#include <dt-bindings/soc/rockchip,vop2.h>
9#include "rk3566.dtsi"
10#include "rk3566-radxa-cm3.dtsi"
11
12/ {
13 model = "Radxa Compute Module 3(CM3) IO Board";
14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
15
16 aliases {
17 mmc1 = &sdmmc0;
18 };
19
20 chosen: chosen {
21 stdout-path = "serial2:1500000n8";
22 };
23
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
28 #clock-cells = <0>;
29 };
30
31 hdmi-con {
32 compatible = "hdmi-connector";
33 type = "a";
34
35 port {
36 hdmi_con_in: endpoint {
37 remote-endpoint = <&hdmi_out_con>;
38 };
39 };
40 };
41
42 leds {
43 compatible = "gpio-leds";
44
45 led-1 {
46 gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
47 color = <LED_COLOR_ID_GREEN>;
48 function = LED_FUNCTION_ACTIVITY;
49 linux,default-trigger = "heartbeat";
50 pinctrl-names = "default";
51 pinctrl-0 = <&pi_nled_activity>;
52 };
53 };
54
55 vcc5v0_usb30: vcc5v0-usb30-regulator {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc5v0_usb30";
58 enable-active-high;
59 gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&vcc5v0_usb30_en_h>;
62 regulator-always-on;
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 vin-supply = <&vcc_sys>;
66 };
67
68 vcca1v8_image: vcca1v8-image-regulator {
69 compatible = "regulator-fixed";
70 regulator-name = "vcca1v8_image";
71 regulator-always-on;
72 regulator-boot-on;
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <1800000>;
75 vin-supply = <&vcc_1v8_p>;
76 };
77
78 vdda0v9_image: vdda0v9-image-regulator {
79 compatible = "regulator-fixed";
80 regulator-name = "vcca0v9_image";
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <900000>;
84 regulator-max-microvolt = <900000>;
85 vin-supply = <&vdda_0v9>;
86 };
87};
88
89&combphy1 {
90 status = "okay";
91};
92
93&gmac1 {
94 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
95 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
96 assigned-clock-rates = <0>, <125000000>;
97 clock_in_out = "input";
98 phy-handle = <&rgmii_phy1>;
99 phy-mode = "rgmii";
100 pinctrl-names = "default";
101 pinctrl-0 = <&gmac1m0_miim
102 &gmac1m0_tx_bus2
103 &gmac1m0_rx_bus2
104 &gmac1m0_rgmii_clk
105 &gmac1m0_rgmii_bus
106 &gmac1m0_clkinout>;
107 snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
108 snps,reset-active-low;
109 /* Reset time is 20ms, 100ms for rtl8211f */
110 snps,reset-delays-us = <0 20000 100000>;
111 tx_delay = <0x46>;
112 rx_delay = <0x2e>;
113 status = "okay";
114};
115
116&hdmi {
117 avdd-0v9-supply = <&vdda0v9_image>;
118 avdd-1v8-supply = <&vcca1v8_image>;
119 status = "okay";
120};
121
122&hdmi_in {
123 hdmi_in_vp0: endpoint {
124 remote-endpoint = <&vp0_out_hdmi>;
125 };
126};
127
128&hdmi_out {
129 hdmi_out_con: endpoint {
130 remote-endpoint = <&hdmi_con_in>;
131 };
132};
133
134&hdmi_sound {
135 status = "okay";
136};
137
138&mdio1 {
139 rgmii_phy1: ethernet-phy@0 {
140 compatible="ethernet-phy-ieee802.3-c22";
141 reg= <0x0>;
142 };
143};
144
145&pinctrl {
146 gmac1 {
147 gmac1m0_miim: gmac1m0-miim {
148 rockchip,pins =
149 /* gmac1_mdcm0 */
150 <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
151 /* gmac1_mdiom0 */
152 <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
153 };
154
155 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
156 rockchip,pins =
157 /* gmac1_rxd0m0 */
158 <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
159 /* gmac1_rxd1m0 */
160 <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
161 /* gmac1_rxdvcrsm0 */
162 <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
163 };
164
165 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
166 rockchip,pins =
167 /* gmac1_txd0m0 */
168 <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
169 /* gmac1_txd1m0 */
170 <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
171 /* gmac1_txenm0 */
172 <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
173 };
174
175 gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
176 rockchip,pins =
177 /* gmac1_rxclkm0 */
178 <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
179 /* gmac1_txclkm0 */
180 <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
181 };
182
183 gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
184 rockchip,pins =
185 /* gmac1_rxd2m0 */
186 <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
187 /* gmac1_rxd3m0 */
188 <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
189 /* gmac1_txd2m0 */
190 <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
191 /* gmac1_txd3m0 */
192 <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
193 };
194
195 gmac1m0_clkinout: gmac1m0-clkinout {
196 rockchip,pins =
197 /* gmac1_mclkinoutm0 */
198 <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
199 };
200 };
201
202 leds {
203 pi_nled_activity: pi-nled-activity {
204 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
205 };
206 };
207
208 sdcard {
209 sdmmc_pwren: sdmmc-pwren {
210 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
211 };
212 };
213
214 usb {
215 vcc5v0_usb30_en_h: vcc5v0-host-en-h {
216 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
217 };
218 };
219};
220
221&sdmmc0 {
222 bus-width = <4>;
223 cap-mmc-highspeed;
224 cap-sd-highspeed;
225 disable-wp;
226 vqmmc-supply = <&vccio_sd>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>;
229 status = "okay";
230};
231
232&uart2 {
233 status = "okay";
234};
235
236&usb2phy0_host {
237 phy-supply = <&vcc5v0_usb30>;
238 status = "okay";
239};
240
241&usb2phy1_host {
242 status = "okay";
243};
244
245&usb2phy1_otg {
246 status = "okay";
247};
248
249&usb_host0_ehci {
250 status = "okay";
251};
252
253&usb_host1_xhci {
254 status = "okay";
255};
256
Jonas Karlman451e4bb2023-07-28 11:53:06 +0000257&usb2phy0_otg {
258 status = "okay";
259};
260
261&usb_host0_xhci {
262 status = "okay";
263};
264
Jagan Teki8466c3e2023-02-17 17:28:37 +0530265&vop {
266 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
267 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
268 status = "okay";
269};
270
271&vop_mmu {
272 status = "okay";
273};
274
275&vp0 {
276 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
277 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
278 remote-endpoint = <&hdmi_in_vp0>;
279 };
280};