Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 1 | # |
| 2 | # PINCTRL infrastructure and drivers |
| 3 | # |
| 4 | |
| 5 | menu "Pin controllers" |
| 6 | |
| 7 | config PINCTRL |
| 8 | bool "Support pin controllers" |
| 9 | depends on DM |
| 10 | help |
| 11 | This enables the basic support for pinctrl framework. You may want |
| 12 | to enable some more options depending on what you want to do. |
| 13 | |
| 14 | config PINCTRL_FULL |
| 15 | bool "Support full pin controllers" |
| 16 | depends on PINCTRL && OF_CONTROL |
| 17 | default y |
| 18 | help |
| 19 | This provides Linux-compatible device tree interface for the pinctrl |
| 20 | subsystem. This feature depends on device tree configuration because |
| 21 | it parses a device tree to look for the pinctrl device which the |
| 22 | peripheral device is associated with. |
| 23 | |
| 24 | If this option is disabled (it is the only possible choice for non-DT |
| 25 | boards), the pinctrl core provides no systematic mechanism for |
| 26 | identifying peripheral devices, applying needed pinctrl settings. |
| 27 | It is totally up to the implementation of each low-level driver. |
| 28 | You can save memory footprint in return for some limitations. |
| 29 | |
| 30 | config PINCTRL_GENERIC |
| 31 | bool "Support generic pin controllers" |
| 32 | depends on PINCTRL_FULL |
| 33 | default y |
| 34 | help |
| 35 | Say Y here if you want to use the pinctrl subsystem through the |
| 36 | generic DT interface. If enabled, some functions become available |
| 37 | to parse common properties such as "pins", "groups", "functions" and |
| 38 | some pin configuration parameters. It would be easier if you only |
| 39 | need the generic DT interface for pin muxing and pin configuration. |
| 40 | If you need to handle vendor-specific DT properties, you can disable |
| 41 | this option and implement your own set_state callback in the pinctrl |
| 42 | operations. |
| 43 | |
| 44 | config PINMUX |
| 45 | bool "Support pin multiplexing controllers" |
| 46 | depends on PINCTRL_GENERIC |
| 47 | default y |
| 48 | help |
| 49 | This option enables pin multiplexing through the generic pinctrl |
Marek BehĂșn | 44f62e9 | 2018-03-02 09:56:00 +0100 | [diff] [blame] | 50 | framework. Most SoCs have their own multiplexing arrangement where |
| 51 | a single pin can be used for several functions. An SoC pinctrl driver |
| 52 | allows the required function to be selected for each pin. |
Simon Glass | 8d6510d | 2015-08-30 16:55:12 -0600 | [diff] [blame] | 53 | The driver is typically controlled by the device tree. |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 54 | |
| 55 | config PINCONF |
| 56 | bool "Support pin configuration controllers" |
| 57 | depends on PINCTRL_GENERIC |
| 58 | help |
| 59 | This option enables pin configuration through the generic pinctrl |
| 60 | framework. |
| 61 | |
Patrick Delaunay | bcdb104 | 2019-08-02 14:48:00 +0200 | [diff] [blame] | 62 | config PINCONF_RECURSIVE |
| 63 | bool "Support recursive binding for pin configuration nodes" |
| 64 | depends on PINCTRL_FULL |
| 65 | default n if ARCH_STM32MP |
| 66 | default y |
| 67 | help |
| 68 | In the Linux pinctrl binding, the pin configuration nodes need not be |
| 69 | direct children of the pin controller device (may be grandchildren for |
| 70 | example). It is define is each individual pin controller device. |
| 71 | Say Y here if you want to keep this behavior with the pinconfig |
Yuan Fang | 973a979 | 2021-09-08 19:06:48 +0800 | [diff] [blame] | 72 | u-class: all sub are recursively bounded. |
Patrick Delaunay | bcdb104 | 2019-08-02 14:48:00 +0200 | [diff] [blame] | 73 | If the option is disabled, this behavior is deactivated and only |
| 74 | the direct children of pin controller will be assumed as pin |
| 75 | configuration; you can save memory footprint when this feature is |
| 76 | no needed. |
| 77 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 78 | config SPL_PINCTRL |
Philipp Tomsich | 2b1c204 | 2017-07-26 12:27:42 +0200 | [diff] [blame] | 79 | bool "Support pin controllers in SPL" |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 80 | depends on SPL && SPL_DM |
| 81 | help |
| 82 | This option is an SPL-variant of the PINCTRL option. |
| 83 | See the help of PINCTRL for details. |
| 84 | |
Simon Glass | 5edf3f3 | 2019-12-06 21:41:45 -0700 | [diff] [blame] | 85 | config TPL_PINCTRL |
| 86 | bool "Support pin controllers in TPL" |
| 87 | depends on TPL && TPL_DM |
| 88 | help |
| 89 | This option is an TPL variant of the PINCTRL option. |
| 90 | See the help of PINCTRL for details. |
| 91 | |
Simon Glass | e7ca7da | 2022-04-30 00:56:53 -0600 | [diff] [blame] | 92 | config VPL_PINCTRL |
| 93 | bool "Support pin controllers in VPL" |
| 94 | depends on VPL && VPL_DM |
| 95 | help |
| 96 | This option is an VPL variant of the PINCTRL option. |
| 97 | See the help of PINCTRL for details. |
| 98 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 99 | config SPL_PINCTRL_FULL |
| 100 | bool "Support full pin controllers in SPL" |
| 101 | depends on SPL_PINCTRL && SPL_OF_CONTROL |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 102 | default n if TARGET_STM32F746_DISCO |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 103 | default y |
| 104 | help |
Simon Glass | e7ca7da | 2022-04-30 00:56:53 -0600 | [diff] [blame] | 105 | This option is an SPL variant of the PINCTRL_FULL option. |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 106 | See the help of PINCTRL_FULL for details. |
| 107 | |
Simon Glass | 5edf3f3 | 2019-12-06 21:41:45 -0700 | [diff] [blame] | 108 | config TPL_PINCTRL_FULL |
| 109 | bool "Support full pin controllers in TPL" |
| 110 | depends on TPL_PINCTRL && TPL_OF_CONTROL |
| 111 | help |
Simon Glass | e7ca7da | 2022-04-30 00:56:53 -0600 | [diff] [blame] | 112 | This option is a TPL variant of the PINCTRL_FULL option. |
| 113 | See the help of PINCTRL_FULL for details. |
| 114 | |
| 115 | config VPL_PINCTRL_FULL |
| 116 | bool "Support full pin controllers in VPL" |
| 117 | depends on VPL_PINCTRL && VPL_OF_CONTROL |
| 118 | help |
| 119 | This option is a VPL variant of the PINCTRL_FULL option. |
Simon Glass | 5edf3f3 | 2019-12-06 21:41:45 -0700 | [diff] [blame] | 120 | See the help of PINCTRL_FULL for details. |
| 121 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 122 | config SPL_PINCTRL_GENERIC |
| 123 | bool "Support generic pin controllers in SPL" |
| 124 | depends on SPL_PINCTRL_FULL |
| 125 | default y |
| 126 | help |
| 127 | This option is an SPL-variant of the PINCTRL_GENERIC option. |
| 128 | See the help of PINCTRL_GENERIC for details. |
| 129 | |
Quentin Schulz | 22980e4 | 2024-11-06 12:29:41 +0100 | [diff] [blame] | 130 | config TPL_PINCTRL_GENERIC |
| 131 | bool "Support generic pin controllers in TPL" |
| 132 | depends on TPL_PINCTRL_FULL |
| 133 | default y |
| 134 | help |
| 135 | This option is a TPL-variant of the PINCTRL_GENERIC option. |
| 136 | See the help of PINCTRL_GENERIC for details. |
| 137 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 138 | config SPL_PINMUX |
| 139 | bool "Support pin multiplexing controllers in SPL" |
| 140 | depends on SPL_PINCTRL_GENERIC |
| 141 | default y |
| 142 | help |
| 143 | This option is an SPL-variant of the PINMUX option. |
| 144 | See the help of PINMUX for details. |
Simon Glass | 8d6510d | 2015-08-30 16:55:12 -0600 | [diff] [blame] | 145 | The pinctrl subsystem can add a substantial overhead to the SPL |
| 146 | image since it typically requires quite a few tables either in the |
| 147 | driver or in the device tree. If this is acceptable and you need |
| 148 | to adjust pin multiplexing in SPL in order to boot into U-Boot, |
| 149 | enable this option. You will need to enable device tree in SPL |
| 150 | for this to work. |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 151 | |
| 152 | config SPL_PINCONF |
| 153 | bool "Support pin configuration controllers in SPL" |
| 154 | depends on SPL_PINCTRL_GENERIC |
| 155 | help |
| 156 | This option is an SPL-variant of the PINCONF option. |
| 157 | See the help of PINCONF for details. |
| 158 | |
Patrick Delaunay | bcdb104 | 2019-08-02 14:48:00 +0200 | [diff] [blame] | 159 | config SPL_PINCONF_RECURSIVE |
| 160 | bool "Support recursive binding for pin configuration nodes in SPL" |
| 161 | depends on SPL_PINCTRL_FULL |
| 162 | default n if ARCH_STM32MP |
| 163 | default y |
| 164 | help |
| 165 | This option is an SPL-variant of the PINCONF_RECURSIVE option. |
| 166 | See the help of PINCONF_RECURSIVE for details. |
| 167 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 168 | if PINCTRL || SPL_PINCTRL |
| 169 | |
Mark Kettenis | c932976 | 2021-11-02 18:21:57 +0100 | [diff] [blame] | 170 | config PINCTRL_APPLE |
| 171 | bool "Apple pinctrl driver" |
| 172 | depends on DM && PINCTRL_GENERIC && ARCH_APPLE |
| 173 | default y |
| 174 | help |
| 175 | Support pin multiplexing on Apple SoCs. |
| 176 | |
| 177 | The driver is controlled by a device tree node which contains |
| 178 | both the GPIO definitions and pin control functions for each |
| 179 | available multiplex function. |
| 180 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 181 | config PINCTRL_AR933X |
Wills Wang | 77ae238 | 2016-03-16 16:59:55 +0800 | [diff] [blame] | 182 | bool "QCA/Athores ar933x pin control driver" |
| 183 | depends on DM && SOC_AR933X |
| 184 | help |
| 185 | Support pin multiplexing control on QCA/Athores ar933x SoCs. |
| 186 | The driver is controlled by a device tree node which contains |
| 187 | both the GPIO definitions and pin control functions for each |
| 188 | available multiplex function. |
| 189 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 190 | config PINCTRL_AT91 |
| 191 | bool "AT91 pinctrl driver" |
| 192 | depends on DM |
| 193 | help |
| 194 | This option is to enable the AT91 pinctrl driver for AT91 PIO |
| 195 | controller. |
| 196 | |
| 197 | AT91 PIO controller is a combined gpio-controller, pin-mux and |
| 198 | pin-config module. Each I/O pin may be dedicated as a general-purpose |
| 199 | I/O or be assigned to a function of an embedded peripheral. Each I/O |
| 200 | pin has a glitch filter providing rejection of glitches lower than |
| 201 | one-half of peripheral clock cycle and a debouncing filter providing |
| 202 | rejection of unwanted pulses from key or push button operations. You |
| 203 | can also control the multi-driver capability, pull-up and pull-down |
| 204 | feature on each I/O pin. |
| 205 | |
| 206 | config PINCTRL_AT91PIO4 |
| 207 | bool "AT91 PIO4 pinctrl driver" |
| 208 | depends on DM |
| 209 | help |
| 210 | This option is to enable the AT91 pinctrl driver for AT91 PIO4 |
| 211 | controller which is available on SAMA5D2 SoC. |
| 212 | |
Simon Glass | 837a66a | 2019-12-06 21:42:53 -0700 | [diff] [blame] | 213 | config PINCTRL_INTEL |
| 214 | bool "Standard Intel pin-control and pin-mux driver" |
| 215 | help |
| 216 | Recent Intel chips such as Apollo Lake (APL) use a common pin control |
| 217 | and GPIO scheme. The settings for this come from an SoC-specific |
| 218 | driver which must be separately enabled. The driver supports setting |
| 219 | pins on start-up and changing the GPIO attributes. |
| 220 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 221 | config PINCTRL_PIC32 |
| 222 | bool "Microchip PIC32 pin-control and pin-mux driver" |
| 223 | depends on DM && MACH_PIC32 |
| 224 | default y |
| 225 | help |
| 226 | Supports individual pin selection and configuration for each |
| 227 | remappable peripheral available on Microchip PIC32 |
| 228 | SoCs. This driver is controlled by a device tree node which |
Chris Packham | 3fede31 | 2019-01-13 22:13:26 +1300 | [diff] [blame] | 229 | contains both GPIO definition and pin control functions. |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 230 | |
| 231 | config PINCTRL_QCA953X |
Wills Wang | a56de4c | 2016-03-16 16:59:56 +0800 | [diff] [blame] | 232 | bool "QCA/Athores qca953x pin control driver" |
| 233 | depends on DM && SOC_QCA953X |
| 234 | help |
| 235 | Support pin multiplexing control on QCA/Athores qca953x SoCs. |
Wills Wang | a56de4c | 2016-03-16 16:59:56 +0800 | [diff] [blame] | 236 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 237 | The driver is controlled by a device tree node which contains both |
| 238 | the GPIO definitions and pin control functions for each available |
| 239 | multiplex function. |
| 240 | |
Heiko Schocher | 3b07a13 | 2020-02-03 10:23:53 +0100 | [diff] [blame] | 241 | config PINCTRL_QE |
| 242 | bool "QE based pinctrl driver, like on mpc83xx" |
| 243 | depends on DM |
| 244 | help |
| 245 | This option is to enable the QE pinctrl driver for QE based io |
| 246 | controller. |
| 247 | |
Andy Yan | 96c3da9 | 2017-06-01 18:00:10 +0800 | [diff] [blame] | 248 | config PINCTRL_ROCKCHIP_RV1108 |
| 249 | bool "Rockchip rv1108 pin control driver" |
| 250 | depends on DM |
| 251 | help |
| 252 | Support pin multiplexing control on Rockchip rv1108 SoC. |
| 253 | |
| 254 | The driver is controlled by a device tree node which contains |
| 255 | both the GPIO definitions and pin control functions for each |
| 256 | available multiplex function. |
| 257 | |
Masahiro Yamada | 0b53a75 | 2015-08-27 12:44:30 +0900 | [diff] [blame] | 258 | config PINCTRL_SANDBOX |
| 259 | bool "Sandbox pinctrl driver" |
| 260 | depends on SANDBOX |
| 261 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 262 | This enables pinctrl driver for sandbox. |
Masahiro Yamada | 0b53a75 | 2015-08-27 12:44:30 +0900 | [diff] [blame] | 263 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 264 | Currently, this driver actually does nothing but print debug |
| 265 | messages when pinctrl operations are invoked. |
| 266 | |
| 267 | config PINCTRL_SINGLE |
| 268 | bool "Single register pin-control and pin-multiplex driver" |
| 269 | depends on DM |
Purna Chandra Mandal | db4fbfc | 2016-01-28 15:30:12 +0530 | [diff] [blame] | 270 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 271 | This enables pinctrl driver for systems using a single register for |
| 272 | pin configuration and multiplexing. TI's AM335X SoCs are examples of |
| 273 | such systems. |
| 274 | |
| 275 | Depending on the platform make sure to also enable OF_TRANSLATE and |
| 276 | eventually SPL_OF_TRANSLATE to get correct address translations. |
Purna Chandra Mandal | db4fbfc | 2016-01-28 15:30:12 +0530 | [diff] [blame] | 277 | |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 278 | config PINCTRL_STI |
| 279 | bool "STMicroelectronics STi pin-control and pin-mux driver" |
| 280 | depends on DM && ARCH_STI |
| 281 | default y |
| 282 | help |
Patrick Delaunay | a6b185e | 2022-05-20 18:38:10 +0200 | [diff] [blame] | 283 | Support pin multiplexing control on STMicroelectronics STi SoCs. |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 284 | |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 285 | The driver is controlled by a device tree node which contains both |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 286 | the GPIO definitions and pin control functions for each available |
| 287 | multiplex function. |
Patrice Chotard | 32cf046 | 2017-02-21 13:37:10 +0100 | [diff] [blame] | 288 | |
Vikas Manocha | 07e9e41 | 2017-02-12 10:25:49 -0800 | [diff] [blame] | 289 | config PINCTRL_STM32 |
| 290 | bool "ST STM32 pin control driver" |
| 291 | depends on DM |
| 292 | help |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 293 | Supports pin multiplexing control on stm32 SoCs. |
Vikas Manocha | 07e9e41 | 2017-02-12 10:25:49 -0800 | [diff] [blame] | 294 | |
Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 295 | The driver is controlled by a device tree node which contains both |
| 296 | the GPIO definitions and pin control functions for each available |
| 297 | multiplex function. |
Felix Brack | 7bc2354 | 2017-03-22 11:26:44 +0100 | [diff] [blame] | 298 | |
Patrick Delaunay | d65291b | 2019-03-11 11:13:15 +0100 | [diff] [blame] | 299 | config PINCTRL_STMFX |
| 300 | bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver" |
| 301 | depends on DM && PINCTRL_FULL |
| 302 | help |
| 303 | I2C driver for STMicroelectronics Multi-Function eXpander (STMFX) |
| 304 | GPIO expander. |
| 305 | Supports pin multiplexing control on stm32 SoCs. |
| 306 | |
| 307 | The driver is controlled by a device tree node which contains both |
| 308 | the GPIO definitions and pin control functions for each available |
| 309 | multiplex function. |
| 310 | |
| 311 | config SPL_PINCTRL_STMFX |
| 312 | bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL" |
| 313 | depends on SPL_PINCTRL_FULL |
| 314 | help |
| 315 | This option is an SPL-variant of the SPL_PINCTRL_STMFX option. |
| 316 | See the help of PINCTRL_STMFX for details. |
| 317 | |
maxims@google.com | 54651aa | 2017-04-17 12:00:27 -0700 | [diff] [blame] | 318 | config ASPEED_AST2500_PINCTRL |
Michal Simek | 8d4e7e2 | 2020-07-23 09:00:40 +0200 | [diff] [blame] | 319 | bool "Aspeed AST2500 pin control driver" |
| 320 | depends on DM && PINCTRL_GENERIC && ASPEED_AST2500 |
| 321 | default y |
| 322 | help |
| 323 | Support pin multiplexing control on Aspeed ast2500 SoC. The driver |
| 324 | uses Generic Pinctrl framework and is compatible with the Linux |
| 325 | driver, i.e. it uses the same device tree configuration. |
maxims@google.com | 54651aa | 2017-04-17 12:00:27 -0700 | [diff] [blame] | 326 | |
Ryan Chen | 1efbd14 | 2021-11-02 10:17:52 +0800 | [diff] [blame] | 327 | config ASPEED_AST2600_PINCTRL |
| 328 | bool "Aspeed AST2600 pin control driver" |
| 329 | depends on DM && PINCTRL_GENERIC && ASPEED_AST2600 |
| 330 | default y |
| 331 | help |
| 332 | Support pin multiplexing control on Aspeed ast2600 SoC. The driver |
| 333 | uses Generic Pinctrl framework and is compatible with the Linux |
| 334 | driver, i.e. it uses the same device tree configuration. |
| 335 | |
Sean Anderson | 087dfce | 2020-09-14 11:01:58 -0400 | [diff] [blame] | 336 | config PINCTRL_K210 |
| 337 | bool "Kendryte K210 Fully-Programmable Input/Output Array driver" |
| 338 | depends on DM && PINCTRL_GENERIC |
| 339 | help |
| 340 | Support pin multiplexing on the K210. The "FPIOA" can remap any |
| 341 | supported function to any multifunctional IO pin. It can also perform |
| 342 | basic GPIO functions, such as reading the current value of a pin. |
Ashok Reddy Soma | 52a3281 | 2022-02-23 15:23:05 +0100 | [diff] [blame] | 343 | |
| 344 | config PINCTRL_ZYNQMP |
| 345 | bool "Xilinx ZynqMP pin control driver" |
| 346 | depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP |
| 347 | default y |
| 348 | help |
| 349 | Support pin multiplexing control on Xilinx ZynqMP. The driver uses |
| 350 | Generic Pinctrl framework and is compatible with the Linux driver, |
| 351 | i.e. it uses the same device tree configuration. |
| 352 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 353 | endif |
| 354 | |
Philipp Tomsich | 126493f | 2019-02-01 15:11:48 +0100 | [diff] [blame] | 355 | source "drivers/pinctrl/broadcom/Kconfig" |
| 356 | source "drivers/pinctrl/exynos/Kconfig" |
Simon Glass | 837a66a | 2019-12-06 21:42:53 -0700 | [diff] [blame] | 357 | source "drivers/pinctrl/intel/Kconfig" |
developer | 84c7a63 | 2018-11-15 10:07:58 +0800 | [diff] [blame] | 358 | source "drivers/pinctrl/mediatek/Kconfig" |
Philipp Tomsich | 126493f | 2019-02-01 15:11:48 +0100 | [diff] [blame] | 359 | source "drivers/pinctrl/meson/Kconfig" |
| 360 | source "drivers/pinctrl/mscc/Kconfig" |
developer | e194781 | 2019-09-25 17:45:26 +0800 | [diff] [blame] | 361 | source "drivers/pinctrl/mtmips/Kconfig" |
Philipp Tomsich | 126493f | 2019-02-01 15:11:48 +0100 | [diff] [blame] | 362 | source "drivers/pinctrl/mvebu/Kconfig" |
Stefan Bosch | be278c1 | 2020-07-10 19:07:30 +0200 | [diff] [blame] | 363 | source "drivers/pinctrl/nexell/Kconfig" |
Jim Liu | d949c12 | 2022-05-17 16:30:32 +0800 | [diff] [blame] | 364 | source "drivers/pinctrl/nuvoton/Kconfig" |
Peng Fan | e2fd36cc | 2016-02-03 10:06:07 +0800 | [diff] [blame] | 365 | source "drivers/pinctrl/nxp/Kconfig" |
Caleb Connolly | 506eb53 | 2023-11-14 12:55:40 +0000 | [diff] [blame] | 366 | source "drivers/pinctrl/qcom/Kconfig" |
Marek Vasut | 3066a06 | 2017-09-15 21:13:55 +0200 | [diff] [blame] | 367 | source "drivers/pinctrl/renesas/Kconfig" |
Philipp Tomsich | 2b19e90 | 2019-02-01 15:15:38 +0100 | [diff] [blame] | 368 | source "drivers/pinctrl/rockchip/Kconfig" |
Samuel Holland | e309502 | 2021-08-12 20:09:43 -0500 | [diff] [blame] | 369 | source "drivers/pinctrl/sunxi/Kconfig" |
Svyatoslav Ryhel | c53f4c0 | 2023-11-26 17:54:03 +0200 | [diff] [blame] | 370 | source "drivers/pinctrl/tegra/Kconfig" |
Masahiro Yamada | 847e618b8 | 2015-09-11 20:17:32 +0900 | [diff] [blame] | 371 | source "drivers/pinctrl/uniphier/Kconfig" |
Kuan Lim Lee | ec2b8f2 | 2023-03-29 11:42:15 +0800 | [diff] [blame] | 372 | source "drivers/pinctrl/starfive/Kconfig" |
Masahiro Yamada | 847e618b8 | 2015-09-11 20:17:32 +0900 | [diff] [blame] | 373 | |
Masahiro Yamada | f8efa63 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 374 | endmenu |