| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 1 | CONFIG_MIPS=y |
| Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=1 |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 7 | CONFIG_ENV_SIZE=0x1000 |
| 8 | CONFIG_ENV_OFFSET=0x30000 |
| 9 | CONFIG_ENV_SECT_SIZE=0x10000 |
| Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 10 | CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" |
| Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 11 | CONFIG_SPL_SERIAL=y |
| Stefan Roese | 1d0f33c | 2020-04-21 09:28:50 +0200 | [diff] [blame] | 12 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 |
| Tom Rini | b9dc684 | 2024-04-22 17:24:09 -0600 | [diff] [blame] | 13 | CONFIG_SPL_BSS_START_ADDR=0x80010000 |
| 14 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 |
| Tom Rini | c427a58 | 2024-10-08 09:18:32 -0600 | [diff] [blame] | 15 | CONFIG_SYS_BOOTM_LEN=0x1000000 |
| Tom Rini | 4b2fcb3 | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 16 | CONFIG_SYS_LOAD_ADDR=0x80010000 |
| Tom Rini | c427a58 | 2024-10-08 09:18:32 -0600 | [diff] [blame] | 17 | CONFIG_SPL=y |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 18 | CONFIG_ARCH_MTMIPS=y |
| developer | 8bc9b69 | 2020-11-12 16:36:00 +0800 | [diff] [blame] | 19 | CONFIG_SOC_MT7628=y |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 20 | CONFIG_BOARD_MT7628_RFB=y |
| Daniel Schwierzeck | ff21b84 | 2022-07-10 17:15:14 +0200 | [diff] [blame] | 21 | CONFIG_SYS_MIPS_TIMER_FREQ=290000000 |
| Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 22 | CONFIG_MIPS_CACHE_SETUP=y |
| 23 | CONFIG_MIPS_CACHE_DISABLE=y |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 24 | CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y |
| 25 | CONFIG_MIPS_BOOT_FDT=y |
| 26 | CONFIG_FIT=y |
| 27 | # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set |
| 28 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| Tom Rini | 4780550 | 2022-05-12 16:45:08 -0400 | [diff] [blame] | 29 | CONFIG_SYS_MALLOC_BOOTPARAMS=y |
| Tom Rini | abb0f52 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 30 | CONFIG_SPL_MAX_SIZE=0x10000 |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 31 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 32 | CONFIG_SPL_NOR_SUPPORT=y |
| 33 | # CONFIG_CMD_ELF is not set |
| 34 | # CONFIG_CMD_XIMG is not set |
| 35 | # CONFIG_CMD_CRC32 is not set |
| 36 | # CONFIG_CMD_DM is not set |
| 37 | CONFIG_CMD_GPIO=y |
| 38 | # CONFIG_CMD_LOADS is not set |
| 39 | CONFIG_CMD_SPI=y |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 40 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 41 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 42 | CONFIG_NET_RANDOM_ETHADDR=y |
| 43 | # CONFIG_INPUT is not set |
| 44 | CONFIG_SPI_FLASH_EON=y |
| 45 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 46 | CONFIG_SPI_FLASH_ISSI=y |
| 47 | CONFIG_SPI_FLASH_MACRONIX=y |
| 48 | CONFIG_SPI_FLASH_SPANSION=y |
| 49 | CONFIG_SPI_FLASH_STMICRO=y |
| 50 | CONFIG_SPI_FLASH_WINBOND=y |
| 51 | CONFIG_SPI_FLASH_XMC=y |
| 52 | CONFIG_MT7628_ETH=y |
| developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 53 | CONFIG_SPI=y |
| 54 | CONFIG_MT7621_SPI=y |
| 55 | CONFIG_LZMA=y |
| 56 | CONFIG_SPL_LZMA=y |