blob: 719b9b8e024334d4b60bae29c1c8aa6682834130 [file] [log] [blame]
Patrick Delaunayd6e53c72018-10-26 09:02:52 +02001# SPDX-License-Identifier: GPL-2.0+
Simon Glass36ad2342015-06-23 15:39:15 -06002#
3# Copyright (c) 2015 Google, Inc
4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5#
Simon Glass36ad2342015-06-23 15:39:15 -06006
Anup Patel8d28c3c2019-02-25 08:14:55 +00007obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o
8obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o
9obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
Stephen Warrene8e3f202016-08-08 11:28:24 -060010
Peng Fan5e80d5a2018-10-18 14:28:30 +020011obj-y += imx/
Stephen Warrene8e3f202016-08-08 11:28:24 -060012obj-y += tegra/
Mario Sixd290e272018-01-15 11:06:54 +010013obj-$(CONFIG_ARCH_ASPEED) += aspeed/
developer2186c982018-11-15 10:07:54 +080014obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
Jerome Brunet3da39a82019-02-10 14:54:30 +010015obj-$(CONFIG_ARCH_MESON) += meson/
Mario Sixd290e272018-01-15 11:06:54 +010016obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
Marek Vasut3f9d7352018-07-31 17:58:07 +020017obj-$(CONFIG_ARCH_SOCFPGA) += altera/
Wenyou Yang8c772bd2016-07-20 17:55:12 +080018obj-$(CONFIG_CLK_AT91) += at91/
Marek Behún61d74e82018-04-24 17:21:25 +020019obj-$(CONFIG_CLK_MVEBU) += mvebu/
Álvaro Fernández Rojasc35611c2017-05-07 20:13:01 +020020obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
Paul Burton0399f442016-09-08 07:47:38 +010021obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
Mario Sixd290e272018-01-15 11:06:54 +010022obj-$(CONFIG_CLK_EXYNOS) += exynos/
Eugeniy Paltsev7e1fb092017-12-10 21:20:08 +030023obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
Mario Six7cab1472018-08-06 10:23:36 +020024obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
Manivannan Sadhasivam91a85132018-06-14 23:38:35 +053025obj-$(CONFIG_CLK_OWL) += owl/
Mario Sixd290e272018-01-15 11:06:54 +010026obj-$(CONFIG_CLK_RENESAS) += renesas/
Anup Patel42fdf082019-02-25 08:14:49 +000027obj-$(CONFIG_CLK_SIFIVE) += sifive/
Jagan Teki1d150b42018-12-22 21:32:49 +053028obj-$(CONFIG_ARCH_SUNXI) += sunxi/
Patrice Chotardd4f2d202017-11-15 13:14:48 +010029obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o
Patrick Delaunaye6ab6272018-03-12 10:46:15 +010030obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
Mario Sixd290e272018-01-15 11:06:54 +010031obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
Liviu Dudauba024e62018-09-17 17:50:00 +010032obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
Mario Sixd290e272018-01-15 11:06:54 +010033obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
34obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
Mario Sixa3c07062018-04-27 14:53:15 +020035obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
Mario Sixd290e272018-01-15 11:06:54 +010036obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
37obj-$(CONFIG_SANDBOX) += clk_sandbox.o
38obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
Patrice Chotard5fffeab2017-09-13 18:00:06 +020039obj-$(CONFIG_STM32H7) += clk_stm32h7.o
Andreas Dannenberg1530e352018-08-27 15:57:43 +053040obj-$(CONFIG_CLK_TI_SCI) += clk-ti-sci.o