Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 72b5a8856bcde0eda203c2a0a27a8d4926a14e9f / . / configs / pico-imx8mq_defconfig
blob: f2c342eb8f324b8a5048aaa4b9669c817640a4f9 [file] [log] [blame]
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]3CONFIG_TEXT_BASE=0x40200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x600000
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]5CONFIG_SPL_GPIO=y
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x1000
9CONFIG_ENV_OFFSET=0x400000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]10CONFIG_SYS_I2C_MXC_I2C1=y
11CONFIG_SYS_I2C_MXC_I2C2=y
12CONFIG_SYS_I2C_MXC_I2C3=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]13CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]15CONFIG_SPL_TEXT_BASE=0x7E1000
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]16CONFIG_TARGET_PICO_IMX8MQ=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_DM_RESET=y
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]18CONFIG_SYS_MONITOR_LEN=524288
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]19CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]20CONFIG_SPL_SERIAL=y
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]21CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]22CONFIG_SPL_STACK=0x187ff0
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]23CONFIG_SPL=y
Tom Rinif1b6dda2021-11-07 22:59:45 -0500[diff] [blame]24CONFIG_IMX_BOOTAUX=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]25CONFIG_SYS_LOAD_ADDR=0x40480000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]26CONFIG_REMAKE_ELF=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]27CONFIG_FIT=y
28CONFIG_FIT_EXTERNAL_OFFSET=0x3000
29CONFIG_SPL_LOAD_FIT=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]30CONFIG_OF_SYSTEM_SETUP=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]31CONFIG_USE_BOOTCOMMAND=y
32CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
Tom Rini51876ec2020-06-16 19:06:11 -0400[diff] [blame]33CONFIG_BOARD_EARLY_INIT_F=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]34CONFIG_BOARD_LATE_INIT=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]35CONFIG_SPL_MAX_SIZE=0x1f000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]36CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
37CONFIG_SPL_BSS_START_ADDR=0x180000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]38CONFIG_SPL_BSS_MAX_SIZE=0x2000
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]39CONFIG_SPL_BOARD_INIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]40# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]41CONFIG_SPL_SYS_MALLOC=y
42CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
43CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
44CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]45CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
46CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
Tom Rinid24700f2021-10-30 23:03:56 -0400[diff] [blame]47CONFIG_SPL_I2C=y
48CONFIG_SPL_POWER=y
49CONFIG_SPL_WATCHDOG=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]50CONFIG_HUSH_PARSER=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]51CONFIG_SYS_MAXARGS=64
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]52# CONFIG_BOOTM_NETBSD is not set
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]53CONFIG_SYS_BOOTM_LEN=0x8000000
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]54# CONFIG_CMD_EXPORTENV is not set
55# CONFIG_CMD_IMPORTENV is not set
56# CONFIG_CMD_CRC32 is not set
57CONFIG_CMD_FUSE=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]58CONFIG_CMD_GPIO=y
59CONFIG_CMD_I2C=y
Tom Rini71b46042020-05-21 16:26:03 -0400[diff] [blame]60CONFIG_CMD_MMC=y
Tom Rini32c75d62020-05-26 15:06:18 -0400[diff] [blame]61CONFIG_CMD_DHCP=y
62CONFIG_CMD_MII=y
63CONFIG_CMD_PING=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]64CONFIG_CMD_CACHE=y
65CONFIG_CMD_REGULATOR=y
66CONFIG_CMD_EXT2=y
67CONFIG_CMD_EXT4=y
68CONFIG_CMD_EXT4_WRITE=y
69CONFIG_CMD_FAT=y
70CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]71CONFIG_ENV_OVERWRITE=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]72CONFIG_ENV_IS_IN_MMC=y
73CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]74CONFIG_SYS_MMC_ENV_DEV=1
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]75CONFIG_USE_ETHPRIME=y
76CONFIG_ETHPRIME="FEC"
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]77CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]78CONFIG_MXC_GPIO=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]79CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]80CONFIG_SPL_SYS_I2C_LEGACY=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]81CONFIG_SUPPORT_EMMC_BOOT=y
82CONFIG_FSL_USDHC=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]83CONFIG_PHYLIB=y
84CONFIG_PHY_ATHEROS=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]85CONFIG_PHY_GIGE=y
Tom Rini26a00952021-10-30 23:03:52 -0400[diff] [blame]86CONFIG_FEC_MXC=y
Tom Rinie141f562021-11-07 22:59:42 -0500[diff] [blame]87CONFIG_MII=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]88CONFIG_PINCTRL=y
89CONFIG_PINCTRL_IMX8M=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]90CONFIG_SPL_POWER_LEGACY=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]91CONFIG_POWER_DOMAIN=y
92CONFIG_IMX8M_POWER_DOMAIN=y
93CONFIG_DM_REGULATOR=y
94CONFIG_DM_REGULATOR_FIXED=y
95CONFIG_DM_REGULATOR_GPIO=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]96CONFIG_SPL_POWER_I2C=y
Peng Fana20839e2022-05-05 15:43:40 +0800[diff] [blame]97CONFIG_DM_SERIAL=y
Tom Rinid0193802020-06-09 10:46:46 -0400[diff] [blame]98CONFIG_MXC_UART=y
Marek Vasut0f97ed02020-04-29 20:09:08 +0200[diff] [blame]99CONFIG_DM_THERMAL=y