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wdenkfe8c2802002-11-03 00:38:21 +00001/*
wdenk9ca7bbc2004-10-09 23:25:58 +00002 * MPC823 and PXA LCD Controller
wdenkfe8c2802002-11-03 00:38:21 +00003 *
4 * Modeled after video interface by Paolo Scaffardi
5 *
6 *
7 * (C) Copyright 2001
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk9ca7bbc2004-10-09 23:25:58 +000020 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenkfe8c2802002-11-03 00:38:21 +000021 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef _LCD_H_
30#define _LCD_H_
31
wdenk4e112c12003-06-03 23:54:09 +000032extern char lcd_is_enabled;
33
wdenk9ca7bbc2004-10-09 23:25:58 +000034extern int lcd_line_length;
wdenk9ca7bbc2004-10-09 23:25:58 +000035
Alessandro Rubini465c45a2009-07-19 17:52:27 +020036extern struct vidinfo panel_info;
37
38extern void lcd_ctrl_init (void *lcdbase);
39extern void lcd_enable (void);
Nikita Kiryanove0eba1f2013-01-30 21:39:57 +000040extern int board_splash_screen_prepare(void);
Alessandro Rubini465c45a2009-07-19 17:52:27 +020041
42/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
43extern void lcd_setcolreg (ushort regno,
44 ushort red, ushort green, ushort blue);
45extern void lcd_initcolregs (void);
46
Wolfgang Denk67f53912013-01-05 09:45:48 +000047extern int lcd_getfgcolor(void);
48
Alessandro Rubini465c45a2009-07-19 17:52:27 +020049/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
50extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
Anatolij Gustschin7a49e6f2012-04-27 04:38:06 +000051extern int bmp_display(ulong addr, int x, int y);
wdenk9ca7bbc2004-10-09 23:25:58 +000052
Simon Glassef45ffd2012-10-30 13:40:18 +000053/**
54 * Set whether we need to flush the dcache when changing the LCD image. This
55 * defaults to off.
56 *
57 * @param flush non-zero to flush cache after update, 0 to skip
58 */
59void lcd_set_flush_dcache(int flush);
60
wdenk9ca7bbc2004-10-09 23:25:58 +000061#if defined CONFIG_MPC823
62/*
63 * LCD controller stucture for MPC823 CPU
64 */
65typedef struct vidinfo {
66 ushort vl_col; /* Number of columns (i.e. 640) */
67 ushort vl_row; /* Number of rows (i.e. 480) */
68 ushort vl_width; /* Width of display area in millimeters */
69 ushort vl_height; /* Height of display area in millimeters */
70
71 /* LCD configuration register */
72 u_char vl_clkp; /* Clock polarity */
73 u_char vl_oep; /* Output Enable polarity */
74 u_char vl_hsp; /* Horizontal Sync polarity */
75 u_char vl_vsp; /* Vertical Sync polarity */
76 u_char vl_dp; /* Data polarity */
77 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
78 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
79 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
80 u_char vl_clor; /* Color, 0 = mono, 1 = color */
81 u_char vl_tft; /* 0 = passive, 1 = TFT */
82
83 /* Horizontal control register. Timing from data sheet */
84 ushort vl_wbl; /* Wait between lines */
85
86 /* Vertical control register */
87 u_char vl_vpw; /* Vertical sync pulse width */
88 u_char vl_lcdac; /* LCD AC timing */
89 u_char vl_wbf; /* Wait between frames */
90} vidinfo_t;
91
Marek Vasut85cc88a2011-11-26 07:20:07 +010092#elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
93 defined CONFIG_CPU_MONAHANS
wdenk9ca7bbc2004-10-09 23:25:58 +000094/*
95 * PXA LCD DMA descriptor
96 */
97struct pxafb_dma_descriptor {
98 u_long fdadr; /* Frame descriptor address register */
99 u_long fsadr; /* Frame source address register */
100 u_long fidr; /* Frame ID register */
101 u_long ldcmd; /* Command register */
102};
103
104/*
105 * PXA LCD info
106 */
107struct pxafb_info {
108
109 /* Misc registers */
110 u_long reg_lccr3;
111 u_long reg_lccr2;
112 u_long reg_lccr1;
113 u_long reg_lccr0;
114 u_long fdadr0;
115 u_long fdadr1;
116
117 /* DMA descriptors */
118 struct pxafb_dma_descriptor * dmadesc_fblow;
119 struct pxafb_dma_descriptor * dmadesc_fbhigh;
120 struct pxafb_dma_descriptor * dmadesc_palette;
121
122 u_long screen; /* physical address of frame buffer */
123 u_long palette; /* physical address of palette memory */
124 u_int palette_size;
125};
126
127/*
128 * LCD controller stucture for PXA CPU
129 */
130typedef struct vidinfo {
131 ushort vl_col; /* Number of columns (i.e. 640) */
132 ushort vl_row; /* Number of rows (i.e. 480) */
133 ushort vl_width; /* Width of display area in millimeters */
134 ushort vl_height; /* Height of display area in millimeters */
135
136 /* LCD configuration register */
137 u_char vl_clkp; /* Clock polarity */
138 u_char vl_oep; /* Output Enable polarity */
139 u_char vl_hsp; /* Horizontal Sync polarity */
140 u_char vl_vsp; /* Vertical Sync polarity */
141 u_char vl_dp; /* Data polarity */
142 u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
143 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
144 u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
145 u_char vl_clor; /* Color, 0 = mono, 1 = color */
146 u_char vl_tft; /* 0 = passive, 1 = TFT */
147
148 /* Horizontal control register. Timing from data sheet */
149 ushort vl_hpw; /* Horz sync pulse width */
150 u_char vl_blw; /* Wait before of line */
151 u_char vl_elw; /* Wait end of line */
152
153 /* Vertical control register. */
154 u_char vl_vpw; /* Vertical sync pulse width */
155 u_char vl_bfw; /* Wait before of frame */
156 u_char vl_efw; /* Wait end of frame */
157
158 /* PXA LCD controller params */
159 struct pxafb_info pxa;
160} vidinfo_t;
161
Bo Shen8dd55282012-05-25 00:59:58 +0000162#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
Stelian Popf6f86652008-05-09 21:57:18 +0200163
164typedef struct vidinfo {
Marek Vasut21e69c12011-10-24 23:41:00 +0000165 ushort vl_col; /* Number of columns (i.e. 640) */
166 ushort vl_row; /* Number of rows (i.e. 480) */
Stelian Popf6f86652008-05-09 21:57:18 +0200167 u_long vl_clk; /* pixel clock in ps */
168
169 /* LCD configuration register */
170 u_long vl_sync; /* Horizontal / vertical sync */
171 u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
172 u_long vl_tft; /* 0 = passive, 1 = TFT */
Alexander Stein7fd4ea52010-07-20 08:55:40 +0200173 u_long vl_cont_pol_low; /* contrast polarity is low */
Bo Shen8dd55282012-05-25 00:59:58 +0000174 u_long vl_clk_pol; /* clock polarity */
Stelian Popf6f86652008-05-09 21:57:18 +0200175
176 /* Horizontal control register. */
177 u_long vl_hsync_len; /* Length of horizontal sync */
178 u_long vl_left_margin; /* Time from sync to picture */
179 u_long vl_right_margin; /* Time from picture to sync */
180
181 /* Vertical control register. */
182 u_long vl_vsync_len; /* Length of vertical sync */
183 u_long vl_upper_margin; /* Time from sync to picture */
184 u_long vl_lower_margin; /* Time from picture to sync */
185
186 u_long mmio; /* Memory mapped registers */
187} vidinfo_t;
188
Donghwa Lee0e6f77d2012-04-05 19:36:15 +0000189#elif defined(CONFIG_EXYNOS_FB)
190
191enum {
192 FIMD_RGB_INTERFACE = 1,
193 FIMD_CPU_INTERFACE = 2,
194};
195
Donghwa Lee37980dd2012-05-09 19:23:46 +0000196enum exynos_fb_rgb_mode_t {
197 MODE_RGB_P = 0,
198 MODE_BGR_P = 1,
199 MODE_RGB_S = 2,
200 MODE_BGR_S = 3,
201};
202
Donghwa Lee0e6f77d2012-04-05 19:36:15 +0000203typedef struct vidinfo {
204 ushort vl_col; /* Number of columns (i.e. 640) */
205 ushort vl_row; /* Number of rows (i.e. 480) */
206 ushort vl_width; /* Width of display area in millimeters */
207 ushort vl_height; /* Height of display area in millimeters */
208
209 /* LCD configuration register */
210 u_char vl_freq; /* Frequency */
211 u_char vl_clkp; /* Clock polarity */
212 u_char vl_oep; /* Output Enable polarity */
213 u_char vl_hsp; /* Horizontal Sync polarity */
214 u_char vl_vsp; /* Vertical Sync polarity */
215 u_char vl_dp; /* Data polarity */
216 u_char vl_bpix; /* Bits per pixel */
217
218 /* Horizontal control register. Timing from data sheet */
219 u_char vl_hspw; /* Horz sync pulse width */
220 u_char vl_hfpd; /* Wait before of line */
221 u_char vl_hbpd; /* Wait end of line */
222
223 /* Vertical control register. */
224 u_char vl_vspw; /* Vertical sync pulse width */
225 u_char vl_vfpd; /* Wait before of frame */
226 u_char vl_vbpd; /* Wait end of frame */
227 u_char vl_cmd_allow_len; /* Wait end of frame */
228
229 void (*cfg_gpio)(void);
230 void (*backlight_on)(unsigned int onoff);
231 void (*reset_lcd)(void);
232 void (*lcd_power_on)(void);
233 void (*cfg_ldo)(void);
234 void (*enable_ldo)(unsigned int onoff);
235 void (*mipi_power)(void);
236 void (*backlight_reset)(void);
237
238 unsigned int win_id;
239 unsigned int init_delay;
240 unsigned int power_on_delay;
241 unsigned int reset_delay;
242 unsigned int interface_mode;
243 unsigned int mipi_enabled;
Donghwa Leebe91a412012-07-02 01:16:05 +0000244 unsigned int dp_enabled;
Donghwa Lee0e6f77d2012-04-05 19:36:15 +0000245 unsigned int cs_setup;
246 unsigned int wr_setup;
247 unsigned int wr_act;
248 unsigned int wr_hold;
Donghwa Lee37980dd2012-05-09 19:23:46 +0000249 unsigned int logo_on;
250 unsigned int logo_width;
251 unsigned int logo_height;
252 unsigned long logo_addr;
253 unsigned int rgb_mode;
254 unsigned int resolution;
Donghwa Lee0e6f77d2012-04-05 19:36:15 +0000255
256 /* parent clock name(MPLL, EPLL or VPLL) */
257 unsigned int pclk_name;
258 /* ratio value for source clock from parent clock. */
259 unsigned int sclk_div;
260
261 unsigned int dual_lcd_enabled;
262
263} vidinfo_t;
264
265void init_panel_info(vidinfo_t *vid);
266
Guennadi Liakhovetski332d0b52009-02-06 10:37:53 +0100267#else
268
269typedef struct vidinfo {
270 ushort vl_col; /* Number of columns (i.e. 160) */
271 ushort vl_row; /* Number of rows (i.e. 100) */
272
273 u_char vl_bpix; /* Bits per pixel, 0 = 1 */
274
275 ushort *cmap; /* Pointer to the colormap */
276
277 void *priv; /* Pointer to driver-specific data */
278} vidinfo_t;
279
Marek Vasut85cc88a2011-11-26 07:20:07 +0100280#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
wdenk9ca7bbc2004-10-09 23:25:58 +0000281
Alessandro Rubini249ce8a2009-07-21 14:09:45 +0200282extern vidinfo_t panel_info;
283
wdenkfe8c2802002-11-03 00:38:21 +0000284/* Video functions */
285
wdenk9ca7bbc2004-10-09 23:25:58 +0000286#if defined(CONFIG_RBC823)
287void lcd_disable (void);
288#endif
289
290
wdenk0811ded2004-06-25 23:35:58 +0000291/* int lcd_init (void *lcdbase); */
wdenkfe8c2802002-11-03 00:38:21 +0000292void lcd_putc (const char c);
293void lcd_puts (const char *s);
294void lcd_printf (const char *fmt, ...);
Che-Liang Chiou2444b172011-10-20 23:07:03 +0000295void lcd_clear(void);
296int lcd_display_bitmap(ulong bmp_image, int x, int y);
wdenkfe8c2802002-11-03 00:38:21 +0000297
Vadim Bendeburya7eaa2f2012-09-28 15:11:13 +0000298/**
299 * Get the width of the LCD in pixels
300 *
301 * @return width of LCD in pixels
302 */
303int lcd_get_pixel_width(void);
304
305/**
306 * Get the height of the LCD in pixels
307 *
308 * @return height of LCD in pixels
309 */
310int lcd_get_pixel_height(void);
311
312/**
313 * Get the number of text lines/rows on the LCD
314 *
315 * @return number of rows
316 */
317int lcd_get_screen_rows(void);
318
319/**
320 * Get the number of text columns on the LCD
321 *
322 * @return number of columns
323 */
324int lcd_get_screen_columns(void);
325
326/**
327 * Set the position of the text cursor
328 *
329 * @param col Column to place cursor (0 = left side)
330 * @param row Row to place cursor (0 = top line)
331 */
332void lcd_position_cursor(unsigned col, unsigned row);
333
Haavard Skinnemoenddbcf952008-09-01 16:21:22 +0200334/* Allow boards to customize the information displayed */
335void lcd_show_board_info(void);
wdenk9ca7bbc2004-10-09 23:25:58 +0000336
Simon Glass599a4df2012-10-17 13:24:54 +0000337/* Return the size of the LCD frame buffer, and the line length */
338int lcd_get_size(int *line_length);
339
wdenk9ca7bbc2004-10-09 23:25:58 +0000340/************************************************************************/
341/* ** BITMAP DISPLAY SUPPORT */
342/************************************************************************/
Jon Loeliger2517d972007-07-09 17:15:49 -0500343#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
wdenk9ca7bbc2004-10-09 23:25:58 +0000344# include <bmp_layout.h>
345# include <asm/byteorder.h>
Jon Loeliger2517d972007-07-09 17:15:49 -0500346#endif
wdenk9ca7bbc2004-10-09 23:25:58 +0000347
wdenk9ca7bbc2004-10-09 23:25:58 +0000348/*
349 * Information about displays we are using. This is for configuring
350 * the LCD controller and memory allocation. Someone has to know what
351 * is connected, as we can't autodetect anything.
352 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200353#define CONFIG_SYS_HIGH 0 /* Pins are active high */
354#define CONFIG_SYS_LOW 1 /* Pins are active low */
wdenk9ca7bbc2004-10-09 23:25:58 +0000355
356#define LCD_MONOCHROME 0
357#define LCD_COLOR2 1
358#define LCD_COLOR4 2
359#define LCD_COLOR8 3
360#define LCD_COLOR16 4
361
362/*----------------------------------------------------------------------*/
wdenk2b9d1862005-07-04 00:03:16 +0000363#if defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk9ca7bbc2004-10-09 23:25:58 +0000364# define LCD_INFO_X 0
365# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
366#elif defined(CONFIG_LCD_LOGO)
367# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
368# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
369#else
370# define LCD_INFO_X (VIDEO_FONT_WIDTH)
371# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)
372#endif
373
374/* Default to 8bpp if bit depth not specified */
375#ifndef LCD_BPP
376# define LCD_BPP LCD_COLOR8
377#endif
378#ifndef LCD_DF
379# define LCD_DF 1
380#endif
381
382/* Calculate nr. of bits per pixel and nr. of colors */
383#define NBITS(bit_code) (1 << (bit_code))
384#define NCOLORS(bit_code) (1 << NBITS(bit_code))
385
386/************************************************************************/
387/* ** CONSOLE CONSTANTS */
388/************************************************************************/
389#if LCD_BPP == LCD_MONOCHROME
390
391/*
392 * Simple black/white definitions
393 */
394# define CONSOLE_COLOR_BLACK 0
395# define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */
396
397#elif LCD_BPP == LCD_COLOR8
398
399/*
400 * 8bpp color definitions
401 */
402# define CONSOLE_COLOR_BLACK 0
403# define CONSOLE_COLOR_RED 1
404# define CONSOLE_COLOR_GREEN 2
405# define CONSOLE_COLOR_YELLOW 3
406# define CONSOLE_COLOR_BLUE 4
407# define CONSOLE_COLOR_MAGENTA 5
408# define CONSOLE_COLOR_CYAN 6
409# define CONSOLE_COLOR_GREY 14
410# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
411
412#else
413
414/*
415 * 16bpp color definitions
416 */
417# define CONSOLE_COLOR_BLACK 0x0000
418# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
419
420#endif /* color definitions */
421
wdenk9ca7bbc2004-10-09 23:25:58 +0000422/************************************************************************/
423#ifndef PAGE_SIZE
424# define PAGE_SIZE 4096
425#endif
426
427/************************************************************************/
428/* ** CONSOLE DEFINITIONS & FUNCTIONS */
429/************************************************************************/
wdenk2b9d1862005-07-04 00:03:16 +0000430#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
wdenk9ca7bbc2004-10-09 23:25:58 +0000431# define CONSOLE_ROWS ((panel_info.vl_row-BMP_LOGO_HEIGHT) \
432 / VIDEO_FONT_HEIGHT)
433#else
434# define CONSOLE_ROWS (panel_info.vl_row / VIDEO_FONT_HEIGHT)
435#endif
436
437#define CONSOLE_COLS (panel_info.vl_col / VIDEO_FONT_WIDTH)
438#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
439#define CONSOLE_ROW_FIRST (lcd_console_address)
440#define CONSOLE_ROW_SECOND (lcd_console_address + CONSOLE_ROW_SIZE)
441#define CONSOLE_ROW_LAST (lcd_console_address + CONSOLE_SIZE \
442 - CONSOLE_ROW_SIZE)
443#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
444#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE)
445
446#if LCD_BPP == LCD_MONOCHROME
447# define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \
448 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
Mark Jackson8ef053f2009-07-21 11:18:44 +0100449#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
wdenk9ca7bbc2004-10-09 23:25:58 +0000450# define COLOR_MASK(c) (c)
451#else
452# error Unsupported LCD BPP.
wdenkfe8c2802002-11-03 00:38:21 +0000453#endif
wdenk9ca7bbc2004-10-09 23:25:58 +0000454
455/************************************************************************/
456
457#endif /* _LCD_H_ */