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git01.mediatek.com / filogic / uboot / 71407d8b9fa94234c049dd9d4dcddd6c0cd4fa2e / . / configs / socfpga_agilex_vab_defconfig
blob: 83a808fe9270b96508533daeb19b77412f2eab6c [file] [log] [blame]
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=400000000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]3CONFIG_ARCH_SOCFPGA=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]4CONFIG_TEXT_BASE=0x200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_SYS_MALLOC_LEN=0x500000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]6CONFIG_NR_DRAM_BANKS=2
Tom Rini5d181d52022-06-29 09:54:02 -0400[diff] [blame]7CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]8CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
9CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]10CONFIG_SF_DEFAULT_MODE=0x2003
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]11CONFIG_ENV_SIZE=0x1000
12CONFIG_ENV_OFFSET=0x200
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]13CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]15CONFIG_SPL_TEXT_BASE=0xFFE00000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]16CONFIG_DM_RESET=y
17CONFIG_SPL_STACK=0xffe3f000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]18CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
19CONFIG_SPL_BSS_START_ADDR=0x3ff00000
20CONFIG_SPL_BSS_MAX_SIZE=0x100000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]21CONFIG_SOCFPGA_SECURE_VAB_AUTH=y
22CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
23CONFIG_IDENT_STRING="socfpga_agilex"
24CONFIG_SPL_FS_FAT=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]25CONFIG_SYS_LOAD_ADDR=0x02000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]26CONFIG_REMAKE_ELF=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]27CONFIG_FIT=y
Siew Chin Limb130efa2021-03-24 23:56:37 +0800[diff] [blame]28CONFIG_SPL_FIT_SIGNATURE=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]29CONFIG_SPL_LOAD_FIT=y
30CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]31CONFIG_SYS_BOOTM_LEN=0x2000000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]32CONFIG_BOOTDELAY=5
33CONFIG_USE_BOOTARGS=y
34CONFIG_BOOTARGS="earlycon"
35CONFIG_USE_BOOTCOMMAND=y
36CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]37CONFIG_SYS_PBSIZE=2082
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]38CONFIG_SPL_MAX_SIZE=0x40000
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]39# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]40CONFIG_SPL_SYS_MALLOC=y
41CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
42CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000
43CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]44CONFIG_SPL_CACHE=y
45CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]46CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]47CONFIG_SPL_ATF=y
48CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Tom Rini06d06f72022-05-27 17:13:52 -0400[diff] [blame]49CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]50CONFIG_HUSH_PARSER=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]51CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]52CONFIG_CMD_MEMTEST=y
53CONFIG_CMD_GPIO=y
54CONFIG_CMD_I2C=y
55CONFIG_CMD_MMC=y
56CONFIG_CMD_SPI=y
57CONFIG_CMD_USB=y
58CONFIG_CMD_DHCP=y
59CONFIG_CMD_MII=y
60CONFIG_CMD_PING=y
61CONFIG_CMD_CACHE=y
62CONFIG_CMD_EXT4=y
63CONFIG_CMD_FAT=y
64CONFIG_CMD_FS_GENERIC=y
65CONFIG_ENV_IS_IN_MMC=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]66CONFIG_USE_BOOTFILE=y
67CONFIG_BOOTFILE="kernel.itb"
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]68CONFIG_NET_RANDOM_ETHADDR=y
69CONFIG_SPL_DM_SEQ_ALIAS=y
70CONFIG_SPL_ALTERA_SDRAM=y
71CONFIG_DWAPB_GPIO=y
72CONFIG_DM_I2C=y
73CONFIG_SYS_I2C_DW=y
Tom Rini91735482022-10-28 20:27:05 -0400[diff] [blame]74CONFIG_SYS_MMC_MAX_BLK_COUNT=256
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]75CONFIG_MMC_DW=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]76CONFIG_SPI_FLASH_SPANSION=y
77CONFIG_SPI_FLASH_STMICRO=y
78CONFIG_PHY_MICREL=y
79CONFIG_PHY_MICREL_KSZ90X1=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]80CONFIG_ETH_DESIGNWARE=y
81CONFIG_MII=y
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]82CONFIG_SYS_NS16550_MEM32=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]83CONFIG_SPI=y
84CONFIG_CADENCE_QSPI=y
85CONFIG_DESIGNWARE_SPI=y
86CONFIG_USB=y
Siew Chin Lim551645b2021-03-01 20:04:15 +0800[diff] [blame]87CONFIG_USB_DWC2=y
88CONFIG_USB_STORAGE=y
89CONFIG_DESIGNWARE_WATCHDOG=y
90CONFIG_WDT=y
91# CONFIG_SPL_USE_TINY_PRINTF is not set
92CONFIG_PANIC_HANG=y
Tom Rini278f0f12023-08-07 15:17:12 -0400[diff] [blame]93CONFIG_SPL_CRC32=y