Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 8 | #include <log.h> |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 9 | #include <pci.h> |
Simon Glass | ec86bc6 | 2022-07-30 15:52:04 -0600 | [diff] [blame] | 10 | #include <vesa.h> |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 11 | #include <video.h> |
| 12 | #include <asm/mtrr.h> |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 13 | |
| 14 | static int vesa_video_probe(struct udevice *dev) |
| 15 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 16 | struct video_uc_plat *plat = dev_get_uclass_plat(dev); |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 17 | ulong fbbase; |
| 18 | int ret; |
| 19 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 20 | ret = vesa_setup_video(dev, NULL); |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 21 | if (ret) |
| 22 | return log_ret(ret); |
| 23 | |
| 24 | /* Use write-combining for the graphics memory, 256MB */ |
| 25 | fbbase = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base; |
Bin Meng | 3413305 | 2023-07-31 14:01:07 +0800 | [diff] [blame] | 26 | mtrr_set_next_var(MTRR_TYPE_WRCOMB, fbbase, 256 << 20); |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 27 | |
| 28 | return 0; |
| 29 | } |
| 30 | |
| 31 | static int vesa_video_bind(struct udevice *dev) |
| 32 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 33 | struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 34 | |
| 35 | /* Set the maximum supported resolution */ |
| 36 | uc_plat->size = 2560 * 1600 * 4; |
| 37 | log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size); |
| 38 | |
| 39 | return 0; |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | static const struct udevice_id vesa_video_ids[] = { |
| 43 | { .compatible = "vesa-fb" }, |
| 44 | { } |
| 45 | }; |
| 46 | |
| 47 | U_BOOT_DRIVER(vesa_video) = { |
| 48 | .name = "vesa_video", |
| 49 | .id = UCLASS_VIDEO, |
| 50 | .of_match = vesa_video_ids, |
Simon Glass | 0fc300a | 2020-07-02 21:12:36 -0600 | [diff] [blame] | 51 | .bind = vesa_video_bind, |
Bin Meng | 2c9bb7a | 2016-10-09 04:14:11 -0700 | [diff] [blame] | 52 | .probe = vesa_video_probe, |
| 53 | }; |
| 54 | |
| 55 | static struct pci_device_id vesa_video_supported[] = { |
| 56 | { PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, ~0) }, |
| 57 | { }, |
| 58 | }; |
| 59 | |
| 60 | U_BOOT_PCI_DEVICE(vesa_video, vesa_video_supported); |