Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ or MIT) |
| 2 | /* |
| 3 | * (C) Copyright (C) 2019 Jerome Brunet <jbrunet@baylibre.com> |
| 4 | * |
| 5 | * Based on code from Linux kernel: |
| 6 | * Copyright (c) 2018 Amlogic, Inc. All rights reserved. |
| 7 | * Author: Xingyu Chen <xingyu.chen@amlogic.com> |
| 8 | * Author: Yixun Lan <yixun.lan@amlogic.com> |
| 9 | */ |
| 10 | |
Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 11 | #include <dm.h> |
| 12 | #include <dm/pinctrl.h> |
| 13 | #include <dt-bindings/gpio/meson-g12a-gpio.h> |
| 14 | |
| 15 | #include "pinctrl-meson-axg.h" |
| 16 | |
| 17 | #define EE_OFF 15 |
| 18 | |
| 19 | /* emmc */ |
| 20 | static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) }; |
| 21 | static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) }; |
| 22 | static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) }; |
| 23 | static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) }; |
| 24 | static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) }; |
| 25 | static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) }; |
| 26 | static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) }; |
| 27 | static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) }; |
| 28 | static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; |
| 29 | static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; |
| 30 | static const unsigned int emmc_nand_ds_pins[] = { PIN(BOOT_13, EE_OFF) }; |
| 31 | |
| 32 | /* nand */ |
| 33 | static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; |
| 34 | static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) }; |
| 35 | static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) }; |
| 36 | static const unsigned int nand_ce0_pins[] = { PIN(BOOT_11, EE_OFF) }; |
| 37 | static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) }; |
| 38 | static const unsigned int nand_rb0_pins[] = { PIN(BOOT_14, EE_OFF) }; |
| 39 | static const unsigned int nand_ce1_pins[] = { PIN(BOOT_15, EE_OFF) }; |
| 40 | |
| 41 | /* nor */ |
| 42 | static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) }; |
| 43 | static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) }; |
| 44 | static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) }; |
| 45 | static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) }; |
| 46 | static const unsigned int nor_wp_pins[] = { PIN(BOOT_7, EE_OFF) }; |
| 47 | static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) }; |
| 48 | |
| 49 | /* sdio */ |
| 50 | static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; |
| 51 | static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; |
| 52 | static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; |
| 53 | static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; |
| 54 | static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) }; |
| 55 | static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) }; |
| 56 | |
| 57 | /* sdcard */ |
| 58 | static const unsigned int sdcard_d0_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; |
| 59 | static const unsigned int sdcard_d1_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; |
| 60 | static const unsigned int sdcard_d2_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; |
| 61 | static const unsigned int sdcard_d3_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; |
| 62 | static const unsigned int sdcard_clk_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; |
| 63 | static const unsigned int sdcard_cmd_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; |
| 64 | |
| 65 | static const unsigned int sdcard_d0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 66 | static const unsigned int sdcard_d1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 67 | static const unsigned int sdcard_d2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 68 | static const unsigned int sdcard_d3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 69 | static const unsigned int sdcard_clk_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 70 | static const unsigned int sdcard_cmd_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 71 | |
| 72 | /* spi0 */ |
| 73 | static const unsigned int spi0_mosi_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; |
| 74 | static const unsigned int spi0_miso_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; |
| 75 | static const unsigned int spi0_ss0_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; |
| 76 | static const unsigned int spi0_clk_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; |
| 77 | |
| 78 | static const unsigned int spi0_mosi_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 79 | static const unsigned int spi0_miso_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; |
| 80 | static const unsigned int spi0_ss0_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; |
| 81 | static const unsigned int spi0_clk_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; |
| 82 | |
| 83 | /* spi1 */ |
| 84 | static const unsigned int spi1_mosi_pins[] = { PIN(GPIOH_4, EE_OFF) }; |
| 85 | static const unsigned int spi1_miso_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 86 | static const unsigned int spi1_ss0_pins[] = { PIN(GPIOH_6, EE_OFF) }; |
| 87 | static const unsigned int spi1_clk_pins[] = { PIN(GPIOH_7, EE_OFF) }; |
| 88 | |
| 89 | /* i2c0 */ |
| 90 | static const unsigned int i2c0_sda_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; |
| 91 | static const unsigned int i2c0_sck_c_pins[] = { PIN(GPIOC_6, EE_OFF) }; |
| 92 | static const unsigned int i2c0_sda_z0_pins[] = { PIN(GPIOZ_0, EE_OFF) }; |
| 93 | static const unsigned int i2c0_sck_z1_pins[] = { PIN(GPIOZ_1, EE_OFF) }; |
| 94 | static const unsigned int i2c0_sda_z7_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 95 | static const unsigned int i2c0_sck_z8_pins[] = { PIN(GPIOZ_8, EE_OFF) }; |
| 96 | |
| 97 | /* i2c1 */ |
| 98 | static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; |
| 99 | static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; |
| 100 | static const unsigned int i2c1_sda_h2_pins[] = { PIN(GPIOH_2, EE_OFF) }; |
| 101 | static const unsigned int i2c1_sck_h3_pins[] = { PIN(GPIOH_3, EE_OFF) }; |
| 102 | static const unsigned int i2c1_sda_h6_pins[] = { PIN(GPIOH_6, EE_OFF) }; |
| 103 | static const unsigned int i2c1_sck_h7_pins[] = { PIN(GPIOH_7, EE_OFF) }; |
| 104 | |
| 105 | /* i2c2 */ |
| 106 | static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; |
| 107 | static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; |
| 108 | static const unsigned int i2c2_sda_z_pins[] = { PIN(GPIOZ_14, EE_OFF) }; |
| 109 | static const unsigned int i2c2_sck_z_pins[] = { PIN(GPIOZ_15, EE_OFF) }; |
| 110 | |
| 111 | /* i2c3 */ |
| 112 | static const unsigned int i2c3_sda_h_pins[] = { PIN(GPIOH_0, EE_OFF) }; |
| 113 | static const unsigned int i2c3_sck_h_pins[] = { PIN(GPIOH_1, EE_OFF) }; |
| 114 | static const unsigned int i2c3_sda_a_pins[] = { PIN(GPIOA_14, EE_OFF) }; |
| 115 | static const unsigned int i2c3_sck_a_pins[] = { PIN(GPIOA_15, EE_OFF) }; |
| 116 | |
| 117 | /* uart_a */ |
| 118 | static const unsigned int uart_a_tx_pins[] = { PIN(GPIOX_12, EE_OFF) }; |
| 119 | static const unsigned int uart_a_rx_pins[] = { PIN(GPIOX_13, EE_OFF) }; |
| 120 | static const unsigned int uart_a_cts_pins[] = { PIN(GPIOX_14, EE_OFF) }; |
| 121 | static const unsigned int uart_a_rts_pins[] = { PIN(GPIOX_15, EE_OFF) }; |
| 122 | |
| 123 | /* uart_b */ |
| 124 | static const unsigned int uart_b_tx_pins[] = { PIN(GPIOX_6, EE_OFF) }; |
| 125 | static const unsigned int uart_b_rx_pins[] = { PIN(GPIOX_7, EE_OFF) }; |
| 126 | |
| 127 | /* uart_c */ |
| 128 | static const unsigned int uart_c_rts_pins[] = { PIN(GPIOH_4, EE_OFF) }; |
| 129 | static const unsigned int uart_c_cts_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 130 | static const unsigned int uart_c_rx_pins[] = { PIN(GPIOH_6, EE_OFF) }; |
| 131 | static const unsigned int uart_c_tx_pins[] = { PIN(GPIOH_7, EE_OFF) }; |
| 132 | |
| 133 | /* uart_ao_a_c */ |
| 134 | static const unsigned int uart_ao_a_rx_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; |
| 135 | static const unsigned int uart_ao_a_tx_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; |
| 136 | |
| 137 | /* iso7816 */ |
| 138 | static const unsigned int iso7816_clk_c_pins[] = { PIN(GPIOC_5, EE_OFF) }; |
| 139 | static const unsigned int iso7816_data_c_pins[] = { PIN(GPIOC_6, EE_OFF) }; |
| 140 | static const unsigned int iso7816_clk_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 141 | static const unsigned int iso7816_data_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; |
| 142 | static const unsigned int iso7816_clk_h_pins[] = { PIN(GPIOH_6, EE_OFF) }; |
| 143 | static const unsigned int iso7816_data_h_pins[] = { PIN(GPIOH_7, EE_OFF) }; |
| 144 | static const unsigned int iso7816_clk_z_pins[] = { PIN(GPIOZ_0, EE_OFF) }; |
| 145 | static const unsigned int iso7816_data_z_pins[] = { PIN(GPIOZ_1, EE_OFF) }; |
| 146 | |
| 147 | /* eth */ |
| 148 | static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) }; |
| 149 | static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) }; |
| 150 | static const unsigned int eth_rgmii_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 151 | static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 152 | static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 153 | static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 154 | static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 155 | static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 156 | static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) }; |
| 157 | static const unsigned int eth_txen_pins[] = { PIN(GPIOZ_9, EE_OFF) }; |
| 158 | static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) }; |
| 159 | static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) }; |
| 160 | static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOZ_12, EE_OFF) }; |
| 161 | static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOZ_13, EE_OFF) }; |
| 162 | static const unsigned int eth_link_led_pins[] = { PIN(GPIOZ_14, EE_OFF) }; |
| 163 | static const unsigned int eth_act_led_pins[] = { PIN(GPIOZ_15, EE_OFF) }; |
| 164 | |
| 165 | /* pwm_a */ |
| 166 | static const unsigned int pwm_a_pins[] = { PIN(GPIOX_6, EE_OFF) }; |
| 167 | |
| 168 | /* pwm_b */ |
| 169 | static const unsigned int pwm_b_x7_pins[] = { PIN(GPIOX_7, EE_OFF) }; |
| 170 | static const unsigned int pwm_b_x19_pins[] = { PIN(GPIOX_19, EE_OFF) }; |
| 171 | |
| 172 | /* pwm_c */ |
| 173 | static const unsigned int pwm_c_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; |
| 174 | static const unsigned int pwm_c_x5_pins[] = { PIN(GPIOX_5, EE_OFF) }; |
| 175 | static const unsigned int pwm_c_x8_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 176 | |
| 177 | /* pwm_d */ |
| 178 | static const unsigned int pwm_d_x3_pins[] = { PIN(GPIOX_3, EE_OFF) }; |
| 179 | static const unsigned int pwm_d_x6_pins[] = { PIN(GPIOX_6, EE_OFF) }; |
| 180 | |
| 181 | /* pwm_e */ |
| 182 | static const unsigned int pwm_e_pins[] = { PIN(GPIOX_16, EE_OFF) }; |
| 183 | |
| 184 | /* pwm_f */ |
| 185 | static const unsigned int pwm_f_x_pins[] = { PIN(GPIOX_7, EE_OFF) }; |
| 186 | static const unsigned int pwm_f_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 187 | |
| 188 | /* cec_ao */ |
| 189 | static const unsigned int cec_ao_a_h_pins[] = { PIN(GPIOH_3, EE_OFF) }; |
| 190 | static const unsigned int cec_ao_b_h_pins[] = { PIN(GPIOH_3, EE_OFF) }; |
| 191 | |
| 192 | /* jtag_b */ |
| 193 | static const unsigned int jtag_b_tdo_pins[] = { PIN(GPIOC_0, EE_OFF) }; |
| 194 | static const unsigned int jtag_b_tdi_pins[] = { PIN(GPIOC_1, EE_OFF) }; |
| 195 | static const unsigned int jtag_b_clk_pins[] = { PIN(GPIOC_4, EE_OFF) }; |
| 196 | static const unsigned int jtag_b_tms_pins[] = { PIN(GPIOC_5, EE_OFF) }; |
| 197 | |
| 198 | /* bt565_a */ |
| 199 | static const unsigned int bt565_a_vs_pins[] = { PIN(GPIOZ_0, EE_OFF) }; |
| 200 | static const unsigned int bt565_a_hs_pins[] = { PIN(GPIOZ_1, EE_OFF) }; |
| 201 | static const unsigned int bt565_a_clk_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 202 | static const unsigned int bt565_a_din0_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 203 | static const unsigned int bt565_a_din1_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 204 | static const unsigned int bt565_a_din2_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 205 | static const unsigned int bt565_a_din3_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 206 | static const unsigned int bt565_a_din4_pins[] = { PIN(GPIOZ_8, EE_OFF) }; |
| 207 | static const unsigned int bt565_a_din5_pins[] = { PIN(GPIOZ_9, EE_OFF) }; |
| 208 | static const unsigned int bt565_a_din6_pins[] = { PIN(GPIOZ_10, EE_OFF) }; |
| 209 | static const unsigned int bt565_a_din7_pins[] = { PIN(GPIOZ_11, EE_OFF) }; |
| 210 | |
| 211 | /* tsin_a */ |
| 212 | static const unsigned int tsin_a_valid_pins[] = { PIN(GPIOX_2, EE_OFF) }; |
| 213 | static const unsigned int tsin_a_sop_pins[] = { PIN(GPIOX_1, EE_OFF) }; |
| 214 | static const unsigned int tsin_a_din0_pins[] = { PIN(GPIOX_0, EE_OFF) }; |
| 215 | static const unsigned int tsin_a_clk_pins[] = { PIN(GPIOX_3, EE_OFF) }; |
| 216 | |
| 217 | /* tsin_b */ |
| 218 | static const unsigned int tsin_b_valid_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; |
| 219 | static const unsigned int tsin_b_sop_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 220 | static const unsigned int tsin_b_din0_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; |
| 221 | static const unsigned int tsin_b_clk_x_pins[] = { PIN(GPIOX_11, EE_OFF) }; |
| 222 | |
| 223 | static const unsigned int tsin_b_valid_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 224 | static const unsigned int tsin_b_sop_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 225 | static const unsigned int tsin_b_din0_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 226 | static const unsigned int tsin_b_clk_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 227 | |
| 228 | static const unsigned int tsin_b_fail_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 229 | static const unsigned int tsin_b_din1_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 230 | static const unsigned int tsin_b_din2_pins[] = { PIN(GPIOZ_8, EE_OFF) }; |
| 231 | static const unsigned int tsin_b_din3_pins[] = { PIN(GPIOZ_9, EE_OFF) }; |
| 232 | static const unsigned int tsin_b_din4_pins[] = { PIN(GPIOZ_10, EE_OFF) }; |
| 233 | static const unsigned int tsin_b_din5_pins[] = { PIN(GPIOZ_11, EE_OFF) }; |
| 234 | static const unsigned int tsin_b_din6_pins[] = { PIN(GPIOZ_12, EE_OFF) }; |
| 235 | static const unsigned int tsin_b_din7_pins[] = { PIN(GPIOZ_13, EE_OFF) }; |
| 236 | |
| 237 | /* hdmitx */ |
| 238 | static const unsigned int hdmitx_sda_pins[] = { PIN(GPIOH_0, EE_OFF) }; |
| 239 | static const unsigned int hdmitx_sck_pins[] = { PIN(GPIOH_1, EE_OFF) }; |
| 240 | static const unsigned int hdmitx_hpd_in_pins[] = { PIN(GPIOH_2, EE_OFF) }; |
| 241 | |
| 242 | /* pdm */ |
| 243 | static const unsigned int pdm_din0_c_pins[] = { PIN(GPIOC_0, EE_OFF) }; |
| 244 | static const unsigned int pdm_din1_c_pins[] = { PIN(GPIOC_1, EE_OFF) }; |
| 245 | static const unsigned int pdm_din2_c_pins[] = { PIN(GPIOC_2, EE_OFF) }; |
| 246 | static const unsigned int pdm_din3_c_pins[] = { PIN(GPIOC_3, EE_OFF) }; |
| 247 | static const unsigned int pdm_dclk_c_pins[] = { PIN(GPIOC_4, EE_OFF) }; |
| 248 | |
| 249 | static const unsigned int pdm_din0_x_pins[] = { PIN(GPIOX_0, EE_OFF) }; |
| 250 | static const unsigned int pdm_din1_x_pins[] = { PIN(GPIOX_1, EE_OFF) }; |
| 251 | static const unsigned int pdm_din2_x_pins[] = { PIN(GPIOX_2, EE_OFF) }; |
| 252 | static const unsigned int pdm_din3_x_pins[] = { PIN(GPIOX_3, EE_OFF) }; |
| 253 | static const unsigned int pdm_dclk_x_pins[] = { PIN(GPIOX_4, EE_OFF) }; |
| 254 | |
| 255 | static const unsigned int pdm_din0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 256 | static const unsigned int pdm_din1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 257 | static const unsigned int pdm_din2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 258 | static const unsigned int pdm_din3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 259 | static const unsigned int pdm_dclk_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 260 | |
| 261 | static const unsigned int pdm_din0_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; |
| 262 | static const unsigned int pdm_din1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; |
| 263 | static const unsigned int pdm_din2_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; |
| 264 | static const unsigned int pdm_din3_a_pins[] = { PIN(GPIOA_5, EE_OFF) }; |
| 265 | static const unsigned int pdm_dclk_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; |
| 266 | |
| 267 | /* spdif_in */ |
| 268 | static const unsigned int spdif_in_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 269 | static const unsigned int spdif_in_a10_pins[] = { PIN(GPIOA_10, EE_OFF) }; |
| 270 | static const unsigned int spdif_in_a12_pins[] = { PIN(GPIOA_12, EE_OFF) }; |
| 271 | |
| 272 | /* spdif_out */ |
| 273 | static const unsigned int spdif_out_h_pins[] = { PIN(GPIOH_4, EE_OFF) }; |
| 274 | static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) }; |
| 275 | static const unsigned int spdif_out_a13_pins[] = { PIN(GPIOA_13, EE_OFF) }; |
| 276 | |
| 277 | /* mclk0 */ |
| 278 | static const unsigned int mclk0_a_pins[] = { PIN(GPIOA_0, EE_OFF) }; |
| 279 | |
| 280 | /* mclk1 */ |
| 281 | static const unsigned int mclk1_x_pins[] = { PIN(GPIOX_5, EE_OFF) }; |
| 282 | static const unsigned int mclk1_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; |
| 283 | static const unsigned int mclk1_a_pins[] = { PIN(GPIOA_11, EE_OFF) }; |
| 284 | |
| 285 | /* tdm */ |
| 286 | static const unsigned int tdm_a_slv_sclk_pins[] = { PIN(GPIOX_11, EE_OFF) }; |
| 287 | static const unsigned int tdm_a_slv_fs_pins[] = { PIN(GPIOX_10, EE_OFF) }; |
| 288 | static const unsigned int tdm_a_sclk_pins[] = { PIN(GPIOX_11, EE_OFF) }; |
| 289 | static const unsigned int tdm_a_fs_pins[] = { PIN(GPIOX_10, EE_OFF) }; |
| 290 | static const unsigned int tdm_a_din0_pins[] = { PIN(GPIOX_9, EE_OFF) }; |
| 291 | static const unsigned int tdm_a_din1_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 292 | static const unsigned int tdm_a_dout0_pins[] = { PIN(GPIOX_9, EE_OFF) }; |
| 293 | static const unsigned int tdm_a_dout1_pins[] = { PIN(GPIOX_8, EE_OFF) }; |
| 294 | |
| 295 | static const unsigned int tdm_b_slv_sclk_pins[] = { PIN(GPIOA_1, EE_OFF) }; |
| 296 | static const unsigned int tdm_b_slv_fs_pins[] = { PIN(GPIOA_2, EE_OFF) }; |
| 297 | static const unsigned int tdm_b_sclk_pins[] = { PIN(GPIOA_1, EE_OFF) }; |
| 298 | static const unsigned int tdm_b_fs_pins[] = { PIN(GPIOA_2, EE_OFF) }; |
| 299 | static const unsigned int tdm_b_din0_pins[] = { PIN(GPIOA_3, EE_OFF) }; |
| 300 | static const unsigned int tdm_b_din1_pins[] = { PIN(GPIOA_4, EE_OFF) }; |
| 301 | static const unsigned int tdm_b_din2_pins[] = { PIN(GPIOA_5, EE_OFF) }; |
| 302 | static const unsigned int tdm_b_din3_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; |
| 303 | static const unsigned int tdm_b_din3_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 304 | static const unsigned int tdm_b_dout0_pins[] = { PIN(GPIOA_3, EE_OFF) }; |
| 305 | static const unsigned int tdm_b_dout1_pins[] = { PIN(GPIOA_4, EE_OFF) }; |
| 306 | static const unsigned int tdm_b_dout2_pins[] = { PIN(GPIOA_5, EE_OFF) }; |
| 307 | static const unsigned int tdm_b_dout3_a_pins[] = { PIN(GPIOA_6, EE_OFF) }; |
| 308 | static const unsigned int tdm_b_dout3_h_pins[] = { PIN(GPIOH_5, EE_OFF) }; |
| 309 | |
| 310 | static const unsigned int tdm_c_slv_sclk_a_pins[] = { PIN(GPIOA_12, EE_OFF) }; |
| 311 | static const unsigned int tdm_c_slv_fs_a_pins[] = { PIN(GPIOA_13, EE_OFF) }; |
| 312 | static const unsigned int tdm_c_slv_sclk_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 313 | static const unsigned int tdm_c_slv_fs_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 314 | static const unsigned int tdm_c_sclk_a_pins[] = { PIN(GPIOA_12, EE_OFF) }; |
| 315 | static const unsigned int tdm_c_fs_a_pins[] = { PIN(GPIOA_13, EE_OFF) }; |
| 316 | static const unsigned int tdm_c_sclk_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; |
| 317 | static const unsigned int tdm_c_fs_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; |
| 318 | static const unsigned int tdm_c_din0_a_pins[] = { PIN(GPIOA_10, EE_OFF) }; |
| 319 | static const unsigned int tdm_c_din1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; |
| 320 | static const unsigned int tdm_c_din2_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; |
| 321 | static const unsigned int tdm_c_din3_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; |
| 322 | static const unsigned int tdm_c_din0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 323 | static const unsigned int tdm_c_din1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 324 | static const unsigned int tdm_c_din2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 325 | static const unsigned int tdm_c_din3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 326 | static const unsigned int tdm_c_dout0_a_pins[] = { PIN(GPIOA_10, EE_OFF) }; |
| 327 | static const unsigned int tdm_c_dout1_a_pins[] = { PIN(GPIOA_9, EE_OFF) }; |
| 328 | static const unsigned int tdm_c_dout2_a_pins[] = { PIN(GPIOA_8, EE_OFF) }; |
| 329 | static const unsigned int tdm_c_dout3_a_pins[] = { PIN(GPIOA_7, EE_OFF) }; |
| 330 | static const unsigned int tdm_c_dout0_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; |
| 331 | static const unsigned int tdm_c_dout1_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; |
| 332 | static const unsigned int tdm_c_dout2_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; |
| 333 | static const unsigned int tdm_c_dout3_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; |
| 334 | |
| 335 | static struct meson_pmx_group meson_g12a_periphs_groups[] = { |
| 336 | GPIO_GROUP(GPIOZ_0, EE_OFF), |
| 337 | GPIO_GROUP(GPIOZ_1, EE_OFF), |
| 338 | GPIO_GROUP(GPIOZ_2, EE_OFF), |
| 339 | GPIO_GROUP(GPIOZ_3, EE_OFF), |
| 340 | GPIO_GROUP(GPIOZ_4, EE_OFF), |
| 341 | GPIO_GROUP(GPIOZ_5, EE_OFF), |
| 342 | GPIO_GROUP(GPIOZ_6, EE_OFF), |
| 343 | GPIO_GROUP(GPIOZ_7, EE_OFF), |
| 344 | GPIO_GROUP(GPIOZ_8, EE_OFF), |
| 345 | GPIO_GROUP(GPIOZ_9, EE_OFF), |
| 346 | GPIO_GROUP(GPIOZ_10, EE_OFF), |
| 347 | GPIO_GROUP(GPIOZ_11, EE_OFF), |
| 348 | GPIO_GROUP(GPIOZ_12, EE_OFF), |
| 349 | GPIO_GROUP(GPIOZ_13, EE_OFF), |
| 350 | GPIO_GROUP(GPIOZ_14, EE_OFF), |
| 351 | GPIO_GROUP(GPIOZ_15, EE_OFF), |
| 352 | GPIO_GROUP(GPIOH_0, EE_OFF), |
| 353 | GPIO_GROUP(GPIOH_1, EE_OFF), |
| 354 | GPIO_GROUP(GPIOH_2, EE_OFF), |
| 355 | GPIO_GROUP(GPIOH_3, EE_OFF), |
| 356 | GPIO_GROUP(GPIOH_4, EE_OFF), |
| 357 | GPIO_GROUP(GPIOH_5, EE_OFF), |
| 358 | GPIO_GROUP(GPIOH_6, EE_OFF), |
| 359 | GPIO_GROUP(GPIOH_7, EE_OFF), |
| 360 | GPIO_GROUP(GPIOH_8, EE_OFF), |
| 361 | GPIO_GROUP(BOOT_0, EE_OFF), |
| 362 | GPIO_GROUP(BOOT_1, EE_OFF), |
| 363 | GPIO_GROUP(BOOT_2, EE_OFF), |
| 364 | GPIO_GROUP(BOOT_3, EE_OFF), |
| 365 | GPIO_GROUP(BOOT_4, EE_OFF), |
| 366 | GPIO_GROUP(BOOT_5, EE_OFF), |
| 367 | GPIO_GROUP(BOOT_6, EE_OFF), |
| 368 | GPIO_GROUP(BOOT_7, EE_OFF), |
| 369 | GPIO_GROUP(BOOT_8, EE_OFF), |
| 370 | GPIO_GROUP(BOOT_9, EE_OFF), |
| 371 | GPIO_GROUP(BOOT_10, EE_OFF), |
| 372 | GPIO_GROUP(BOOT_11, EE_OFF), |
| 373 | GPIO_GROUP(BOOT_12, EE_OFF), |
| 374 | GPIO_GROUP(BOOT_13, EE_OFF), |
| 375 | GPIO_GROUP(BOOT_14, EE_OFF), |
| 376 | GPIO_GROUP(BOOT_15, EE_OFF), |
| 377 | GPIO_GROUP(GPIOC_0, EE_OFF), |
| 378 | GPIO_GROUP(GPIOC_1, EE_OFF), |
| 379 | GPIO_GROUP(GPIOC_2, EE_OFF), |
| 380 | GPIO_GROUP(GPIOC_3, EE_OFF), |
| 381 | GPIO_GROUP(GPIOC_4, EE_OFF), |
| 382 | GPIO_GROUP(GPIOC_5, EE_OFF), |
| 383 | GPIO_GROUP(GPIOC_6, EE_OFF), |
| 384 | GPIO_GROUP(GPIOC_7, EE_OFF), |
| 385 | GPIO_GROUP(GPIOA_0, EE_OFF), |
| 386 | GPIO_GROUP(GPIOA_1, EE_OFF), |
| 387 | GPIO_GROUP(GPIOA_2, EE_OFF), |
| 388 | GPIO_GROUP(GPIOA_3, EE_OFF), |
| 389 | GPIO_GROUP(GPIOA_4, EE_OFF), |
| 390 | GPIO_GROUP(GPIOA_5, EE_OFF), |
| 391 | GPIO_GROUP(GPIOA_6, EE_OFF), |
| 392 | GPIO_GROUP(GPIOA_7, EE_OFF), |
| 393 | GPIO_GROUP(GPIOA_8, EE_OFF), |
| 394 | GPIO_GROUP(GPIOA_9, EE_OFF), |
| 395 | GPIO_GROUP(GPIOA_10, EE_OFF), |
| 396 | GPIO_GROUP(GPIOA_11, EE_OFF), |
| 397 | GPIO_GROUP(GPIOA_12, EE_OFF), |
| 398 | GPIO_GROUP(GPIOA_13, EE_OFF), |
| 399 | GPIO_GROUP(GPIOA_14, EE_OFF), |
| 400 | GPIO_GROUP(GPIOA_15, EE_OFF), |
| 401 | GPIO_GROUP(GPIOX_0, EE_OFF), |
| 402 | GPIO_GROUP(GPIOX_1, EE_OFF), |
| 403 | GPIO_GROUP(GPIOX_2, EE_OFF), |
| 404 | GPIO_GROUP(GPIOX_3, EE_OFF), |
| 405 | GPIO_GROUP(GPIOX_4, EE_OFF), |
| 406 | GPIO_GROUP(GPIOX_5, EE_OFF), |
| 407 | GPIO_GROUP(GPIOX_6, EE_OFF), |
| 408 | GPIO_GROUP(GPIOX_7, EE_OFF), |
| 409 | GPIO_GROUP(GPIOX_8, EE_OFF), |
| 410 | GPIO_GROUP(GPIOX_9, EE_OFF), |
| 411 | GPIO_GROUP(GPIOX_10, EE_OFF), |
| 412 | GPIO_GROUP(GPIOX_11, EE_OFF), |
| 413 | GPIO_GROUP(GPIOX_12, EE_OFF), |
| 414 | GPIO_GROUP(GPIOX_13, EE_OFF), |
| 415 | GPIO_GROUP(GPIOX_14, EE_OFF), |
| 416 | GPIO_GROUP(GPIOX_15, EE_OFF), |
| 417 | GPIO_GROUP(GPIOX_16, EE_OFF), |
| 418 | GPIO_GROUP(GPIOX_17, EE_OFF), |
| 419 | GPIO_GROUP(GPIOX_18, EE_OFF), |
| 420 | GPIO_GROUP(GPIOX_19, EE_OFF), |
| 421 | |
| 422 | /* bank BOOT */ |
| 423 | GROUP(emmc_nand_d0, 1), |
| 424 | GROUP(emmc_nand_d1, 1), |
| 425 | GROUP(emmc_nand_d2, 1), |
| 426 | GROUP(emmc_nand_d3, 1), |
| 427 | GROUP(emmc_nand_d4, 1), |
| 428 | GROUP(emmc_nand_d5, 1), |
| 429 | GROUP(emmc_nand_d6, 1), |
| 430 | GROUP(emmc_nand_d7, 1), |
| 431 | GROUP(emmc_clk, 1), |
| 432 | GROUP(emmc_cmd, 1), |
| 433 | GROUP(emmc_nand_ds, 1), |
| 434 | GROUP(nand_ce0, 2), |
| 435 | GROUP(nand_ale, 2), |
| 436 | GROUP(nand_cle, 2), |
| 437 | GROUP(nand_wen_clk, 2), |
| 438 | GROUP(nand_ren_wr, 2), |
| 439 | GROUP(nand_rb0, 2), |
| 440 | GROUP(nand_ce1, 2), |
| 441 | GROUP(nor_hold, 3), |
| 442 | GROUP(nor_d, 3), |
| 443 | GROUP(nor_q, 3), |
| 444 | GROUP(nor_c, 3), |
| 445 | GROUP(nor_wp, 3), |
| 446 | GROUP(nor_cs, 3), |
| 447 | |
| 448 | /* bank GPIOZ */ |
| 449 | GROUP(sdcard_d0_z, 5), |
| 450 | GROUP(sdcard_d1_z, 5), |
| 451 | GROUP(sdcard_d2_z, 5), |
| 452 | GROUP(sdcard_d3_z, 5), |
| 453 | GROUP(sdcard_clk_z, 5), |
| 454 | GROUP(sdcard_cmd_z, 5), |
| 455 | GROUP(i2c0_sda_z0, 4), |
| 456 | GROUP(i2c0_sck_z1, 4), |
| 457 | GROUP(i2c0_sda_z7, 7), |
| 458 | GROUP(i2c0_sck_z8, 7), |
| 459 | GROUP(i2c2_sda_z, 3), |
| 460 | GROUP(i2c2_sck_z, 3), |
| 461 | GROUP(iso7816_clk_z, 3), |
| 462 | GROUP(iso7816_data_z, 3), |
| 463 | GROUP(eth_mdio, 1), |
| 464 | GROUP(eth_mdc, 1), |
| 465 | GROUP(eth_rgmii_rx_clk, 1), |
| 466 | GROUP(eth_rx_dv, 1), |
| 467 | GROUP(eth_rxd0, 1), |
| 468 | GROUP(eth_rxd1, 1), |
| 469 | GROUP(eth_rxd2_rgmii, 1), |
| 470 | GROUP(eth_rxd3_rgmii, 1), |
| 471 | GROUP(eth_rgmii_tx_clk, 1), |
| 472 | GROUP(eth_txen, 1), |
| 473 | GROUP(eth_txd0, 1), |
| 474 | GROUP(eth_txd1, 1), |
| 475 | GROUP(eth_txd2_rgmii, 1), |
| 476 | GROUP(eth_txd3_rgmii, 1), |
| 477 | GROUP(eth_link_led, 1), |
| 478 | GROUP(eth_act_led, 1), |
| 479 | GROUP(bt565_a_vs, 2), |
| 480 | GROUP(bt565_a_hs, 2), |
| 481 | GROUP(bt565_a_clk, 2), |
| 482 | GROUP(bt565_a_din0, 2), |
| 483 | GROUP(bt565_a_din1, 2), |
| 484 | GROUP(bt565_a_din2, 2), |
| 485 | GROUP(bt565_a_din3, 2), |
| 486 | GROUP(bt565_a_din4, 2), |
| 487 | GROUP(bt565_a_din5, 2), |
| 488 | GROUP(bt565_a_din6, 2), |
| 489 | GROUP(bt565_a_din7, 2), |
| 490 | GROUP(tsin_b_valid_z, 3), |
| 491 | GROUP(tsin_b_sop_z, 3), |
| 492 | GROUP(tsin_b_din0_z, 3), |
| 493 | GROUP(tsin_b_clk_z, 3), |
| 494 | GROUP(tsin_b_fail, 3), |
| 495 | GROUP(tsin_b_din1, 3), |
| 496 | GROUP(tsin_b_din2, 3), |
| 497 | GROUP(tsin_b_din3, 3), |
| 498 | GROUP(tsin_b_din4, 3), |
| 499 | GROUP(tsin_b_din5, 3), |
| 500 | GROUP(tsin_b_din6, 3), |
| 501 | GROUP(tsin_b_din7, 3), |
| 502 | GROUP(pdm_din0_z, 7), |
| 503 | GROUP(pdm_din1_z, 7), |
| 504 | GROUP(pdm_din2_z, 7), |
| 505 | GROUP(pdm_din3_z, 7), |
| 506 | GROUP(pdm_dclk_z, 7), |
| 507 | GROUP(tdm_c_slv_sclk_z, 6), |
| 508 | GROUP(tdm_c_slv_fs_z, 6), |
| 509 | GROUP(tdm_c_din0_z, 6), |
| 510 | GROUP(tdm_c_din1_z, 6), |
| 511 | GROUP(tdm_c_din2_z, 6), |
| 512 | GROUP(tdm_c_din3_z, 6), |
| 513 | GROUP(tdm_c_sclk_z, 4), |
| 514 | GROUP(tdm_c_fs_z, 4), |
| 515 | GROUP(tdm_c_dout0_z, 4), |
| 516 | GROUP(tdm_c_dout1_z, 4), |
| 517 | GROUP(tdm_c_dout2_z, 4), |
| 518 | GROUP(tdm_c_dout3_z, 4), |
| 519 | GROUP(mclk1_z, 4), |
| 520 | |
| 521 | /* bank GPIOX */ |
| 522 | GROUP(sdio_d0, 1), |
| 523 | GROUP(sdio_d1, 1), |
| 524 | GROUP(sdio_d2, 1), |
| 525 | GROUP(sdio_d3, 1), |
| 526 | GROUP(sdio_clk, 1), |
| 527 | GROUP(sdio_cmd, 1), |
| 528 | GROUP(spi0_mosi_x, 4), |
| 529 | GROUP(spi0_miso_x, 4), |
| 530 | GROUP(spi0_ss0_x, 4), |
| 531 | GROUP(spi0_clk_x, 4), |
| 532 | GROUP(i2c1_sda_x, 5), |
| 533 | GROUP(i2c1_sck_x, 5), |
| 534 | GROUP(i2c2_sda_x, 1), |
| 535 | GROUP(i2c2_sck_x, 1), |
| 536 | GROUP(uart_a_tx, 1), |
| 537 | GROUP(uart_a_rx, 1), |
| 538 | GROUP(uart_a_cts, 1), |
| 539 | GROUP(uart_a_rts, 1), |
| 540 | GROUP(uart_b_tx, 2), |
| 541 | GROUP(uart_b_rx, 2), |
| 542 | GROUP(iso7816_clk_x, 6), |
| 543 | GROUP(iso7816_data_x, 6), |
| 544 | GROUP(pwm_a, 1), |
| 545 | GROUP(pwm_b_x7, 4), |
| 546 | GROUP(pwm_b_x19, 1), |
| 547 | GROUP(pwm_c_x5, 4), |
| 548 | GROUP(pwm_c_x8, 5), |
| 549 | GROUP(pwm_d_x3, 4), |
| 550 | GROUP(pwm_d_x6, 4), |
| 551 | GROUP(pwm_e, 1), |
| 552 | GROUP(pwm_f_x, 1), |
| 553 | GROUP(tsin_a_valid, 3), |
| 554 | GROUP(tsin_a_sop, 3), |
| 555 | GROUP(tsin_a_din0, 3), |
| 556 | GROUP(tsin_a_clk, 3), |
| 557 | GROUP(tsin_b_valid_x, 3), |
| 558 | GROUP(tsin_b_sop_x, 3), |
| 559 | GROUP(tsin_b_din0_x, 3), |
| 560 | GROUP(tsin_b_clk_x, 3), |
| 561 | GROUP(pdm_din0_x, 2), |
| 562 | GROUP(pdm_din1_x, 2), |
| 563 | GROUP(pdm_din2_x, 2), |
| 564 | GROUP(pdm_din3_x, 2), |
| 565 | GROUP(pdm_dclk_x, 2), |
| 566 | GROUP(tdm_a_slv_sclk, 2), |
| 567 | GROUP(tdm_a_slv_fs, 2), |
| 568 | GROUP(tdm_a_din0, 2), |
| 569 | GROUP(tdm_a_din1, 2), |
| 570 | GROUP(tdm_a_sclk, 1), |
| 571 | GROUP(tdm_a_fs, 1), |
| 572 | GROUP(tdm_a_dout0, 1), |
| 573 | GROUP(tdm_a_dout1, 1), |
| 574 | GROUP(mclk1_x, 2), |
| 575 | |
| 576 | /* bank GPIOC */ |
| 577 | GROUP(sdcard_d0_c, 1), |
| 578 | GROUP(sdcard_d1_c, 1), |
| 579 | GROUP(sdcard_d2_c, 1), |
| 580 | GROUP(sdcard_d3_c, 1), |
| 581 | GROUP(sdcard_clk_c, 1), |
| 582 | GROUP(sdcard_cmd_c, 1), |
| 583 | GROUP(spi0_mosi_c, 5), |
| 584 | GROUP(spi0_miso_c, 5), |
| 585 | GROUP(spi0_ss0_c, 5), |
| 586 | GROUP(spi0_clk_c, 5), |
| 587 | GROUP(i2c0_sda_c, 3), |
| 588 | GROUP(i2c0_sck_c, 3), |
| 589 | GROUP(uart_ao_a_rx_c, 2), |
| 590 | GROUP(uart_ao_a_tx_c, 2), |
| 591 | GROUP(iso7816_clk_c, 5), |
| 592 | GROUP(iso7816_data_c, 5), |
| 593 | GROUP(pwm_c_c, 5), |
| 594 | GROUP(jtag_b_tdo, 2), |
| 595 | GROUP(jtag_b_tdi, 2), |
| 596 | GROUP(jtag_b_clk, 2), |
| 597 | GROUP(jtag_b_tms, 2), |
| 598 | GROUP(pdm_din0_c, 4), |
| 599 | GROUP(pdm_din1_c, 4), |
| 600 | GROUP(pdm_din2_c, 4), |
| 601 | GROUP(pdm_din3_c, 4), |
| 602 | GROUP(pdm_dclk_c, 4), |
| 603 | |
| 604 | /* bank GPIOH */ |
| 605 | GROUP(spi1_mosi, 3), |
| 606 | GROUP(spi1_miso, 3), |
| 607 | GROUP(spi1_ss0, 3), |
| 608 | GROUP(spi1_clk, 3), |
| 609 | GROUP(i2c1_sda_h2, 2), |
| 610 | GROUP(i2c1_sck_h3, 2), |
| 611 | GROUP(i2c1_sda_h6, 4), |
| 612 | GROUP(i2c1_sck_h7, 4), |
| 613 | GROUP(i2c3_sda_h, 2), |
| 614 | GROUP(i2c3_sck_h, 2), |
| 615 | GROUP(uart_c_tx, 2), |
| 616 | GROUP(uart_c_rx, 2), |
| 617 | GROUP(uart_c_cts, 2), |
| 618 | GROUP(uart_c_rts, 2), |
| 619 | GROUP(iso7816_clk_h, 1), |
| 620 | GROUP(iso7816_data_h, 1), |
| 621 | GROUP(pwm_f_h, 4), |
| 622 | GROUP(cec_ao_a_h, 4), |
| 623 | GROUP(cec_ao_b_h, 5), |
| 624 | GROUP(hdmitx_sda, 1), |
| 625 | GROUP(hdmitx_sck, 1), |
| 626 | GROUP(hdmitx_hpd_in, 1), |
| 627 | GROUP(spdif_out_h, 1), |
| 628 | GROUP(spdif_in_h, 1), |
| 629 | GROUP(tdm_b_din3_h, 6), |
| 630 | GROUP(tdm_b_dout3_h, 5), |
| 631 | |
| 632 | /* bank GPIOA */ |
| 633 | GROUP(i2c3_sda_a, 2), |
| 634 | GROUP(i2c3_sck_a, 2), |
| 635 | GROUP(pdm_din0_a, 1), |
| 636 | GROUP(pdm_din1_a, 1), |
| 637 | GROUP(pdm_din2_a, 1), |
| 638 | GROUP(pdm_din3_a, 1), |
| 639 | GROUP(pdm_dclk_a, 1), |
| 640 | GROUP(spdif_in_a10, 1), |
| 641 | GROUP(spdif_in_a12, 1), |
| 642 | GROUP(spdif_out_a11, 1), |
| 643 | GROUP(spdif_out_a13, 1), |
| 644 | GROUP(tdm_b_slv_sclk, 2), |
| 645 | GROUP(tdm_b_slv_fs, 2), |
| 646 | GROUP(tdm_b_din0, 2), |
| 647 | GROUP(tdm_b_din1, 2), |
| 648 | GROUP(tdm_b_din2, 2), |
| 649 | GROUP(tdm_b_din3_a, 2), |
| 650 | GROUP(tdm_b_sclk, 1), |
| 651 | GROUP(tdm_b_fs, 1), |
| 652 | GROUP(tdm_b_dout0, 1), |
| 653 | GROUP(tdm_b_dout1, 1), |
| 654 | GROUP(tdm_b_dout2, 3), |
| 655 | GROUP(tdm_b_dout3_a, 3), |
| 656 | GROUP(tdm_c_slv_sclk_a, 3), |
| 657 | GROUP(tdm_c_slv_fs_a, 3), |
| 658 | GROUP(tdm_c_din0_a, 3), |
| 659 | GROUP(tdm_c_din1_a, 3), |
| 660 | GROUP(tdm_c_din2_a, 3), |
| 661 | GROUP(tdm_c_din3_a, 3), |
| 662 | GROUP(tdm_c_sclk_a, 2), |
| 663 | GROUP(tdm_c_fs_a, 2), |
| 664 | GROUP(tdm_c_dout0_a, 2), |
| 665 | GROUP(tdm_c_dout1_a, 2), |
| 666 | GROUP(tdm_c_dout2_a, 2), |
| 667 | GROUP(tdm_c_dout3_a, 2), |
| 668 | GROUP(mclk0_a, 1), |
| 669 | GROUP(mclk1_a, 2), |
| 670 | }; |
| 671 | |
| 672 | /* uart_ao_a */ |
| 673 | static const unsigned int uart_ao_a_tx_pins[] = { GPIOAO_0 }; |
| 674 | static const unsigned int uart_ao_a_rx_pins[] = { GPIOAO_1 }; |
| 675 | static const unsigned int uart_ao_a_cts_pins[] = { GPIOE_0 }; |
| 676 | static const unsigned int uart_ao_a_rts_pins[] = { GPIOE_1 }; |
| 677 | |
| 678 | /* uart_ao_b */ |
| 679 | static const unsigned int uart_ao_b_tx_2_pins[] = { GPIOAO_2 }; |
| 680 | static const unsigned int uart_ao_b_rx_3_pins[] = { GPIOAO_3 }; |
| 681 | static const unsigned int uart_ao_b_tx_8_pins[] = { GPIOAO_8 }; |
| 682 | static const unsigned int uart_ao_b_rx_9_pins[] = { GPIOAO_9 }; |
| 683 | static const unsigned int uart_ao_b_cts_pins[] = { GPIOE_0 }; |
| 684 | static const unsigned int uart_ao_b_rts_pins[] = { GPIOE_1 }; |
| 685 | |
| 686 | /* i2c_ao */ |
| 687 | static const unsigned int i2c_ao_sck_pins[] = { GPIOAO_2 }; |
| 688 | static const unsigned int i2c_ao_sda_pins[] = { GPIOAO_3 }; |
| 689 | |
| 690 | static const unsigned int i2c_ao_sck_e_pins[] = { GPIOE_0 }; |
| 691 | static const unsigned int i2c_ao_sda_e_pins[] = { GPIOE_1 }; |
| 692 | |
| 693 | /* i2c_ao_slave */ |
| 694 | static const unsigned int i2c_ao_slave_sck_pins[] = { GPIOAO_2 }; |
| 695 | static const unsigned int i2c_ao_slave_sda_pins[] = { GPIOAO_3 }; |
| 696 | |
| 697 | /* ir_in */ |
| 698 | static const unsigned int remote_ao_input_pins[] = { GPIOAO_5 }; |
| 699 | |
| 700 | /* ir_out */ |
| 701 | static const unsigned int remote_ao_out_pins[] = { GPIOAO_4 }; |
| 702 | |
| 703 | /* pwm_ao_a */ |
| 704 | static const unsigned int pwm_ao_a_pins[] = { GPIOAO_11 }; |
| 705 | static const unsigned int pwm_ao_a_hiz_pins[] = { GPIOAO_11 }; |
| 706 | |
| 707 | /* pwm_ao_b */ |
| 708 | static const unsigned int pwm_ao_b_pins[] = { GPIOE_0 }; |
| 709 | |
| 710 | /* pwm_ao_c */ |
| 711 | static const unsigned int pwm_ao_c_4_pins[] = { GPIOAO_4 }; |
| 712 | static const unsigned int pwm_ao_c_hiz_pins[] = { GPIOAO_4 }; |
| 713 | static const unsigned int pwm_ao_c_6_pins[] = { GPIOAO_6 }; |
| 714 | |
| 715 | /* pwm_ao_d */ |
| 716 | static const unsigned int pwm_ao_d_5_pins[] = { GPIOAO_5 }; |
| 717 | static const unsigned int pwm_ao_d_10_pins[] = { GPIOAO_10 }; |
| 718 | static const unsigned int pwm_ao_d_e_pins[] = { GPIOE_1 }; |
| 719 | |
| 720 | /* jtag_a */ |
| 721 | static const unsigned int jtag_a_tdi_pins[] = { GPIOAO_8 }; |
| 722 | static const unsigned int jtag_a_tdo_pins[] = { GPIOAO_9 }; |
| 723 | static const unsigned int jtag_a_clk_pins[] = { GPIOAO_6 }; |
| 724 | static const unsigned int jtag_a_tms_pins[] = { GPIOAO_7 }; |
| 725 | |
| 726 | /* cec_ao */ |
| 727 | static const unsigned int cec_ao_a_pins[] = { GPIOAO_10 }; |
| 728 | static const unsigned int cec_ao_b_pins[] = { GPIOAO_10 }; |
| 729 | |
| 730 | /* tsin_ao_a */ |
| 731 | static const unsigned int tsin_ao_asop_pins[] = { GPIOAO_6 }; |
| 732 | static const unsigned int tsin_ao_adin0_pins[] = { GPIOAO_7 }; |
| 733 | static const unsigned int tsin_ao_aclk_pins[] = { GPIOAO_8 }; |
| 734 | static const unsigned int tsin_ao_a_valid_pins[] = { GPIOAO_9 }; |
| 735 | |
| 736 | /* spdif_ao_out */ |
| 737 | static const unsigned int spdif_ao_out_pins[] = { GPIOAO_10 }; |
| 738 | |
| 739 | /* tdm_ao_b */ |
| 740 | static const unsigned int tdm_ao_b_slv_fs_pins[] = { GPIOAO_7 }; |
| 741 | static const unsigned int tdm_ao_b_slv_sclk_pins[] = { GPIOAO_8 }; |
| 742 | static const unsigned int tdm_ao_b_fs_pins[] = { GPIOAO_7 }; |
| 743 | static const unsigned int tdm_ao_b_sclk_pins[] = { GPIOAO_8 }; |
| 744 | static const unsigned int tdm_ao_b_din0_pins[] = { GPIOAO_4 }; |
| 745 | static const unsigned int tdm_ao_b_din1_pins[] = { GPIOAO_10 }; |
| 746 | static const unsigned int tdm_ao_b_din2_pins[] = { GPIOAO_6 }; |
| 747 | static const unsigned int tdm_ao_b_dout0_pins[] = { GPIOAO_4 }; |
| 748 | static const unsigned int tdm_ao_b_dout1_pins[] = { GPIOAO_10 }; |
| 749 | static const unsigned int tdm_ao_b_dout2_pins[] = { GPIOAO_6 }; |
| 750 | |
| 751 | /* mclk0_ao */ |
| 752 | static const unsigned int mclk0_ao_pins[] = { GPIOAO_9 }; |
| 753 | |
| 754 | static struct meson_pmx_group meson_g12a_aobus_groups[] = { |
| 755 | GPIO_GROUP(GPIOAO_0, 0), |
| 756 | GPIO_GROUP(GPIOAO_1, 0), |
| 757 | GPIO_GROUP(GPIOAO_2, 0), |
| 758 | GPIO_GROUP(GPIOAO_3, 0), |
| 759 | GPIO_GROUP(GPIOAO_4, 0), |
| 760 | GPIO_GROUP(GPIOAO_5, 0), |
| 761 | GPIO_GROUP(GPIOAO_6, 0), |
| 762 | GPIO_GROUP(GPIOAO_7, 0), |
| 763 | GPIO_GROUP(GPIOAO_8, 0), |
| 764 | GPIO_GROUP(GPIOAO_9, 0), |
| 765 | GPIO_GROUP(GPIOAO_10, 0), |
| 766 | GPIO_GROUP(GPIOAO_11, 0), |
| 767 | GPIO_GROUP(GPIOE_0, 0), |
| 768 | GPIO_GROUP(GPIOE_1, 0), |
| 769 | GPIO_GROUP(GPIOE_2, 0), |
| 770 | |
| 771 | /* bank AO */ |
| 772 | GROUP(uart_ao_a_tx, 1), |
| 773 | GROUP(uart_ao_a_rx, 1), |
| 774 | GROUP(uart_ao_a_cts, 1), |
| 775 | GROUP(uart_ao_a_rts, 1), |
| 776 | GROUP(uart_ao_b_tx_2, 2), |
| 777 | GROUP(uart_ao_b_rx_3, 2), |
| 778 | GROUP(uart_ao_b_tx_8, 3), |
| 779 | GROUP(uart_ao_b_rx_9, 3), |
| 780 | GROUP(uart_ao_b_cts, 2), |
| 781 | GROUP(uart_ao_b_rts, 2), |
| 782 | GROUP(i2c_ao_sck, 1), |
| 783 | GROUP(i2c_ao_sda, 1), |
| 784 | GROUP(i2c_ao_sck_e, 4), |
| 785 | GROUP(i2c_ao_sda_e, 4), |
| 786 | GROUP(i2c_ao_slave_sck, 3), |
| 787 | GROUP(i2c_ao_slave_sda, 3), |
| 788 | GROUP(remote_ao_input, 1), |
| 789 | GROUP(remote_ao_out, 1), |
| 790 | GROUP(pwm_ao_a, 3), |
| 791 | GROUP(pwm_ao_a_hiz, 2), |
| 792 | GROUP(pwm_ao_b, 3), |
| 793 | GROUP(pwm_ao_c_4, 3), |
| 794 | GROUP(pwm_ao_c_hiz, 4), |
| 795 | GROUP(pwm_ao_c_6, 3), |
| 796 | GROUP(pwm_ao_d_5, 3), |
| 797 | GROUP(pwm_ao_d_10, 3), |
| 798 | GROUP(pwm_ao_d_e, 3), |
| 799 | GROUP(jtag_a_tdi, 1), |
| 800 | GROUP(jtag_a_tdo, 1), |
| 801 | GROUP(jtag_a_clk, 1), |
| 802 | GROUP(jtag_a_tms, 1), |
| 803 | GROUP(cec_ao_a, 1), |
| 804 | GROUP(cec_ao_b, 2), |
| 805 | GROUP(tsin_ao_asop, 4), |
| 806 | GROUP(tsin_ao_adin0, 4), |
| 807 | GROUP(tsin_ao_aclk, 4), |
| 808 | GROUP(tsin_ao_a_valid, 4), |
| 809 | GROUP(spdif_ao_out, 4), |
| 810 | GROUP(tdm_ao_b_dout0, 5), |
| 811 | GROUP(tdm_ao_b_dout1, 5), |
| 812 | GROUP(tdm_ao_b_dout2, 5), |
| 813 | GROUP(tdm_ao_b_fs, 5), |
| 814 | GROUP(tdm_ao_b_sclk, 5), |
| 815 | GROUP(tdm_ao_b_din0, 6), |
| 816 | GROUP(tdm_ao_b_din1, 6), |
| 817 | GROUP(tdm_ao_b_din2, 6), |
| 818 | GROUP(tdm_ao_b_slv_fs, 6), |
| 819 | GROUP(tdm_ao_b_slv_sclk, 6), |
| 820 | GROUP(mclk0_ao, 5), |
| 821 | }; |
| 822 | |
| 823 | static const char * const gpio_periphs_groups[] = { |
| 824 | "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", |
| 825 | "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", |
| 826 | "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", |
| 827 | "GPIOZ_15", |
| 828 | |
| 829 | "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", |
| 830 | "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", |
| 831 | |
| 832 | "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", |
| 833 | "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", |
| 834 | "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", |
| 835 | "BOOT_15", |
| 836 | |
| 837 | "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_4", |
| 838 | "GPIOC_5", "GPIOC_6", "GPIOC_7", |
| 839 | |
| 840 | "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4", |
| 841 | "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9", |
| 842 | "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14", |
| 843 | "GPIOA_15", |
| 844 | |
| 845 | "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", |
| 846 | "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", |
| 847 | "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", |
| 848 | "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", |
| 849 | }; |
| 850 | |
| 851 | static const char * const emmc_groups[] = { |
| 852 | "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", |
| 853 | "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", |
| 854 | "emmc_nand_d6", "emmc_nand_d7", |
| 855 | "emmc_clk", "emmc_cmd", "emmc_nand_ds", |
| 856 | }; |
| 857 | |
| 858 | static const char * const nand_groups[] = { |
| 859 | "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2", |
| 860 | "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5", |
| 861 | "emmc_nand_d6", "emmc_nand_d7", |
| 862 | "nand_ce0", "nand_ale", "nand_cle", |
| 863 | "nand_wen_clk", "nand_ren_wr", "nand_rb0", |
| 864 | "emmc_nand_ds", "nand_ce1", |
| 865 | }; |
| 866 | |
| 867 | static const char * const nor_groups[] = { |
| 868 | "nor_d", "nor_q", "nor_c", "nor_cs", |
| 869 | "nor_hold", "nor_wp", |
| 870 | }; |
| 871 | |
| 872 | static const char * const sdio_groups[] = { |
| 873 | "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", |
| 874 | "sdio_cmd", "sdio_clk", "sdio_dummy", |
| 875 | }; |
| 876 | |
| 877 | static const char * const sdcard_groups[] = { |
| 878 | "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c", |
| 879 | "sdcard_clk_c", "sdcard_cmd_c", |
| 880 | "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z", |
| 881 | "sdcard_clk_z", "sdcard_cmd_z", |
| 882 | }; |
| 883 | |
| 884 | static const char * const spi0_groups[] = { |
| 885 | "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c", |
| 886 | "spi0_mosi_x", "spi0_miso_x", "spi0_ss0_x", "spi0_clk_x", |
| 887 | }; |
| 888 | |
| 889 | static const char * const spi1_groups[] = { |
| 890 | "spi1_mosi", "spi1_miso", "spi1_ss0", "spi1_clk", |
| 891 | }; |
| 892 | |
| 893 | static const char * const i2c0_groups[] = { |
| 894 | "i2c0_sda_c", "i2c0_sck_c", |
| 895 | "i2c0_sda_z0", "i2c0_sck_z1", |
| 896 | "i2c0_sda_z7", "i2c0_sck_z8", |
| 897 | }; |
| 898 | |
| 899 | static const char * const i2c1_groups[] = { |
| 900 | "i2c1_sda_x", "i2c1_sck_x", |
| 901 | "i2c1_sda_h2", "i2c1_sck_h3", |
| 902 | "i2c1_sda_h6", "i2c1_sck_h7", |
| 903 | }; |
| 904 | |
| 905 | static const char * const i2c2_groups[] = { |
| 906 | "i2c2_sda_x", "i2c2_sck_x", |
| 907 | "i2c2_sda_z", "i2c2_sck_z", |
| 908 | }; |
| 909 | |
| 910 | static const char * const i2c3_groups[] = { |
| 911 | "i2c3_sda_h", "i2c3_sck_h", |
| 912 | "i2c3_sda_a", "i2c3_sck_a", |
| 913 | }; |
| 914 | |
| 915 | static const char * const uart_a_groups[] = { |
| 916 | "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts", |
| 917 | }; |
| 918 | |
| 919 | static const char * const uart_b_groups[] = { |
| 920 | "uart_b_tx", "uart_b_rx", |
| 921 | }; |
| 922 | |
| 923 | static const char * const uart_c_groups[] = { |
| 924 | "uart_c_tx", "uart_c_rx", "uart_c_cts", "uart_c_rts", |
| 925 | }; |
| 926 | |
| 927 | static const char * const uart_ao_a_c_groups[] = { |
| 928 | "uart_ao_a_rx_c", "uart_ao_a_tx_c", |
| 929 | }; |
| 930 | |
| 931 | static const char * const iso7816_groups[] = { |
| 932 | "iso7816_clk_c", "iso7816_data_c", |
| 933 | "iso7816_clk_x", "iso7816_data_x", |
| 934 | "iso7816_clk_h", "iso7816_data_h", |
| 935 | "iso7816_clk_z", "iso7816_data_z", |
| 936 | }; |
| 937 | |
| 938 | static const char * const eth_groups[] = { |
| 939 | "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk", |
| 940 | "eth_txd2_rgmii", "eth_txd3_rgmii", "eth_rgmii_rx_clk", |
| 941 | "eth_txd0", "eth_txd1", "eth_txen", "eth_mdc", |
| 942 | "eth_rxd0", "eth_rxd1", "eth_rx_dv", "eth_mdio", |
| 943 | "eth_link_led", "eth_act_led", |
| 944 | }; |
| 945 | |
| 946 | static const char * const pwm_a_groups[] = { |
| 947 | "pwm_a", |
| 948 | }; |
| 949 | |
| 950 | static const char * const pwm_b_groups[] = { |
| 951 | "pwm_b_x7", "pwm_b_x19", |
| 952 | }; |
| 953 | |
| 954 | static const char * const pwm_c_groups[] = { |
| 955 | "pwm_c_c", "pwm_c_x5", "pwm_c_x8", |
| 956 | }; |
| 957 | |
| 958 | static const char * const pwm_d_groups[] = { |
| 959 | "pwm_d_x3", "pwm_d_x6", |
| 960 | }; |
| 961 | |
| 962 | static const char * const pwm_e_groups[] = { |
| 963 | "pwm_e", |
| 964 | }; |
| 965 | |
| 966 | static const char * const pwm_f_groups[] = { |
| 967 | "pwm_f_x", "pwm_f_h", |
| 968 | }; |
| 969 | |
| 970 | static const char * const cec_ao_a_h_groups[] = { |
| 971 | "cec_ao_a_h", |
| 972 | }; |
| 973 | |
| 974 | static const char * const cec_ao_b_h_groups[] = { |
| 975 | "cec_ao_b_h", |
| 976 | }; |
| 977 | |
| 978 | static const char * const jtag_b_groups[] = { |
| 979 | "jtag_b_tdi", "jtag_b_tdo", "jtag_b_clk", "jtag_b_tms", |
| 980 | }; |
| 981 | |
| 982 | static const char * const bt565_a_groups[] = { |
| 983 | "bt565_a_vs", "bt565_a_hs", "bt565_a_clk", |
| 984 | "bt565_a_din0", "bt565_a_din1", "bt565_a_din2", |
| 985 | "bt565_a_din3", "bt565_a_din4", "bt565_a_din5", |
| 986 | "bt565_a_din6", "bt565_a_din7", |
| 987 | }; |
| 988 | |
| 989 | static const char * const tsin_a_groups[] = { |
| 990 | "tsin_a_valid", "tsin_a_sop", "tsin_a_din0", |
| 991 | "tsin_a_clk", |
| 992 | }; |
| 993 | |
| 994 | static const char * const tsin_b_groups[] = { |
| 995 | "tsin_b_valid_x", "tsin_b_sop_x", "tsin_b_din0_x", "tsin_b_clk_x", |
| 996 | "tsin_b_valid_z", "tsin_b_sop_z", "tsin_b_din0_z", "tsin_b_clk_z", |
| 997 | "tsin_b_fail", "tsin_b_din1", "tsin_b_din2", "tsin_b_din3", |
| 998 | "tsin_b_din4", "tsin_b_din5", "tsin_b_din6", "tsin_b_din7", |
| 999 | }; |
| 1000 | |
| 1001 | static const char * const hdmitx_groups[] = { |
| 1002 | "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in", |
| 1003 | }; |
| 1004 | |
| 1005 | static const char * const pdm_groups[] = { |
| 1006 | "pdm_din0_c", "pdm_din1_c", "pdm_din2_c", "pdm_din3_c", |
| 1007 | "pdm_dclk_c", |
| 1008 | "pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_din3_x", |
| 1009 | "pdm_dclk_x", |
| 1010 | "pdm_din0_z", "pdm_din1_z", "pdm_din2_z", "pdm_din3_z", |
| 1011 | "pdm_dclk_z", |
| 1012 | "pdm_din0_a", "pdm_din1_a", "pdm_din2_a", "pdm_din3_a", |
| 1013 | "pdm_dclk_a", |
| 1014 | }; |
| 1015 | |
| 1016 | static const char * const spdif_in_groups[] = { |
| 1017 | "spdif_in_h", "spdif_in_a10", "spdif_in_a12", |
| 1018 | }; |
| 1019 | |
| 1020 | static const char * const spdif_out_groups[] = { |
| 1021 | "spdif_out_h", "spdif_out_a11", "spdif_out_a13", |
| 1022 | }; |
| 1023 | |
| 1024 | static const char * const mclk0_groups[] = { |
| 1025 | "mclk0_a", |
| 1026 | }; |
| 1027 | |
| 1028 | static const char * const mclk1_groups[] = { |
| 1029 | "mclk1_x", "mclk1_z", "mclk1_a", |
| 1030 | }; |
| 1031 | |
| 1032 | static const char * const tdm_a_groups[] = { |
| 1033 | "tdm_a_slv_sclk", "tdm_a_slv_fs", "tdm_a_sclk", "tdm_a_fs", |
| 1034 | "tdm_a_din0", "tdm_a_din1", "tdm_a_dout0", "tdm_a_dout1", |
| 1035 | }; |
| 1036 | |
| 1037 | static const char * const tdm_b_groups[] = { |
| 1038 | "tdm_b_slv_sclk", "tdm_b_slv_fs", "tdm_b_sclk", "tdm_b_fs", |
| 1039 | "tdm_b_din0", "tdm_b_din1", "tdm_b_din2", |
| 1040 | "tdm_b_din3_a", "tdm_b_din3_h", |
| 1041 | "tdm_b_dout0", "tdm_b_dout1", "tdm_b_dout2", |
| 1042 | "tdm_b_dout3_a", "tdm_b_dout3_h", |
| 1043 | }; |
| 1044 | |
| 1045 | static const char * const tdm_c_groups[] = { |
| 1046 | "tdm_c_slv_sclk_a", "tdm_c_slv_fs_a", |
| 1047 | "tdm_c_slv_sclk_z", "tdm_c_slv_fs_z", |
| 1048 | "tdm_c_sclk_a", "tdm_c_fs_a", |
| 1049 | "tdm_c_sclk_z", "tdm_c_fs_z", |
| 1050 | "tdm_c_din0_a", "tdm_c_din1_a", |
| 1051 | "tdm_c_din2_a", "tdm_c_din3_a", |
| 1052 | "tdm_c_din0_z", "tdm_c_din1_z", |
| 1053 | "tdm_c_din2_z", "tdm_c_din3_z", |
| 1054 | "tdm_c_dout0_a", "tdm_c_dout1_a", |
| 1055 | "tdm_c_dout2_a", "tdm_c_dout3_a", |
| 1056 | "tdm_c_dout0_z", "tdm_c_dout1_z", |
| 1057 | "tdm_c_dout2_z", "tdm_c_dout3_z", |
| 1058 | }; |
| 1059 | |
| 1060 | static const char * const gpio_aobus_groups[] = { |
| 1061 | "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", |
| 1062 | "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", |
| 1063 | "GPIOAO_10", "GPIOAO_11", "GPIOE_0", "GPIOE_1", "GPIOE_2", |
| 1064 | }; |
| 1065 | |
| 1066 | static const char * const uart_ao_a_groups[] = { |
| 1067 | "uart_ao_a_tx", "uart_ao_a_rx", |
| 1068 | "uart_ao_a_cts", "uart_ao_a_rts", |
| 1069 | }; |
| 1070 | |
| 1071 | static const char * const uart_ao_b_groups[] = { |
| 1072 | "uart_ao_b_tx_2", "uart_ao_b_rx_3", |
| 1073 | "uart_ao_b_tx_8", "uart_ao_b_rx_9", |
| 1074 | "uart_ao_b_cts", "uart_ao_b_rts", |
| 1075 | }; |
| 1076 | |
| 1077 | static const char * const i2c_ao_groups[] = { |
| 1078 | "i2c_ao_sck", "i2c_ao_sda", |
| 1079 | "i2c_ao_sck_e", "i2c_ao_sda_e", |
| 1080 | }; |
| 1081 | |
| 1082 | static const char * const i2c_ao_slave_groups[] = { |
| 1083 | "i2c_ao_slave_sck", "i2c_ao_slave_sda", |
| 1084 | }; |
| 1085 | |
| 1086 | static const char * const remote_ao_input_groups[] = { |
| 1087 | "remote_ao_input", |
| 1088 | }; |
| 1089 | |
| 1090 | static const char * const remote_ao_out_groups[] = { |
| 1091 | "remote_ao_out", |
| 1092 | }; |
| 1093 | |
| 1094 | static const char * const pwm_ao_a_groups[] = { |
| 1095 | "pwm_ao_a", "pwm_ao_a_hiz", |
| 1096 | }; |
| 1097 | |
| 1098 | static const char * const pwm_ao_b_groups[] = { |
| 1099 | "pwm_ao_b", |
| 1100 | }; |
| 1101 | |
| 1102 | static const char * const pwm_ao_c_groups[] = { |
| 1103 | "pwm_ao_c_4", "pwm_ao_c_hiz", |
| 1104 | "pwm_ao_c_6", |
| 1105 | }; |
| 1106 | |
| 1107 | static const char * const pwm_ao_d_groups[] = { |
| 1108 | "pwm_ao_d_5", "pwm_ao_d_10", "pwm_ao_d_e", |
| 1109 | }; |
| 1110 | |
| 1111 | static const char * const jtag_a_groups[] = { |
| 1112 | "jtag_a_tdi", "jtag_a_tdo", "jtag_a_clk", "jtag_a_tms", |
| 1113 | }; |
| 1114 | |
| 1115 | static const char * const cec_ao_a_groups[] = { |
| 1116 | "cec_ao_a", |
| 1117 | }; |
| 1118 | |
| 1119 | static const char * const cec_ao_b_groups[] = { |
| 1120 | "cec_ao_b", |
| 1121 | }; |
| 1122 | |
| 1123 | static const char * const tsin_ao_a_groups[] = { |
| 1124 | "tsin_ao_asop", "tsin_ao_adin0", "tsin_ao_aclk", "tsin_ao_a_valid", |
| 1125 | }; |
| 1126 | |
| 1127 | static const char * const spdif_ao_out_groups[] = { |
| 1128 | "spdif_ao_out", |
| 1129 | }; |
| 1130 | |
| 1131 | static const char * const tdm_ao_b_groups[] = { |
| 1132 | "tdm_ao_b_dout0", "tdm_ao_b_dout1", "tdm_ao_b_dout2", |
| 1133 | "tdm_ao_b_fs", "tdm_ao_b_sclk", |
| 1134 | "tdm_ao_b_din0", "tdm_ao_b_din1", "tdm_ao_b_din2", |
| 1135 | "tdm_ao_b_slv_fs", "tdm_ao_b_slv_sclk", |
| 1136 | }; |
| 1137 | |
| 1138 | static const char * const mclk0_ao_groups[] = { |
| 1139 | "mclk0_ao", |
| 1140 | }; |
| 1141 | |
| 1142 | static struct meson_pmx_func meson_g12a_periphs_functions[] = { |
| 1143 | FUNCTION(gpio_periphs), |
| 1144 | FUNCTION(emmc), |
| 1145 | FUNCTION(nor), |
| 1146 | FUNCTION(spi0), |
| 1147 | FUNCTION(spi1), |
| 1148 | FUNCTION(sdio), |
| 1149 | FUNCTION(nand), |
| 1150 | FUNCTION(sdcard), |
| 1151 | FUNCTION(i2c0), |
| 1152 | FUNCTION(i2c1), |
| 1153 | FUNCTION(i2c2), |
| 1154 | FUNCTION(i2c3), |
| 1155 | FUNCTION(uart_a), |
| 1156 | FUNCTION(uart_b), |
| 1157 | FUNCTION(uart_c), |
| 1158 | FUNCTION(uart_ao_a_c), |
| 1159 | FUNCTION(iso7816), |
| 1160 | FUNCTION(eth), |
| 1161 | FUNCTION(pwm_a), |
| 1162 | FUNCTION(pwm_b), |
| 1163 | FUNCTION(pwm_c), |
| 1164 | FUNCTION(pwm_d), |
| 1165 | FUNCTION(pwm_e), |
| 1166 | FUNCTION(pwm_f), |
| 1167 | FUNCTION(cec_ao_a_h), |
| 1168 | FUNCTION(cec_ao_b_h), |
| 1169 | FUNCTION(jtag_b), |
| 1170 | FUNCTION(bt565_a), |
| 1171 | FUNCTION(tsin_a), |
| 1172 | FUNCTION(tsin_b), |
| 1173 | FUNCTION(hdmitx), |
| 1174 | FUNCTION(pdm), |
| 1175 | FUNCTION(spdif_out), |
| 1176 | FUNCTION(spdif_in), |
| 1177 | FUNCTION(mclk0), |
| 1178 | FUNCTION(mclk1), |
| 1179 | FUNCTION(tdm_a), |
| 1180 | FUNCTION(tdm_b), |
| 1181 | FUNCTION(tdm_c), |
| 1182 | }; |
| 1183 | |
| 1184 | static struct meson_pmx_func meson_g12a_aobus_functions[] = { |
| 1185 | FUNCTION(gpio_aobus), |
| 1186 | FUNCTION(uart_ao_a), |
| 1187 | FUNCTION(uart_ao_b), |
| 1188 | FUNCTION(i2c_ao), |
| 1189 | FUNCTION(i2c_ao_slave), |
| 1190 | FUNCTION(remote_ao_input), |
| 1191 | FUNCTION(remote_ao_out), |
| 1192 | FUNCTION(pwm_ao_a), |
| 1193 | FUNCTION(pwm_ao_b), |
| 1194 | FUNCTION(pwm_ao_c), |
| 1195 | FUNCTION(pwm_ao_d), |
| 1196 | FUNCTION(jtag_a), |
| 1197 | FUNCTION(cec_ao_a), |
| 1198 | FUNCTION(cec_ao_b), |
| 1199 | FUNCTION(tsin_ao_a), |
| 1200 | FUNCTION(spdif_ao_out), |
| 1201 | FUNCTION(tdm_ao_b), |
| 1202 | FUNCTION(mclk0_ao), |
| 1203 | }; |
| 1204 | |
| 1205 | static struct meson_bank meson_g12a_periphs_banks[] = { |
Guillaume La Roque | 0de800e | 2019-06-04 13:53:08 +0200 | [diff] [blame] | 1206 | /* name first last pullen pull dir out in ds*/ |
| 1207 | BANK_DS("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0, 5, 0), |
| 1208 | BANK_DS("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_8, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0, 4, 0), |
| 1209 | BANK_DS("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 0), |
| 1210 | BANK_DS("C", PIN(GPIOC_0, EE_OFF), PIN(GPIOC_7, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0, 1, 0), |
| 1211 | BANK_DS("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_15, EE_OFF), 5, 0, 5, 0, 16, 0, 17, 0, 18, 0, 6, 0), |
| 1212 | BANK_DS("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_19, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0, 2, 0), |
Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 1213 | }; |
| 1214 | |
| 1215 | static struct meson_bank meson_g12a_aobus_banks[] = { |
Guillaume La Roque | 0de800e | 2019-06-04 13:53:08 +0200 | [diff] [blame] | 1216 | /* name first last pullen pull dir out in ds*/ |
| 1217 | BANK_DS("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_11, 0), 3, 0, 2, 0, 0, 0, 4, 0, 1, 0, 0, 0), |
| 1218 | BANK_DS("E", PIN(GPIOE_0, 0), PIN(GPIOE_2, 0), 3, 16, 2, 16, 0, 16, 4, 16, 1, 16, 1, 0), |
Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 1219 | }; |
| 1220 | |
| 1221 | static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = { |
Wolfgang Denk | 62fb2b4 | 2021-09-27 17:42:39 +0200 | [diff] [blame] | 1222 | /* name first last reg offset */ |
Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 1223 | BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_15, EE_OFF), 0x6, 0), |
| 1224 | BANK_PMX("H", PIN(GPIOH_0, EE_OFF), PIN(GPIOH_8, EE_OFF), 0xb, 0), |
| 1225 | BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_15, EE_OFF), 0x0, 0), |
| 1226 | BANK_PMX("C", PIN(GPIOC_0, EE_OFF), PIN(GPIOC_7, EE_OFF), 0x9, 0), |
| 1227 | BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_15, EE_OFF), 0xd, 0), |
| 1228 | BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_19, EE_OFF), 0x3, 0), |
| 1229 | }; |
| 1230 | |
| 1231 | static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = { |
| 1232 | .pmx_banks = meson_g12a_periphs_pmx_banks, |
| 1233 | .num_pmx_banks = ARRAY_SIZE(meson_g12a_periphs_pmx_banks), |
| 1234 | }; |
| 1235 | |
| 1236 | static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = { |
| 1237 | BANK_PMX("AO", GPIOAO_0, GPIOAO_11, 0x0, 0), |
| 1238 | BANK_PMX("E", GPIOE_0, GPIOE_2, 0x1, 16), |
| 1239 | }; |
| 1240 | |
| 1241 | static struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = { |
| 1242 | .pmx_banks = meson_g12a_aobus_pmx_banks, |
| 1243 | .num_pmx_banks = ARRAY_SIZE(meson_g12a_aobus_pmx_banks), |
| 1244 | }; |
| 1245 | |
| 1246 | static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = { |
| 1247 | .name = "periphs-banks", |
| 1248 | .pin_base = EE_OFF, |
| 1249 | .groups = meson_g12a_periphs_groups, |
| 1250 | .funcs = meson_g12a_periphs_functions, |
| 1251 | .banks = meson_g12a_periphs_banks, |
| 1252 | .num_pins = 85, |
| 1253 | .num_groups = ARRAY_SIZE(meson_g12a_periphs_groups), |
| 1254 | .num_funcs = ARRAY_SIZE(meson_g12a_periphs_functions), |
| 1255 | .num_banks = ARRAY_SIZE(meson_g12a_periphs_banks), |
| 1256 | .gpio_driver = &meson_axg_gpio_driver, |
| 1257 | .pmx_data = &meson_g12a_periphs_pmx_banks_data, |
| 1258 | }; |
| 1259 | |
| 1260 | static struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = { |
| 1261 | .name = "aobus-banks", |
| 1262 | .pin_base = 0, |
| 1263 | .groups = meson_g12a_aobus_groups, |
| 1264 | .funcs = meson_g12a_aobus_functions, |
| 1265 | .banks = meson_g12a_aobus_banks, |
| 1266 | .num_pins = 15, |
| 1267 | .num_groups = ARRAY_SIZE(meson_g12a_aobus_groups), |
| 1268 | .num_funcs = ARRAY_SIZE(meson_g12a_aobus_functions), |
| 1269 | .num_banks = ARRAY_SIZE(meson_g12a_aobus_banks), |
| 1270 | .gpio_driver = &meson_axg_gpio_driver, |
| 1271 | .pmx_data = &meson_g12a_aobus_pmx_banks_data, |
| 1272 | }; |
| 1273 | |
| 1274 | static const struct udevice_id meson_g12a_pinctrl_match[] = { |
| 1275 | { |
| 1276 | .compatible = "amlogic,meson-g12a-periphs-pinctrl", |
| 1277 | .data = (ulong)&meson_g12a_periphs_pinctrl_data, |
| 1278 | }, |
| 1279 | { |
| 1280 | .compatible = "amlogic,meson-g12a-aobus-pinctrl", |
| 1281 | .data = (ulong)&meson_g12a_aobus_pinctrl_data, |
| 1282 | }, |
| 1283 | { }, |
| 1284 | }; |
| 1285 | |
| 1286 | U_BOOT_DRIVER(meson_axg_pinctrl) = { |
| 1287 | .name = "meson-g12a-pinctrl", |
| 1288 | .id = UCLASS_PINCTRL, |
| 1289 | .of_match = of_match_ptr(meson_g12a_pinctrl_match), |
| 1290 | .probe = meson_pinctrl_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 1291 | .priv_auto = sizeof(struct meson_pinctrl), |
Jerome Brunet | 0ff3cd0 | 2019-02-08 17:40:57 +0100 | [diff] [blame] | 1292 | .ops = &meson_axg_pinctrl_ops, |
| 1293 | }; |