| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C Copyright 2009 |
| 4 | * Stefano Babic DENX Software Engineering sbabic@denx.de. |
| 5 | * |
| Patrick Delaunay | 488b6ac | 2020-02-28 15:18:12 +0100 | [diff] [blame] | 6 | * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 7 | * and create imximage boot image |
| 8 | * |
| 9 | * The syntax is taken as close as possible with the kwbimage |
| 10 | */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 11 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 12 | /* |
| 13 | * Boot Device : one of |
| 14 | * spi, sd (the board has no nand neither onenand) |
| 15 | */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 16 | BOOT_FROM spi |
| 17 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 18 | /* |
| 19 | * Device Configuration Data (DCD) |
| 20 | * |
| 21 | * Each entry must have the format: |
| 22 | * Addr-type Address Value |
| 23 | * |
| 24 | * where: |
| 25 | * Addr-type register length (1,2 or 4 bytes) |
| 26 | * Address absolute address of the register |
| 27 | * value value to be stored in the register |
| 28 | */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 29 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 30 | /* Setting IOMUXC */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 31 | DATA 4 0x73FA88a0 0x200 |
| 32 | DATA 4 0x73FA850c 0x20c5 |
| 33 | DATA 4 0x73FA8510 0x20c5 |
| 34 | DATA 4 0x73FA883c 0x2 |
| 35 | DATA 4 0x73FA8848 0x2 |
| 36 | DATA 4 0x73FA84b8 0xe7 |
| 37 | DATA 4 0x73FA84bc 0x45 |
| 38 | DATA 4 0x73FA84c0 0x45 |
| 39 | DATA 4 0x73FA84c4 0x45 |
| 40 | DATA 4 0x73FA84c8 0x45 |
| 41 | DATA 4 0x73FA8820 0x0 |
| 42 | DATA 4 0x73FA84a4 0x3 |
| 43 | DATA 4 0x73FA84a8 0x3 |
| 44 | DATA 4 0x73FA84ac 0xe3 |
| 45 | DATA 4 0x73FA84b0 0xe3 |
| 46 | DATA 4 0x73FA84b4 0xe3 |
| 47 | DATA 4 0x73FA84cc 0xe3 |
| 48 | DATA 4 0x73FA84d0 0xe2 |
| 49 | |
| 50 | DATA 4 0x73FA882c 0x6 |
| 51 | DATA 4 0x73FA88a4 0x6 |
| 52 | DATA 4 0x73FA88ac 0x6 |
| 53 | DATA 4 0x73FA88b8 0x6 |
| 54 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 55 | /* |
| 56 | * Setting DDR for micron |
| 57 | * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model |
| 58 | * CAS=3 BL=4 |
| 59 | */ |
| 60 | /* ESDCTL_ESDCTL0 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 61 | DATA 4 0x83FD9000 0x82a20000 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 62 | /* ESDCTL_ESDCTL1 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 63 | DATA 4 0x83FD9008 0x82a20000 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 64 | /* ESDCTL_ESDMISC */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 65 | DATA 4 0x83FD9010 0x000ad0d0 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 66 | /* ESDCTL_ESDCFG0 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 67 | DATA 4 0x83FD9004 0x333574aa |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 68 | /* ESDCTL_ESDCFG1 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 69 | DATA 4 0x83FD900C 0x333574aa |
| 70 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 71 | /* Init DRAM on CS0 */ |
| 72 | /* ESDCTL_ESDSCR */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 73 | DATA 4 0x83FD9014 0x04008008 |
| 74 | DATA 4 0x83FD9014 0x0000801a |
| 75 | DATA 4 0x83FD9014 0x0000801b |
| 76 | DATA 4 0x83FD9014 0x00448019 |
| 77 | DATA 4 0x83FD9014 0x07328018 |
| 78 | DATA 4 0x83FD9014 0x04008008 |
| 79 | DATA 4 0x83FD9014 0x00008010 |
| 80 | DATA 4 0x83FD9014 0x00008010 |
| 81 | DATA 4 0x83FD9014 0x06328018 |
| 82 | DATA 4 0x83FD9014 0x03808019 |
| 83 | DATA 4 0x83FD9014 0x00408019 |
| 84 | DATA 4 0x83FD9014 0x00008000 |
| 85 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 86 | /* Init DRAM on CS1 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 87 | DATA 4 0x83FD9014 0x0400800c |
| 88 | DATA 4 0x83FD9014 0x0000801e |
| 89 | DATA 4 0x83FD9014 0x0000801f |
| 90 | DATA 4 0x83FD9014 0x0000801d |
| 91 | DATA 4 0x83FD9014 0x0732801c |
| 92 | DATA 4 0x83FD9014 0x0400800c |
| 93 | DATA 4 0x83FD9014 0x00008014 |
| 94 | DATA 4 0x83FD9014 0x00008014 |
| 95 | DATA 4 0x83FD9014 0x0632801c |
| 96 | DATA 4 0x83FD9014 0x0380801d |
| 97 | DATA 4 0x83FD9014 0x0040801d |
| 98 | DATA 4 0x83FD9014 0x00008004 |
| 99 | |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 100 | /* Write to CTL0 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 101 | DATA 4 0x83FD9000 0xb2a20000 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 102 | /* Write to CTL1 */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 103 | DATA 4 0x83FD9008 0xb2a20000 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 104 | /* ESDMISC */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 105 | DATA 4 0x83FD9010 0x000ad6d0 |
| Troy Kisky | a18d786 | 2013-01-18 16:14:24 +0000 | [diff] [blame] | 106 | /* ESDCTL_ESDCDLYGD */ |
| Stefano Babic | 421834e | 2010-02-05 15:13:58 +0100 | [diff] [blame] | 107 | DATA 4 0x83FD9034 0x90000000 |
| 108 | DATA 4 0x83FD9014 0x00000000 |