| Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2015 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0 |
| 5 | */ |
| 6 | |
| 7 | #ifndef _ASM_ARCH_PERIPH_H |
| 8 | #define _ASM_ARCH_PERIPH_H |
| 9 | |
| 10 | /* |
| 11 | * The peripherals supported by the hardware. This is used to specify clocks |
| 12 | * and pinctrl settings. Some SoCs will not support all of these, but it |
| 13 | * provides a common reference for common drivers to use. |
| 14 | */ |
| 15 | enum periph_id { |
| 16 | PERIPH_ID_PWM0, |
| 17 | PERIPH_ID_PWM1, |
| 18 | PERIPH_ID_PWM2, |
| 19 | PERIPH_ID_PWM3, |
| 20 | PERIPH_ID_PWM4, |
| 21 | PERIPH_ID_I2C0, |
| 22 | PERIPH_ID_I2C1, |
| 23 | PERIPH_ID_I2C2, |
| 24 | PERIPH_ID_I2C3, |
| 25 | PERIPH_ID_I2C4, |
| 26 | PERIPH_ID_I2C5, |
| 27 | PERIPH_ID_SPI0, |
| 28 | PERIPH_ID_SPI1, |
| 29 | PERIPH_ID_SPI2, |
| Philipp Tomsich | fa8d7bf | 2017-04-20 22:05:53 +0200 | [diff] [blame] | 30 | PERIPH_ID_SPI3, |
| 31 | PERIPH_ID_SPI4, |
| 32 | PERIPH_ID_SPI5, |
| Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 33 | PERIPH_ID_UART0, |
| 34 | PERIPH_ID_UART1, |
| 35 | PERIPH_ID_UART2, |
| 36 | PERIPH_ID_UART3, |
| 37 | PERIPH_ID_UART4, |
| 38 | PERIPH_ID_LCDC0, |
| 39 | PERIPH_ID_LCDC1, |
| 40 | PERIPH_ID_SDMMC0, |
| 41 | PERIPH_ID_SDMMC1, |
| 42 | PERIPH_ID_SDMMC2, |
| 43 | PERIPH_ID_HDMI, |
| Philipp Tomsich | 2be5abf | 2017-03-24 19:24:23 +0100 | [diff] [blame] | 44 | PERIPH_ID_GMAC, |
| Simon Glass | 932bc4a | 2015-08-30 16:55:28 -0600 | [diff] [blame] | 45 | |
| 46 | PERIPH_ID_COUNT, |
| 47 | |
| 48 | /* Some aliases */ |
| 49 | PERIPH_ID_EMMC = PERIPH_ID_SDMMC0, |
| 50 | PERIPH_ID_SDCARD = PERIPH_ID_SDMMC1, |
| 51 | PERIPH_ID_UART_BT = PERIPH_ID_UART0, |
| 52 | PERIPH_ID_UART_BB = PERIPH_ID_UART1, |
| 53 | PERIPH_ID_UART_DBG = PERIPH_ID_UART2, |
| 54 | PERIPH_ID_UART_GPS = PERIPH_ID_UART3, |
| 55 | PERIPH_ID_UART_EXP = PERIPH_ID_UART4, |
| 56 | }; |
| 57 | |
| 58 | #endif |