blob: 5cb41521e15a5230044e17f02cafb168f233f56d [file] [log] [blame]
Simon Glass17f1c402014-11-14 18:18:32 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
Simon Glass17f1c402014-11-14 18:18:32 -07006#include <common.h>
Simon Glasse0e7b362015-03-05 12:25:33 -07007#include <dm.h>
Simon Glass17f1c402014-11-14 18:18:32 -07008#include <errno.h>
9#include <fdtdec.h>
10#include <malloc.h>
Simon Glass32761632016-01-18 20:19:21 -070011#include <pch.h>
Simon Glass17f1c402014-11-14 18:18:32 -070012#include <asm/lapic.h>
13#include <asm/pci.h>
14#include <asm/arch/bd82x6x.h>
15#include <asm/arch/model_206ax.h>
16#include <asm/arch/pch.h>
17#include <asm/arch/sandybridge.h>
18
Simon Glass32761632016-01-18 20:19:21 -070019#define BIOS_CTRL 0xdc
20
Simon Glasse0e7b362015-03-05 12:25:33 -070021static int bd82x6x_probe(struct udevice *dev)
Simon Glass17f1c402014-11-14 18:18:32 -070022{
Simon Glasscd0adb32014-11-14 18:18:38 -070023 const void *blob = gd->fdt_blob;
Simon Glass39f3f8c2016-01-17 16:11:37 -070024 int gma_node;
Simon Glassd90f8e12014-11-14 20:56:36 -070025 int ret;
Simon Glass06409c92014-11-14 18:18:35 -070026
Simon Glass044f1a02016-01-17 16:11:10 -070027 if (!(gd->flags & GD_FLG_RELOC))
28 return 0;
29
Simon Glass39f3f8c2016-01-17 16:11:37 -070030 /* Cause the SATA device to do its init */
31 uclass_first_device(UCLASS_DISK, &dev);
32
Simon Glass194d7572014-11-14 18:18:40 -070033 bd82x6x_usb_ehci_init(PCH_EHCI1_DEV);
34 bd82x6x_usb_ehci_init(PCH_EHCI2_DEV);
Simon Glass06409c92014-11-14 18:18:35 -070035
Simon Glassd90f8e12014-11-14 20:56:36 -070036 gma_node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_GMA);
37 if (gma_node < 0) {
38 debug("%s: Cannot find GMA node\n", __func__);
39 return -EINVAL;
40 }
Simon Glass35230352015-11-29 13:17:55 -070041 ret = dm_pci_bus_find_bdf(PCH_VIDEO_DEV, &dev);
42 if (ret)
43 return ret;
44 ret = gma_func0_init(dev, blob, gma_node);
Simon Glassd90f8e12014-11-14 20:56:36 -070045 if (ret)
46 return ret;
47
Simon Glass17f1c402014-11-14 18:18:32 -070048 return 0;
49}
50
Simon Glass32761632016-01-18 20:19:21 -070051static int bd82x6x_pch_get_sbase(struct udevice *dev, ulong *sbasep)
52{
53 u32 rcba;
54
55 dm_pci_read_config32(dev, PCH_RCBA, &rcba);
56 /* Bits 31-14 are the base address, 13-1 are reserved, 0 is enable */
57 rcba = rcba & 0xffffc000;
58 *sbasep = rcba + 0x3800;
59
60 return 0;
61}
62
63static enum pch_version bd82x6x_pch_get_version(struct udevice *dev)
64{
65 return PCHV_9;
66}
67
68static int bd82x6x_set_spi_protect(struct udevice *dev, bool protect)
69{
70 uint8_t bios_cntl;
71
72 /* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */
73 dm_pci_read_config8(dev, BIOS_CTRL, &bios_cntl);
74 if (protect) {
75 bios_cntl &= ~BIOS_CTRL_BIOSWE;
76 bios_cntl |= BIT(5);
77 } else {
78 bios_cntl |= BIOS_CTRL_BIOSWE;
79 bios_cntl &= ~BIT(5);
80 }
81 dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl);
82
83 return 0;
84}
85
86static const struct pch_ops bd82x6x_pch_ops = {
87 .get_sbase = bd82x6x_pch_get_sbase,
88 .get_version = bd82x6x_pch_get_version,
89 .set_spi_protect = bd82x6x_set_spi_protect,
90};
91
Simon Glasse0e7b362015-03-05 12:25:33 -070092static const struct udevice_id bd82x6x_ids[] = {
93 { .compatible = "intel,bd82x6x" },
94 { }
95};
96
97U_BOOT_DRIVER(bd82x6x_drv) = {
98 .name = "bd82x6x",
99 .id = UCLASS_PCH,
100 .of_match = bd82x6x_ids,
101 .probe = bd82x6x_probe,
Simon Glass32761632016-01-18 20:19:21 -0700102 .ops = &bd82x6x_pch_ops,
Simon Glasse0e7b362015-03-05 12:25:33 -0700103};