Alice Guo | 4ce4778 | 2022-10-09 11:19:22 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2022 NXP |
| 4 | * |
| 5 | * ADP5585 I/O Expander Controller |
| 6 | * |
| 7 | * Author: Alice Guo <alice.guo@nxp.com> |
| 8 | */ |
| 9 | |
| 10 | #include <asm/gpio.h> |
| 11 | #include <dm.h> |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <i2c.h> |
| 14 | |
| 15 | #define ADP5585_ID 0x00 |
| 16 | #define ADP5585_INT_STATUS 0x01 |
| 17 | #define ADP5585_STATUS 0x02 |
| 18 | #define ADP5585_FIFO_1 0x03 |
| 19 | #define ADP5585_FIFO_2 0x04 |
| 20 | #define ADP5585_FIFO_3 0x05 |
| 21 | #define ADP5585_FIFO_4 0x06 |
| 22 | #define ADP5585_FIFO_5 0x07 |
| 23 | #define ADP5585_FIFO_6 0x08 |
| 24 | #define ADP5585_FIFO_7 0x09 |
| 25 | #define ADP5585_FIFO_8 0x0A |
| 26 | #define ADP5585_FIFO_9 0x0B |
| 27 | #define ADP5585_FIFO_10 0x0C |
| 28 | #define ADP5585_FIFO_11 0x0D |
| 29 | #define ADP5585_FIFO_12 0x0E |
| 30 | #define ADP5585_FIFO_13 0x0F |
| 31 | #define ADP5585_FIFO_14 0x10 |
| 32 | #define ADP5585_FIFO_15 0x11 |
| 33 | #define ADP5585_FIFO_16 0x12 |
| 34 | #define ADP5585_GPI_INT_STAT_A 0x13 |
| 35 | #define ADP5585_GPI_INT_STAT_B 0x14 |
| 36 | #define ADP5585_GPI_STATUS_A 0x15 |
| 37 | #define ADP5585_GPI_STATUS_B 0x16 |
| 38 | #define ADP5585_RPULL_CONFIG_A 0x17 |
| 39 | #define ADP5585_RPULL_CONFIG_B 0x18 |
| 40 | #define ADP5585_RPULL_CONFIG_C 0x19 |
| 41 | #define ADP5585_RPULL_CONFIG_D 0x1A |
| 42 | #define ADP5585_GPI_INT_LEVEL_A 0x1B |
| 43 | #define ADP5585_GPI_INT_LEVEL_B 0x1C |
| 44 | #define ADP5585_GPI_EVENT_EN_A 0x1D |
| 45 | #define ADP5585_GPI_EVENT_EN_B 0x1E |
| 46 | #define ADP5585_GPI_INTERRUPT_EN_A 0x1F |
| 47 | #define ADP5585_GPI_INTERRUPT_EN_B 0x20 |
| 48 | #define ADP5585_DEBOUNCE_DIS_A 0x21 |
| 49 | #define ADP5585_DEBOUNCE_DIS_B 0x22 |
| 50 | #define ADP5585_GPO_DATA_OUT_A 0x23 |
| 51 | #define ADP5585_GPO_DATA_OUT_B 0x24 |
| 52 | #define ADP5585_GPO_OUT_MODE_A 0x25 |
| 53 | #define ADP5585_GPO_OUT_MODE_B 0x26 |
| 54 | #define ADP5585_GPIO_DIRECTION_A 0x27 |
| 55 | #define ADP5585_GPIO_DIRECTION_B 0x28 |
| 56 | #define ADP5585_RESET1_EVENT_A 0x29 |
| 57 | #define ADP5585_RESET1_EVENT_B 0x2A |
| 58 | #define ADP5585_RESET1_EVENT_C 0x2B |
| 59 | #define ADP5585_RESET2_EVENT_A 0x2C |
| 60 | #define ADP5585_RESET2_EVENT_B 0x2D |
| 61 | #define ADP5585_RESET_CFG 0x2E |
| 62 | #define ADP5585_PWM_OFFT_LOW 0x2F |
| 63 | #define ADP5585_PWM_OFFT_HIGH 0x30 |
| 64 | #define ADP5585_PWM_ONT_LOW 0x31 |
| 65 | #define ADP5585_PWM_ONT_HIGH 0x32 |
| 66 | #define ADP5585_PWM_CFG 0x33 |
| 67 | #define ADP5585_LOGIC_CFG 0x34 |
| 68 | #define ADP5585_LOGIC_FF_CFG 0x35 |
| 69 | #define ADP5585_LOGIC_INT_EVENT_EN 0x36 |
| 70 | #define ADP5585_POLL_PTIME_CFG 0x37 |
| 71 | #define ADP5585_PIN_CONFIG_A 0x38 |
| 72 | #define ADP5585_PIN_CONFIG_B 0x39 |
| 73 | #define ADP5585_PIN_CONFIG_D 0x3A |
| 74 | #define ADP5585_GENERAL_CFG 0x3B |
| 75 | #define ADP5585_INT_EN 0x3C |
| 76 | |
| 77 | #define ADP5585_MAXGPIO 10 |
| 78 | #define ADP5585_BANK(offs) ((offs) > 4) |
| 79 | #define ADP5585_BIT(offs) ((offs) > 4 ? \ |
| 80 | 1u << ((offs) - 5) : 1u << (offs)) |
| 81 | |
| 82 | struct adp5585_plat { |
| 83 | fdt_addr_t addr; |
| 84 | u8 id; |
| 85 | u8 dat_out[2]; |
| 86 | u8 dir[2]; |
| 87 | }; |
| 88 | |
| 89 | static int adp5585_direction_input(struct udevice *dev, unsigned int offset) |
| 90 | { |
| 91 | int ret; |
| 92 | unsigned int bank; |
| 93 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 94 | |
| 95 | bank = ADP5585_BANK(offset); |
| 96 | |
| 97 | plat->dir[bank] &= ~ADP5585_BIT(offset); |
| 98 | ret = dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); |
| 99 | |
| 100 | return ret; |
| 101 | } |
| 102 | |
| 103 | static int adp5585_direction_output(struct udevice *dev, unsigned int offset, |
| 104 | int value) |
| 105 | { |
| 106 | int ret; |
| 107 | unsigned int bank, bit; |
| 108 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 109 | |
| 110 | bank = ADP5585_BANK(offset); |
| 111 | bit = ADP5585_BIT(offset); |
| 112 | |
| 113 | plat->dir[bank] |= bit; |
| 114 | |
| 115 | if (value) |
| 116 | plat->dat_out[bank] |= bit; |
| 117 | else |
| 118 | plat->dat_out[bank] &= ~bit; |
| 119 | |
| 120 | ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); |
| 121 | ret |= dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); |
| 122 | |
| 123 | return ret; |
| 124 | } |
| 125 | |
| 126 | static int adp5585_get_value(struct udevice *dev, unsigned int offset) |
| 127 | { |
| 128 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 129 | unsigned int bank = ADP5585_BANK(offset); |
| 130 | unsigned int bit = ADP5585_BIT(offset); |
| 131 | u8 val; |
| 132 | |
| 133 | if (plat->dir[bank] & bit) |
| 134 | val = plat->dat_out[bank]; |
| 135 | else |
| 136 | dm_i2c_read(dev, ADP5585_GPI_STATUS_A + bank, &val, 1); |
| 137 | |
| 138 | return !!(val & bit); |
| 139 | } |
| 140 | |
| 141 | static int adp5585_set_value(struct udevice *dev, unsigned int offset, int value) |
| 142 | { |
| 143 | int ret; |
| 144 | unsigned int bank, bit; |
| 145 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 146 | |
| 147 | bank = ADP5585_BANK(offset); |
| 148 | bit = ADP5585_BIT(offset); |
| 149 | |
| 150 | if (value) |
| 151 | plat->dat_out[bank] |= bit; |
| 152 | else |
| 153 | plat->dat_out[bank] &= ~bit; |
| 154 | |
| 155 | ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); |
| 156 | |
| 157 | return ret; |
| 158 | } |
| 159 | |
| 160 | static int adp5585_get_function(struct udevice *dev, unsigned int offset) |
| 161 | { |
| 162 | unsigned int bank, bit, dir; |
| 163 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 164 | |
| 165 | bank = ADP5585_BANK(offset); |
| 166 | bit = ADP5585_BIT(offset); |
| 167 | dir = plat->dir[bank] & bit; |
| 168 | |
| 169 | if (!dir) |
| 170 | return GPIOF_INPUT; |
| 171 | else |
| 172 | return GPIOF_OUTPUT; |
| 173 | } |
| 174 | |
| 175 | static int adp5585_xlate(struct udevice *dev, struct gpio_desc *desc, |
| 176 | struct ofnode_phandle_args *args) |
| 177 | { |
| 178 | desc->offset = args->args[0]; |
| 179 | desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; |
| 180 | |
| 181 | return 0; |
| 182 | } |
| 183 | |
| 184 | static const struct dm_gpio_ops adp5585_ops = { |
| 185 | .direction_input = adp5585_direction_input, |
| 186 | .direction_output = adp5585_direction_output, |
| 187 | .get_value = adp5585_get_value, |
| 188 | .set_value = adp5585_set_value, |
| 189 | .get_function = adp5585_get_function, |
| 190 | .xlate = adp5585_xlate, |
| 191 | }; |
| 192 | |
| 193 | static int adp5585_probe(struct udevice *dev) |
| 194 | { |
| 195 | struct adp5585_plat *plat = dev_get_plat(dev); |
| 196 | struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
| 197 | int ret; |
| 198 | |
| 199 | if (!plat) |
| 200 | return 0; |
| 201 | |
| 202 | plat->addr = dev_read_addr(dev); |
| 203 | if (plat->addr == FDT_ADDR_T_NONE) |
| 204 | return -EINVAL; |
| 205 | |
| 206 | ret = dm_i2c_read(dev, ADP5585_ID, &plat->id, 1); |
| 207 | if (ret < 0) |
| 208 | return ret; |
| 209 | |
| 210 | uc_priv->gpio_count = ADP5585_MAXGPIO; |
| 211 | uc_priv->bank_name = "adp5585-gpio"; |
| 212 | |
| 213 | for (int i = 0; i < 2; i++) { |
| 214 | ret = dm_i2c_read(dev, ADP5585_GPO_DATA_OUT_A + i, &plat->dat_out[i], 1); |
| 215 | if (ret) |
| 216 | return ret; |
| 217 | |
| 218 | ret = dm_i2c_read(dev, ADP5585_GPIO_DIRECTION_A + i, &plat->dir[i], 1); |
| 219 | if (ret) |
| 220 | return ret; |
| 221 | } |
| 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | static const struct udevice_id adp5585_ids[] = { |
| 227 | { .compatible = "adp5585" }, |
| 228 | { } |
| 229 | }; |
| 230 | |
| 231 | U_BOOT_DRIVER(adp5585) = { |
| 232 | .name = "adp5585", |
| 233 | .id = UCLASS_GPIO, |
| 234 | .of_match = adp5585_ids, |
| 235 | .probe = adp5585_probe, |
| 236 | .ops = &adp5585_ops, |
| 237 | .plat_auto = sizeof(struct adp5585_plat), |
| 238 | }; |