blob: fc72fac8d87fa1d1a2272734319cec0ab74b8d03 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matt Waddel35c638b2010-10-07 15:48:45 -06002/*
3 * (C) Copyright 2010 Linaro
4 * Matt Waddel, <matt.waddel@linaro.org>
Matt Waddel35c638b2010-10-07 15:48:45 -06005 */
6#ifndef _SYSCTRL_H_
7#define _SYSCTRL_H_
8
9/* System controller (SP810) register definitions */
10#define SP810_TIMER0_ENSEL (1 << 15)
11#define SP810_TIMER1_ENSEL (1 << 17)
12#define SP810_TIMER2_ENSEL (1 << 19)
13#define SP810_TIMER3_ENSEL (1 << 21)
14
15struct sysctrl {
16 u32 scctrl; /* 0x000 */
17 u32 scsysstat;
18 u32 scimctrl;
19 u32 scimstat;
20 u32 scxtalctrl;
21 u32 scpllctrl;
22 u32 scpllfctrl;
23 u32 scperctrl0;
24 u32 scperctrl1;
25 u32 scperen;
26 u32 scperdis;
27 u32 scperclken;
28 u32 scperstat;
29 u32 res1[0x006];
30 u32 scflashctrl; /* 0x04c */
31 u32 res2[0x3a4];
32 u32 scsysid0; /* 0xee0 */
33 u32 scsysid1;
34 u32 scsysid2;
35 u32 scsysid3;
36 u32 scitcr;
37 u32 scitir0;
38 u32 scitir1;
39 u32 scitor;
40 u32 sccntctrl;
41 u32 sccntdata;
42 u32 sccntstep;
43 u32 res3[0x32];
44 u32 scperiphid0; /* 0xfe0 */
45 u32 scperiphid1;
46 u32 scperiphid2;
47 u32 scperiphid3;
48 u32 scpcellid0;
49 u32 scpcellid1;
50 u32 scpcellid2;
51 u32 scpcellid3;
52};
53#endif /* _SYSCTRL_H_ */