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git01.mediatek.com / filogic / uboot / 93743d241c64bc1f7ecbf3262d1683176551e11f / . / src / arm64 / renesas / r8a77965.dtsi
blob: e57b9027066eb6e7b5ad4b176c12675841ec8c7d [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/power/r8a77965-sysc.h>
14
15#define SOC_HAS_SATA
16
17/ {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
22 /*
23 * The external audio clocks are configured as 0 Hz fixed frequency
24 * clocks by default.
25 * Boards that provide audio clocks should override them.
26 */
27 audio_clk_a: audio_clk_a {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <0>;
31 };
32
33 audio_clk_b: audio_clk_b {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <0>;
37 };
38
39 audio_clk_c: audio_clk_c {
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <0>;
43 };
44
45 /* External CAN clock - to be overridden by boards that provide it */
46 can_clk: can {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <0>;
50 };
51
52 cluster0_opp: opp-table-0 {
53 compatible = "operating-points-v2";
54 opp-shared;
55
56 opp-500000000 {
57 opp-hz = /bits/ 64 <500000000>;
58 opp-microvolt = <830000>;
59 clock-latency-ns = <300000>;
60 };
61 opp-1000000000 {
62 opp-hz = /bits/ 64 <1000000000>;
63 opp-microvolt = <830000>;
64 clock-latency-ns = <300000>;
65 };
66 opp-1500000000 {
67 opp-hz = /bits/ 64 <1500000000>;
68 opp-microvolt = <830000>;
69 clock-latency-ns = <300000>;
70 opp-suspend;
71 };
72 opp-1600000000 {
73 opp-hz = /bits/ 64 <1600000000>;
74 opp-microvolt = <900000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1700000000 {
78 opp-hz = /bits/ 64 <1700000000>;
79 opp-microvolt = <900000>;
80 clock-latency-ns = <300000>;
81 };
82 opp-1800000000 {
83 opp-hz = /bits/ 64 <1800000000>;
84 opp-microvolt = <960000>;
85 clock-latency-ns = <300000>;
86 turbo-mode;
87 };
88 };
89
90 cpus {
91 #address-cells = <1>;
92 #size-cells = <0>;
93
94 a57_0: cpu@0 {
95 compatible = "arm,cortex-a57";
96 reg = <0x0>;
97 device_type = "cpu";
98 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
99 next-level-cache = <&L2_CA57>;
100 enable-method = "psci";
101 cpu-idle-states = <&CPU_SLEEP_0>;
102 #cooling-cells = <2>;
103 dynamic-power-coefficient = <854>;
104 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
105 operating-points-v2 = <&cluster0_opp>;
106 };
107
108 a57_1: cpu@1 {
109 compatible = "arm,cortex-a57";
110 reg = <0x1>;
111 device_type = "cpu";
112 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
113 next-level-cache = <&L2_CA57>;
114 enable-method = "psci";
115 cpu-idle-states = <&CPU_SLEEP_0>;
116 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
117 operating-points-v2 = <&cluster0_opp>;
118 };
119
120 L2_CA57: cache-controller-0 {
121 compatible = "cache";
122 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
123 cache-unified;
124 cache-level = <2>;
125 };
126
127 idle-states {
128 entry-method = "psci";
129
130 CPU_SLEEP_0: cpu-sleep-0 {
131 compatible = "arm,idle-state";
132 arm,psci-suspend-param = <0x0010000>;
133 local-timer-stop;
134 entry-latency-us = <400>;
135 exit-latency-us = <500>;
136 min-residency-us = <4000>;
137 };
138 };
139 };
140
141 extal_clk: extal {
142 compatible = "fixed-clock";
143 #clock-cells = <0>;
144 /* This value must be overridden by the board */
145 clock-frequency = <0>;
146 };
147
148 extalr_clk: extalr {
149 compatible = "fixed-clock";
150 #clock-cells = <0>;
151 /* This value must be overridden by the board */
152 clock-frequency = <0>;
153 };
154
155 /* External PCIe clock - can be overridden by the board */
156 pcie_bus_clk: pcie_bus {
157 compatible = "fixed-clock";
158 #clock-cells = <0>;
159 clock-frequency = <0>;
160 };
161
162 pmu_a57 {
163 compatible = "arm,cortex-a57-pmu";
164 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
165 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166 interrupt-affinity = <&a57_0>,
167 <&a57_1>;
168 };
169
170 psci {
171 compatible = "arm,psci-1.0", "arm,psci-0.2";
172 method = "smc";
173 };
174
175 /* External SCIF clock - to be overridden by boards that provide it */
176 scif_clk: scif {
177 compatible = "fixed-clock";
178 #clock-cells = <0>;
179 clock-frequency = <0>;
180 };
181
182 soc {
183 compatible = "simple-bus";
184 interrupt-parent = <&gic>;
185 #address-cells = <2>;
186 #size-cells = <2>;
187 ranges;
188
189 rwdt: watchdog@e6020000 {
190 compatible = "renesas,r8a77965-wdt",
191 "renesas,rcar-gen3-wdt";
192 reg = <0 0xe6020000 0 0x0c>;
193 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&cpg CPG_MOD 402>;
195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
196 resets = <&cpg 402>;
197 status = "disabled";
198 };
199
200 gpio0: gpio@e6050000 {
201 compatible = "renesas,gpio-r8a77965",
202 "renesas,rcar-gen3-gpio";
203 reg = <0 0xe6050000 0 0x50>;
204 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
205 #gpio-cells = <2>;
206 gpio-controller;
207 gpio-ranges = <&pfc 0 0 16>;
208 #interrupt-cells = <2>;
209 interrupt-controller;
210 clocks = <&cpg CPG_MOD 912>;
211 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
212 resets = <&cpg 912>;
213 };
214
215 gpio1: gpio@e6051000 {
216 compatible = "renesas,gpio-r8a77965",
217 "renesas,rcar-gen3-gpio";
218 reg = <0 0xe6051000 0 0x50>;
219 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
220 #gpio-cells = <2>;
221 gpio-controller;
222 gpio-ranges = <&pfc 0 32 29>;
223 #interrupt-cells = <2>;
224 interrupt-controller;
225 clocks = <&cpg CPG_MOD 911>;
226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
227 resets = <&cpg 911>;
228 };
229
230 gpio2: gpio@e6052000 {
231 compatible = "renesas,gpio-r8a77965",
232 "renesas,rcar-gen3-gpio";
233 reg = <0 0xe6052000 0 0x50>;
234 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
235 #gpio-cells = <2>;
236 gpio-controller;
237 gpio-ranges = <&pfc 0 64 15>;
238 #interrupt-cells = <2>;
239 interrupt-controller;
240 clocks = <&cpg CPG_MOD 910>;
241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
242 resets = <&cpg 910>;
243 };
244
245 gpio3: gpio@e6053000 {
246 compatible = "renesas,gpio-r8a77965",
247 "renesas,rcar-gen3-gpio";
248 reg = <0 0xe6053000 0 0x50>;
249 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
250 #gpio-cells = <2>;
251 gpio-controller;
252 gpio-ranges = <&pfc 0 96 16>;
253 #interrupt-cells = <2>;
254 interrupt-controller;
255 clocks = <&cpg CPG_MOD 909>;
256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
257 resets = <&cpg 909>;
258 };
259
260 gpio4: gpio@e6054000 {
261 compatible = "renesas,gpio-r8a77965",
262 "renesas,rcar-gen3-gpio";
263 reg = <0 0xe6054000 0 0x50>;
264 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
265 #gpio-cells = <2>;
266 gpio-controller;
267 gpio-ranges = <&pfc 0 128 18>;
268 #interrupt-cells = <2>;
269 interrupt-controller;
270 clocks = <&cpg CPG_MOD 908>;
271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
272 resets = <&cpg 908>;
273 };
274
275 gpio5: gpio@e6055000 {
276 compatible = "renesas,gpio-r8a77965",
277 "renesas,rcar-gen3-gpio";
278 reg = <0 0xe6055000 0 0x50>;
279 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
280 #gpio-cells = <2>;
281 gpio-controller;
282 gpio-ranges = <&pfc 0 160 26>;
283 #interrupt-cells = <2>;
284 interrupt-controller;
285 clocks = <&cpg CPG_MOD 907>;
286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
287 resets = <&cpg 907>;
288 };
289
290 gpio6: gpio@e6055400 {
291 compatible = "renesas,gpio-r8a77965",
292 "renesas,rcar-gen3-gpio";
293 reg = <0 0xe6055400 0 0x50>;
294 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
295 #gpio-cells = <2>;
296 gpio-controller;
297 gpio-ranges = <&pfc 0 192 32>;
298 #interrupt-cells = <2>;
299 interrupt-controller;
300 clocks = <&cpg CPG_MOD 906>;
301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
302 resets = <&cpg 906>;
303 };
304
305 gpio7: gpio@e6055800 {
306 compatible = "renesas,gpio-r8a77965",
307 "renesas,rcar-gen3-gpio";
308 reg = <0 0xe6055800 0 0x50>;
309 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 gpio-ranges = <&pfc 0 224 4>;
313 #interrupt-cells = <2>;
314 interrupt-controller;
315 clocks = <&cpg CPG_MOD 905>;
316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
317 resets = <&cpg 905>;
318 };
319
320 pfc: pinctrl@e6060000 {
321 compatible = "renesas,pfc-r8a77965";
322 reg = <0 0xe6060000 0 0x50c>;
323 };
324
325 cmt0: timer@e60f0000 {
326 compatible = "renesas,r8a77965-cmt0",
327 "renesas,rcar-gen3-cmt0";
328 reg = <0 0xe60f0000 0 0x1004>;
329 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 303>;
332 clock-names = "fck";
333 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
334 resets = <&cpg 303>;
335 status = "disabled";
336 };
337
338 cmt1: timer@e6130000 {
339 compatible = "renesas,r8a77965-cmt1",
340 "renesas,rcar-gen3-cmt1";
341 reg = <0 0xe6130000 0 0x1004>;
342 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
349 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&cpg CPG_MOD 302>;
351 clock-names = "fck";
352 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
353 resets = <&cpg 302>;
354 status = "disabled";
355 };
356
357 cmt2: timer@e6140000 {
358 compatible = "renesas,r8a77965-cmt1",
359 "renesas,rcar-gen3-cmt1";
360 reg = <0 0xe6140000 0 0x1004>;
361 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&cpg CPG_MOD 301>;
370 clock-names = "fck";
371 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
372 resets = <&cpg 301>;
373 status = "disabled";
374 };
375
376 cmt3: timer@e6148000 {
377 compatible = "renesas,r8a77965-cmt1",
378 "renesas,rcar-gen3-cmt1";
379 reg = <0 0xe6148000 0 0x1004>;
380 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 300>;
389 clock-names = "fck";
390 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
391 resets = <&cpg 300>;
392 status = "disabled";
393 };
394
395 cpg: clock-controller@e6150000 {
396 compatible = "renesas,r8a77965-cpg-mssr";
397 reg = <0 0xe6150000 0 0x1000>;
398 clocks = <&extal_clk>, <&extalr_clk>;
399 clock-names = "extal", "extalr";
400 #clock-cells = <2>;
401 #power-domain-cells = <0>;
402 #reset-cells = <1>;
403 };
404
405 rst: reset-controller@e6160000 {
406 compatible = "renesas,r8a77965-rst";
407 reg = <0 0xe6160000 0 0x0200>;
408 };
409
410 sysc: system-controller@e6180000 {
411 compatible = "renesas,r8a77965-sysc";
412 reg = <0 0xe6180000 0 0x0400>;
413 #power-domain-cells = <1>;
414 };
415
416 tsc: thermal@e6198000 {
417 compatible = "renesas,r8a77965-thermal";
418 reg = <0 0xe6198000 0 0x100>,
419 <0 0xe61a0000 0 0x100>,
420 <0 0xe61a8000 0 0x100>;
421 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
424 clocks = <&cpg CPG_MOD 522>;
425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
426 resets = <&cpg 522>;
427 #thermal-sensor-cells = <1>;
428 };
429
430 intc_ex: interrupt-controller@e61c0000 {
431 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
432 #interrupt-cells = <2>;
433 interrupt-controller;
434 reg = <0 0xe61c0000 0 0x200>;
435 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
436 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
437 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
438 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
439 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&cpg CPG_MOD 407>;
442 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
443 resets = <&cpg 407>;
444 };
445
446 tmu0: timer@e61e0000 {
447 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
448 reg = <0 0xe61e0000 0 0x30>;
449 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
450 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
452 clocks = <&cpg CPG_MOD 125>;
453 clock-names = "fck";
454 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
455 resets = <&cpg 125>;
456 status = "disabled";
457 };
458
459 tmu1: timer@e6fc0000 {
460 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
461 reg = <0 0xe6fc0000 0 0x30>;
462 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
463 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
464 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 124>;
466 clock-names = "fck";
467 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
468 resets = <&cpg 124>;
469 status = "disabled";
470 };
471
472 tmu2: timer@e6fd0000 {
473 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
474 reg = <0 0xe6fd0000 0 0x30>;
475 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
478 clocks = <&cpg CPG_MOD 123>;
479 clock-names = "fck";
480 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
481 resets = <&cpg 123>;
482 status = "disabled";
483 };
484
485 tmu3: timer@e6fe0000 {
486 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
487 reg = <0 0xe6fe0000 0 0x30>;
488 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
490 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 122>;
492 clock-names = "fck";
493 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
494 resets = <&cpg 122>;
495 status = "disabled";
496 };
497
498 tmu4: timer@ffc00000 {
499 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
500 reg = <0 0xffc00000 0 0x30>;
501 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
502 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
503 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&cpg CPG_MOD 121>;
505 clock-names = "fck";
506 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
507 resets = <&cpg 121>;
508 status = "disabled";
509 };
510
511 i2c0: i2c@e6500000 {
512 #address-cells = <1>;
513 #size-cells = <0>;
514 compatible = "renesas,i2c-r8a77965",
515 "renesas,rcar-gen3-i2c";
516 reg = <0 0xe6500000 0 0x40>;
517 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&cpg CPG_MOD 931>;
519 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
520 resets = <&cpg 931>;
521 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
522 <&dmac2 0x91>, <&dmac2 0x90>;
523 dma-names = "tx", "rx", "tx", "rx";
524 i2c-scl-internal-delay-ns = <110>;
525 status = "disabled";
526 };
527
528 i2c1: i2c@e6508000 {
529 #address-cells = <1>;
530 #size-cells = <0>;
531 compatible = "renesas,i2c-r8a77965",
532 "renesas,rcar-gen3-i2c";
533 reg = <0 0xe6508000 0 0x40>;
534 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
535 clocks = <&cpg CPG_MOD 930>;
536 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
537 resets = <&cpg 930>;
538 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
539 <&dmac2 0x93>, <&dmac2 0x92>;
540 dma-names = "tx", "rx", "tx", "rx";
541 i2c-scl-internal-delay-ns = <6>;
542 status = "disabled";
543 };
544
545 i2c2: i2c@e6510000 {
546 #address-cells = <1>;
547 #size-cells = <0>;
548 compatible = "renesas,i2c-r8a77965",
549 "renesas,rcar-gen3-i2c";
550 reg = <0 0xe6510000 0 0x40>;
551 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&cpg CPG_MOD 929>;
553 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
554 resets = <&cpg 929>;
555 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
556 <&dmac2 0x95>, <&dmac2 0x94>;
557 dma-names = "tx", "rx", "tx", "rx";
558 i2c-scl-internal-delay-ns = <6>;
559 status = "disabled";
560 };
561
562 i2c3: i2c@e66d0000 {
563 #address-cells = <1>;
564 #size-cells = <0>;
565 compatible = "renesas,i2c-r8a77965",
566 "renesas,rcar-gen3-i2c";
567 reg = <0 0xe66d0000 0 0x40>;
568 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
569 clocks = <&cpg CPG_MOD 928>;
570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
571 resets = <&cpg 928>;
572 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
573 dma-names = "tx", "rx";
574 i2c-scl-internal-delay-ns = <110>;
575 status = "disabled";
576 };
577
578 i2c4: i2c@e66d8000 {
579 #address-cells = <1>;
580 #size-cells = <0>;
581 compatible = "renesas,i2c-r8a77965",
582 "renesas,rcar-gen3-i2c";
583 reg = <0 0xe66d8000 0 0x40>;
584 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
585 clocks = <&cpg CPG_MOD 927>;
586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
587 resets = <&cpg 927>;
588 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
589 dma-names = "tx", "rx";
590 i2c-scl-internal-delay-ns = <110>;
591 status = "disabled";
592 };
593
594 i2c5: i2c@e66e0000 {
595 #address-cells = <1>;
596 #size-cells = <0>;
597 compatible = "renesas,i2c-r8a77965",
598 "renesas,rcar-gen3-i2c";
599 reg = <0 0xe66e0000 0 0x40>;
600 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&cpg CPG_MOD 919>;
602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
603 resets = <&cpg 919>;
604 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
605 dma-names = "tx", "rx";
606 i2c-scl-internal-delay-ns = <110>;
607 status = "disabled";
608 };
609
610 i2c6: i2c@e66e8000 {
611 #address-cells = <1>;
612 #size-cells = <0>;
613 compatible = "renesas,i2c-r8a77965",
614 "renesas,rcar-gen3-i2c";
615 reg = <0 0xe66e8000 0 0x40>;
616 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&cpg CPG_MOD 918>;
618 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
619 resets = <&cpg 918>;
620 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
621 dma-names = "tx", "rx";
622 i2c-scl-internal-delay-ns = <6>;
623 status = "disabled";
624 };
625
626 i2c_dvfs: i2c@e60b0000 {
627 #address-cells = <1>;
628 #size-cells = <0>;
629 compatible = "renesas,iic-r8a77965",
630 "renesas,rcar-gen3-iic",
631 "renesas,rmobile-iic";
632 reg = <0 0xe60b0000 0 0x425>;
633 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&cpg CPG_MOD 926>;
635 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
636 resets = <&cpg 926>;
637 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
638 dma-names = "tx", "rx";
639 status = "disabled";
640 };
641
642 hscif0: serial@e6540000 {
643 compatible = "renesas,hscif-r8a77965",
644 "renesas,rcar-gen3-hscif",
645 "renesas,hscif";
646 reg = <0 0xe6540000 0 0x60>;
647 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
648 clocks = <&cpg CPG_MOD 520>,
649 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
650 <&scif_clk>;
651 clock-names = "fck", "brg_int", "scif_clk";
652 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
653 <&dmac2 0x31>, <&dmac2 0x30>;
654 dma-names = "tx", "rx", "tx", "rx";
655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
656 resets = <&cpg 520>;
657 status = "disabled";
658 };
659
660 hscif1: serial@e6550000 {
661 compatible = "renesas,hscif-r8a77965",
662 "renesas,rcar-gen3-hscif",
663 "renesas,hscif";
664 reg = <0 0xe6550000 0 0x60>;
665 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&cpg CPG_MOD 519>,
667 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
668 <&scif_clk>;
669 clock-names = "fck", "brg_int", "scif_clk";
670 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
671 <&dmac2 0x33>, <&dmac2 0x32>;
672 dma-names = "tx", "rx", "tx", "rx";
673 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
674 resets = <&cpg 519>;
675 status = "disabled";
676 };
677
678 hscif2: serial@e6560000 {
679 compatible = "renesas,hscif-r8a77965",
680 "renesas,rcar-gen3-hscif",
681 "renesas,hscif";
682 reg = <0 0xe6560000 0 0x60>;
683 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&cpg CPG_MOD 518>,
685 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
686 <&scif_clk>;
687 clock-names = "fck", "brg_int", "scif_clk";
688 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
689 <&dmac2 0x35>, <&dmac2 0x34>;
690 dma-names = "tx", "rx", "tx", "rx";
691 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
692 resets = <&cpg 518>;
693 status = "disabled";
694 };
695
696 hscif3: serial@e66a0000 {
697 compatible = "renesas,hscif-r8a77965",
698 "renesas,rcar-gen3-hscif",
699 "renesas,hscif";
700 reg = <0 0xe66a0000 0 0x60>;
701 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&cpg CPG_MOD 517>,
703 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
704 <&scif_clk>;
705 clock-names = "fck", "brg_int", "scif_clk";
706 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
707 dma-names = "tx", "rx";
708 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
709 resets = <&cpg 517>;
710 status = "disabled";
711 };
712
713 hscif4: serial@e66b0000 {
714 compatible = "renesas,hscif-r8a77965",
715 "renesas,rcar-gen3-hscif",
716 "renesas,hscif";
717 reg = <0 0xe66b0000 0 0x60>;
718 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
719 clocks = <&cpg CPG_MOD 516>,
720 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
721 <&scif_clk>;
722 clock-names = "fck", "brg_int", "scif_clk";
723 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
724 dma-names = "tx", "rx";
725 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
726 resets = <&cpg 516>;
727 status = "disabled";
728 };
729
730 hsusb: usb@e6590000 {
731 compatible = "renesas,usbhs-r8a77965",
732 "renesas,rcar-gen3-usbhs";
733 reg = <0 0xe6590000 0 0x200>;
734 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
736 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
737 <&usb_dmac1 0>, <&usb_dmac1 1>;
738 dma-names = "ch0", "ch1", "ch2", "ch3";
739 renesas,buswait = <11>;
740 phys = <&usb2_phy0 3>;
741 phy-names = "usb";
742 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
743 resets = <&cpg 704>, <&cpg 703>;
744 status = "disabled";
745 };
746
747 usb_dmac0: dma-controller@e65a0000 {
748 compatible = "renesas,r8a77965-usb-dmac",
749 "renesas,usb-dmac";
750 reg = <0 0xe65a0000 0 0x100>;
751 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
753 interrupt-names = "ch0", "ch1";
754 clocks = <&cpg CPG_MOD 330>;
755 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
756 resets = <&cpg 330>;
757 #dma-cells = <1>;
758 dma-channels = <2>;
759 };
760
761 usb_dmac1: dma-controller@e65b0000 {
762 compatible = "renesas,r8a77965-usb-dmac",
763 "renesas,usb-dmac";
764 reg = <0 0xe65b0000 0 0x100>;
765 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
767 interrupt-names = "ch0", "ch1";
768 clocks = <&cpg CPG_MOD 331>;
769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
770 resets = <&cpg 331>;
771 #dma-cells = <1>;
772 dma-channels = <2>;
773 };
774
775 usb3_phy0: usb-phy@e65ee000 {
776 compatible = "renesas,r8a77965-usb3-phy",
777 "renesas,rcar-gen3-usb3-phy";
778 reg = <0 0xe65ee000 0 0x90>;
779 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
780 <&usb_extal_clk>;
781 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
782 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
783 resets = <&cpg 328>;
784 #phy-cells = <0>;
785 status = "disabled";
786 };
787
788 arm_cc630p: crypto@e6601000 {
789 compatible = "arm,cryptocell-630p-ree";
790 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
791 reg = <0x0 0xe6601000 0 0x1000>;
792 clocks = <&cpg CPG_MOD 229>;
793 resets = <&cpg 229>;
794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
795 };
796
797 dmac0: dma-controller@e6700000 {
798 compatible = "renesas,dmac-r8a77965",
799 "renesas,rcar-dmac";
800 reg = <0 0xe6700000 0 0x10000>;
801 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
818 interrupt-names = "error",
819 "ch0", "ch1", "ch2", "ch3",
820 "ch4", "ch5", "ch6", "ch7",
821 "ch8", "ch9", "ch10", "ch11",
822 "ch12", "ch13", "ch14", "ch15";
823 clocks = <&cpg CPG_MOD 219>;
824 clock-names = "fck";
825 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
826 resets = <&cpg 219>;
827 #dma-cells = <1>;
828 dma-channels = <16>;
829 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
830 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
831 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
832 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
833 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
834 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
835 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
836 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
837 };
838
839 dmac1: dma-controller@e7300000 {
840 compatible = "renesas,dmac-r8a77965",
841 "renesas,rcar-dmac";
842 reg = <0 0xe7300000 0 0x10000>;
843 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
853 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
854 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
860 interrupt-names = "error",
861 "ch0", "ch1", "ch2", "ch3",
862 "ch4", "ch5", "ch6", "ch7",
863 "ch8", "ch9", "ch10", "ch11",
864 "ch12", "ch13", "ch14", "ch15";
865 clocks = <&cpg CPG_MOD 218>;
866 clock-names = "fck";
867 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
868 resets = <&cpg 218>;
869 #dma-cells = <1>;
870 dma-channels = <16>;
871 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
872 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
873 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
874 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
875 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
876 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
877 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
878 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
879 };
880
881 dmac2: dma-controller@e7310000 {
882 compatible = "renesas,dmac-r8a77965",
883 "renesas,rcar-dmac";
884 reg = <0 0xe7310000 0 0x10000>;
885 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
886 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
887 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
888 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
889 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
890 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
892 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
893 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
894 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
897 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
898 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
899 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
900 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
901 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
902 interrupt-names = "error",
903 "ch0", "ch1", "ch2", "ch3",
904 "ch4", "ch5", "ch6", "ch7",
905 "ch8", "ch9", "ch10", "ch11",
906 "ch12", "ch13", "ch14", "ch15";
907 clocks = <&cpg CPG_MOD 217>;
908 clock-names = "fck";
909 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
910 resets = <&cpg 217>;
911 #dma-cells = <1>;
912 dma-channels = <16>;
913 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
914 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
915 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
916 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
917 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
918 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
919 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
920 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
921 };
922
923 ipmmu_ds0: iommu@e6740000 {
924 compatible = "renesas,ipmmu-r8a77965";
925 reg = <0 0xe6740000 0 0x1000>;
926 renesas,ipmmu-main = <&ipmmu_mm 0>;
927 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
928 #iommu-cells = <1>;
929 };
930
931 ipmmu_ds1: iommu@e7740000 {
932 compatible = "renesas,ipmmu-r8a77965";
933 reg = <0 0xe7740000 0 0x1000>;
934 renesas,ipmmu-main = <&ipmmu_mm 1>;
935 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
936 #iommu-cells = <1>;
937 };
938
939 ipmmu_hc: iommu@e6570000 {
940 compatible = "renesas,ipmmu-r8a77965";
941 reg = <0 0xe6570000 0 0x1000>;
942 renesas,ipmmu-main = <&ipmmu_mm 2>;
943 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
944 #iommu-cells = <1>;
945 };
946
947 ipmmu_mm: iommu@e67b0000 {
948 compatible = "renesas,ipmmu-r8a77965";
949 reg = <0 0xe67b0000 0 0x1000>;
950 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
951 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
952 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
953 #iommu-cells = <1>;
954 };
955
956 ipmmu_mp: iommu@ec670000 {
957 compatible = "renesas,ipmmu-r8a77965";
958 reg = <0 0xec670000 0 0x1000>;
959 renesas,ipmmu-main = <&ipmmu_mm 4>;
960 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
961 #iommu-cells = <1>;
962 };
963
964 ipmmu_pv0: iommu@fd800000 {
965 compatible = "renesas,ipmmu-r8a77965";
966 reg = <0 0xfd800000 0 0x1000>;
967 renesas,ipmmu-main = <&ipmmu_mm 6>;
968 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
969 #iommu-cells = <1>;
970 };
971
972 ipmmu_rt: iommu@ffc80000 {
973 compatible = "renesas,ipmmu-r8a77965";
974 reg = <0 0xffc80000 0 0x1000>;
975 renesas,ipmmu-main = <&ipmmu_mm 10>;
976 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
977 #iommu-cells = <1>;
978 };
979
980 ipmmu_vc0: iommu@fe6b0000 {
981 compatible = "renesas,ipmmu-r8a77965";
982 reg = <0 0xfe6b0000 0 0x1000>;
983 renesas,ipmmu-main = <&ipmmu_mm 12>;
984 power-domains = <&sysc R8A77965_PD_A3VC>;
985 #iommu-cells = <1>;
986 };
987
988 ipmmu_vi0: iommu@febd0000 {
989 compatible = "renesas,ipmmu-r8a77965";
990 reg = <0 0xfebd0000 0 0x1000>;
991 renesas,ipmmu-main = <&ipmmu_mm 14>;
992 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
993 #iommu-cells = <1>;
994 };
995
996 ipmmu_vp0: iommu@fe990000 {
997 compatible = "renesas,ipmmu-r8a77965";
998 reg = <0 0xfe990000 0 0x1000>;
999 renesas,ipmmu-main = <&ipmmu_mm 16>;
1000 power-domains = <&sysc R8A77965_PD_A3VP>;
1001 #iommu-cells = <1>;
1002 };
1003
1004 avb: ethernet@e6800000 {
1005 compatible = "renesas,etheravb-r8a77965",
1006 "renesas,etheravb-rcar-gen3";
1007 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1008 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1009 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1010 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1011 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1012 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1013 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1014 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1015 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1016 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1017 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1018 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1019 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1020 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1021 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1022 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1023 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1033 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1034 "ch4", "ch5", "ch6", "ch7",
1035 "ch8", "ch9", "ch10", "ch11",
1036 "ch12", "ch13", "ch14", "ch15",
1037 "ch16", "ch17", "ch18", "ch19",
1038 "ch20", "ch21", "ch22", "ch23",
1039 "ch24";
1040 clocks = <&cpg CPG_MOD 812>;
1041 clock-names = "fck";
1042 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1043 resets = <&cpg 812>;
1044 phy-mode = "rgmii";
1045 rx-internal-delay-ps = <0>;
1046 tx-internal-delay-ps = <0>;
1047 iommus = <&ipmmu_ds0 16>;
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1050 status = "disabled";
1051 };
1052
1053 can0: can@e6c30000 {
1054 compatible = "renesas,can-r8a77965",
1055 "renesas,rcar-gen3-can";
1056 reg = <0 0xe6c30000 0 0x1000>;
1057 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1058 clocks = <&cpg CPG_MOD 916>,
1059 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1060 <&can_clk>;
1061 clock-names = "clkp1", "clkp2", "can_clk";
1062 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1063 assigned-clock-rates = <40000000>;
1064 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1065 resets = <&cpg 916>;
1066 status = "disabled";
1067 };
1068
1069 can1: can@e6c38000 {
1070 compatible = "renesas,can-r8a77965",
1071 "renesas,rcar-gen3-can";
1072 reg = <0 0xe6c38000 0 0x1000>;
1073 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1074 clocks = <&cpg CPG_MOD 915>,
1075 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1076 <&can_clk>;
1077 clock-names = "clkp1", "clkp2", "can_clk";
1078 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1079 assigned-clock-rates = <40000000>;
1080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1081 resets = <&cpg 915>;
1082 status = "disabled";
1083 };
1084
1085 canfd: can@e66c0000 {
1086 compatible = "renesas,r8a77965-canfd",
1087 "renesas,rcar-gen3-canfd";
1088 reg = <0 0xe66c0000 0 0x8000>;
1089 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1090 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1091 interrupt-names = "ch_int", "g_int";
1092 clocks = <&cpg CPG_MOD 914>,
1093 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1094 <&can_clk>;
1095 clock-names = "fck", "canfd", "can_clk";
1096 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1097 assigned-clock-rates = <40000000>;
1098 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1099 resets = <&cpg 914>;
1100 status = "disabled";
1101
1102 channel0 {
1103 status = "disabled";
1104 };
1105
1106 channel1 {
1107 status = "disabled";
1108 };
1109 };
1110
1111 pwm0: pwm@e6e30000 {
1112 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1113 reg = <0 0xe6e30000 0 8>;
1114 #pwm-cells = <2>;
1115 clocks = <&cpg CPG_MOD 523>;
1116 resets = <&cpg 523>;
1117 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1118 status = "disabled";
1119 };
1120
1121 pwm1: pwm@e6e31000 {
1122 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1123 reg = <0 0xe6e31000 0 8>;
1124 #pwm-cells = <2>;
1125 clocks = <&cpg CPG_MOD 523>;
1126 resets = <&cpg 523>;
1127 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1128 status = "disabled";
1129 };
1130
1131 pwm2: pwm@e6e32000 {
1132 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1133 reg = <0 0xe6e32000 0 8>;
1134 #pwm-cells = <2>;
1135 clocks = <&cpg CPG_MOD 523>;
1136 resets = <&cpg 523>;
1137 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1138 status = "disabled";
1139 };
1140
1141 pwm3: pwm@e6e33000 {
1142 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1143 reg = <0 0xe6e33000 0 8>;
1144 #pwm-cells = <2>;
1145 clocks = <&cpg CPG_MOD 523>;
1146 resets = <&cpg 523>;
1147 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1148 status = "disabled";
1149 };
1150
1151 pwm4: pwm@e6e34000 {
1152 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1153 reg = <0 0xe6e34000 0 8>;
1154 #pwm-cells = <2>;
1155 clocks = <&cpg CPG_MOD 523>;
1156 resets = <&cpg 523>;
1157 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1158 status = "disabled";
1159 };
1160
1161 pwm5: pwm@e6e35000 {
1162 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1163 reg = <0 0xe6e35000 0 8>;
1164 #pwm-cells = <2>;
1165 clocks = <&cpg CPG_MOD 523>;
1166 resets = <&cpg 523>;
1167 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1168 status = "disabled";
1169 };
1170
1171 pwm6: pwm@e6e36000 {
1172 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1173 reg = <0 0xe6e36000 0 8>;
1174 #pwm-cells = <2>;
1175 clocks = <&cpg CPG_MOD 523>;
1176 resets = <&cpg 523>;
1177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1178 status = "disabled";
1179 };
1180
1181 scif0: serial@e6e60000 {
1182 compatible = "renesas,scif-r8a77965",
1183 "renesas,rcar-gen3-scif", "renesas,scif";
1184 reg = <0 0xe6e60000 0 64>;
1185 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1186 clocks = <&cpg CPG_MOD 207>,
1187 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1188 <&scif_clk>;
1189 clock-names = "fck", "brg_int", "scif_clk";
1190 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1191 <&dmac2 0x51>, <&dmac2 0x50>;
1192 dma-names = "tx", "rx", "tx", "rx";
1193 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1194 resets = <&cpg 207>;
1195 status = "disabled";
1196 };
1197
1198 scif1: serial@e6e68000 {
1199 compatible = "renesas,scif-r8a77965",
1200 "renesas,rcar-gen3-scif", "renesas,scif";
1201 reg = <0 0xe6e68000 0 64>;
1202 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1203 clocks = <&cpg CPG_MOD 206>,
1204 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1205 <&scif_clk>;
1206 clock-names = "fck", "brg_int", "scif_clk";
1207 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1208 <&dmac2 0x53>, <&dmac2 0x52>;
1209 dma-names = "tx", "rx", "tx", "rx";
1210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1211 resets = <&cpg 206>;
1212 status = "disabled";
1213 };
1214
1215 scif2: serial@e6e88000 {
1216 compatible = "renesas,scif-r8a77965",
1217 "renesas,rcar-gen3-scif", "renesas,scif";
1218 reg = <0 0xe6e88000 0 64>;
1219 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1220 clocks = <&cpg CPG_MOD 310>,
1221 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1222 <&scif_clk>;
1223 clock-names = "fck", "brg_int", "scif_clk";
1224 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1225 <&dmac2 0x13>, <&dmac2 0x12>;
1226 dma-names = "tx", "rx", "tx", "rx";
1227 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1228 resets = <&cpg 310>;
1229 status = "disabled";
1230 };
1231
1232 scif3: serial@e6c50000 {
1233 compatible = "renesas,scif-r8a77965",
1234 "renesas,rcar-gen3-scif", "renesas,scif";
1235 reg = <0 0xe6c50000 0 64>;
1236 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1237 clocks = <&cpg CPG_MOD 204>,
1238 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1239 <&scif_clk>;
1240 clock-names = "fck", "brg_int", "scif_clk";
1241 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1242 dma-names = "tx", "rx";
1243 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1244 resets = <&cpg 204>;
1245 status = "disabled";
1246 };
1247
1248 scif4: serial@e6c40000 {
1249 compatible = "renesas,scif-r8a77965",
1250 "renesas,rcar-gen3-scif", "renesas,scif";
1251 reg = <0 0xe6c40000 0 64>;
1252 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1253 clocks = <&cpg CPG_MOD 203>,
1254 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1255 <&scif_clk>;
1256 clock-names = "fck", "brg_int", "scif_clk";
1257 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1258 dma-names = "tx", "rx";
1259 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1260 resets = <&cpg 203>;
1261 status = "disabled";
1262 };
1263
1264 scif5: serial@e6f30000 {
1265 compatible = "renesas,scif-r8a77965",
1266 "renesas,rcar-gen3-scif", "renesas,scif";
1267 reg = <0 0xe6f30000 0 64>;
1268 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1269 clocks = <&cpg CPG_MOD 202>,
1270 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1271 <&scif_clk>;
1272 clock-names = "fck", "brg_int", "scif_clk";
1273 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1274 <&dmac2 0x5b>, <&dmac2 0x5a>;
1275 dma-names = "tx", "rx", "tx", "rx";
1276 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1277 resets = <&cpg 202>;
1278 status = "disabled";
1279 };
1280
1281 tpu: pwm@e6e80000 {
1282 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1283 reg = <0 0xe6e80000 0 0x148>;
1284 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1285 clocks = <&cpg CPG_MOD 304>;
1286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1287 resets = <&cpg 304>;
1288 #pwm-cells = <3>;
1289 status = "disabled";
1290 };
1291
1292 msiof0: spi@e6e90000 {
1293 compatible = "renesas,msiof-r8a77965",
1294 "renesas,rcar-gen3-msiof";
1295 reg = <0 0xe6e90000 0 0x0064>;
1296 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1297 clocks = <&cpg CPG_MOD 211>;
1298 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1299 <&dmac2 0x41>, <&dmac2 0x40>;
1300 dma-names = "tx", "rx", "tx", "rx";
1301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1302 resets = <&cpg 211>;
1303 #address-cells = <1>;
1304 #size-cells = <0>;
1305 status = "disabled";
1306 };
1307
1308 msiof1: spi@e6ea0000 {
1309 compatible = "renesas,msiof-r8a77965",
1310 "renesas,rcar-gen3-msiof";
1311 reg = <0 0xe6ea0000 0 0x0064>;
1312 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1313 clocks = <&cpg CPG_MOD 210>;
1314 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1315 <&dmac2 0x43>, <&dmac2 0x42>;
1316 dma-names = "tx", "rx", "tx", "rx";
1317 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1318 resets = <&cpg 210>;
1319 #address-cells = <1>;
1320 #size-cells = <0>;
1321 status = "disabled";
1322 };
1323
1324 msiof2: spi@e6c00000 {
1325 compatible = "renesas,msiof-r8a77965",
1326 "renesas,rcar-gen3-msiof";
1327 reg = <0 0xe6c00000 0 0x0064>;
1328 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1329 clocks = <&cpg CPG_MOD 209>;
1330 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1331 dma-names = "tx", "rx";
1332 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1333 resets = <&cpg 209>;
1334 #address-cells = <1>;
1335 #size-cells = <0>;
1336 status = "disabled";
1337 };
1338
1339 msiof3: spi@e6c10000 {
1340 compatible = "renesas,msiof-r8a77965",
1341 "renesas,rcar-gen3-msiof";
1342 reg = <0 0xe6c10000 0 0x0064>;
1343 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1344 clocks = <&cpg CPG_MOD 208>;
1345 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1346 dma-names = "tx", "rx";
1347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1348 resets = <&cpg 208>;
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1351 status = "disabled";
1352 };
1353
1354 vin0: video@e6ef0000 {
1355 compatible = "renesas,vin-r8a77965";
1356 reg = <0 0xe6ef0000 0 0x1000>;
1357 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1358 clocks = <&cpg CPG_MOD 811>;
1359 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1360 resets = <&cpg 811>;
1361 renesas,id = <0>;
1362 status = "disabled";
1363
1364 ports {
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1367
1368 port@1 {
1369 #address-cells = <1>;
1370 #size-cells = <0>;
1371
1372 reg = <1>;
1373
1374 vin0csi20: endpoint@0 {
1375 reg = <0>;
1376 remote-endpoint = <&csi20vin0>;
1377 };
1378 vin0csi40: endpoint@2 {
1379 reg = <2>;
1380 remote-endpoint = <&csi40vin0>;
1381 };
1382 };
1383 };
1384 };
1385
1386 vin1: video@e6ef1000 {
1387 compatible = "renesas,vin-r8a77965";
1388 reg = <0 0xe6ef1000 0 0x1000>;
1389 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1390 clocks = <&cpg CPG_MOD 810>;
1391 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1392 resets = <&cpg 810>;
1393 renesas,id = <1>;
1394 status = "disabled";
1395
1396 ports {
1397 #address-cells = <1>;
1398 #size-cells = <0>;
1399
1400 port@1 {
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1403
1404 reg = <1>;
1405
1406 vin1csi20: endpoint@0 {
1407 reg = <0>;
1408 remote-endpoint = <&csi20vin1>;
1409 };
1410 vin1csi40: endpoint@2 {
1411 reg = <2>;
1412 remote-endpoint = <&csi40vin1>;
1413 };
1414 };
1415 };
1416 };
1417
1418 vin2: video@e6ef2000 {
1419 compatible = "renesas,vin-r8a77965";
1420 reg = <0 0xe6ef2000 0 0x1000>;
1421 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1422 clocks = <&cpg CPG_MOD 809>;
1423 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1424 resets = <&cpg 809>;
1425 renesas,id = <2>;
1426 status = "disabled";
1427
1428 ports {
1429 #address-cells = <1>;
1430 #size-cells = <0>;
1431
1432 port@1 {
1433 #address-cells = <1>;
1434 #size-cells = <0>;
1435
1436 reg = <1>;
1437
1438 vin2csi20: endpoint@0 {
1439 reg = <0>;
1440 remote-endpoint = <&csi20vin2>;
1441 };
1442 vin2csi40: endpoint@2 {
1443 reg = <2>;
1444 remote-endpoint = <&csi40vin2>;
1445 };
1446 };
1447 };
1448 };
1449
1450 vin3: video@e6ef3000 {
1451 compatible = "renesas,vin-r8a77965";
1452 reg = <0 0xe6ef3000 0 0x1000>;
1453 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1454 clocks = <&cpg CPG_MOD 808>;
1455 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1456 resets = <&cpg 808>;
1457 renesas,id = <3>;
1458 status = "disabled";
1459
1460 ports {
1461 #address-cells = <1>;
1462 #size-cells = <0>;
1463
1464 port@1 {
1465 #address-cells = <1>;
1466 #size-cells = <0>;
1467
1468 reg = <1>;
1469
1470 vin3csi20: endpoint@0 {
1471 reg = <0>;
1472 remote-endpoint = <&csi20vin3>;
1473 };
1474 vin3csi40: endpoint@2 {
1475 reg = <2>;
1476 remote-endpoint = <&csi40vin3>;
1477 };
1478 };
1479 };
1480 };
1481
1482 vin4: video@e6ef4000 {
1483 compatible = "renesas,vin-r8a77965";
1484 reg = <0 0xe6ef4000 0 0x1000>;
1485 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1486 clocks = <&cpg CPG_MOD 807>;
1487 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1488 resets = <&cpg 807>;
1489 renesas,id = <4>;
1490 status = "disabled";
1491
1492 ports {
1493 #address-cells = <1>;
1494 #size-cells = <0>;
1495
1496 port@1 {
1497 #address-cells = <1>;
1498 #size-cells = <0>;
1499
1500 reg = <1>;
1501
1502 vin4csi20: endpoint@0 {
1503 reg = <0>;
1504 remote-endpoint = <&csi20vin4>;
1505 };
1506 vin4csi40: endpoint@2 {
1507 reg = <2>;
1508 remote-endpoint = <&csi40vin4>;
1509 };
1510 };
1511 };
1512 };
1513
1514 vin5: video@e6ef5000 {
1515 compatible = "renesas,vin-r8a77965";
1516 reg = <0 0xe6ef5000 0 0x1000>;
1517 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1518 clocks = <&cpg CPG_MOD 806>;
1519 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1520 resets = <&cpg 806>;
1521 renesas,id = <5>;
1522 status = "disabled";
1523
1524 ports {
1525 #address-cells = <1>;
1526 #size-cells = <0>;
1527
1528 port@1 {
1529 #address-cells = <1>;
1530 #size-cells = <0>;
1531
1532 reg = <1>;
1533
1534 vin5csi20: endpoint@0 {
1535 reg = <0>;
1536 remote-endpoint = <&csi20vin5>;
1537 };
1538 vin5csi40: endpoint@2 {
1539 reg = <2>;
1540 remote-endpoint = <&csi40vin5>;
1541 };
1542 };
1543 };
1544 };
1545
1546 vin6: video@e6ef6000 {
1547 compatible = "renesas,vin-r8a77965";
1548 reg = <0 0xe6ef6000 0 0x1000>;
1549 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1550 clocks = <&cpg CPG_MOD 805>;
1551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1552 resets = <&cpg 805>;
1553 renesas,id = <6>;
1554 status = "disabled";
1555
1556 ports {
1557 #address-cells = <1>;
1558 #size-cells = <0>;
1559
1560 port@1 {
1561 #address-cells = <1>;
1562 #size-cells = <0>;
1563
1564 reg = <1>;
1565
1566 vin6csi20: endpoint@0 {
1567 reg = <0>;
1568 remote-endpoint = <&csi20vin6>;
1569 };
1570 vin6csi40: endpoint@2 {
1571 reg = <2>;
1572 remote-endpoint = <&csi40vin6>;
1573 };
1574 };
1575 };
1576 };
1577
1578 vin7: video@e6ef7000 {
1579 compatible = "renesas,vin-r8a77965";
1580 reg = <0 0xe6ef7000 0 0x1000>;
1581 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1582 clocks = <&cpg CPG_MOD 804>;
1583 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1584 resets = <&cpg 804>;
1585 renesas,id = <7>;
1586 status = "disabled";
1587
1588 ports {
1589 #address-cells = <1>;
1590 #size-cells = <0>;
1591
1592 port@1 {
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595
1596 reg = <1>;
1597
1598 vin7csi20: endpoint@0 {
1599 reg = <0>;
1600 remote-endpoint = <&csi20vin7>;
1601 };
1602 vin7csi40: endpoint@2 {
1603 reg = <2>;
1604 remote-endpoint = <&csi40vin7>;
1605 };
1606 };
1607 };
1608 };
1609
1610 drif00: rif@e6f40000 {
1611 compatible = "renesas,r8a77965-drif",
1612 "renesas,rcar-gen3-drif";
1613 reg = <0 0xe6f40000 0 0x84>;
1614 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1615 clocks = <&cpg CPG_MOD 515>;
1616 clock-names = "fck";
1617 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1618 dma-names = "rx", "rx";
1619 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1620 resets = <&cpg 515>;
1621 renesas,bonding = <&drif01>;
1622 status = "disabled";
1623 };
1624
1625 drif01: rif@e6f50000 {
1626 compatible = "renesas,r8a77965-drif",
1627 "renesas,rcar-gen3-drif";
1628 reg = <0 0xe6f50000 0 0x84>;
1629 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1630 clocks = <&cpg CPG_MOD 514>;
1631 clock-names = "fck";
1632 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1633 dma-names = "rx", "rx";
1634 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1635 resets = <&cpg 514>;
1636 renesas,bonding = <&drif00>;
1637 status = "disabled";
1638 };
1639
1640 drif10: rif@e6f60000 {
1641 compatible = "renesas,r8a77965-drif",
1642 "renesas,rcar-gen3-drif";
1643 reg = <0 0xe6f60000 0 0x84>;
1644 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1645 clocks = <&cpg CPG_MOD 513>;
1646 clock-names = "fck";
1647 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1648 dma-names = "rx", "rx";
1649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1650 resets = <&cpg 513>;
1651 renesas,bonding = <&drif11>;
1652 status = "disabled";
1653 };
1654
1655 drif11: rif@e6f70000 {
1656 compatible = "renesas,r8a77965-drif",
1657 "renesas,rcar-gen3-drif";
1658 reg = <0 0xe6f70000 0 0x84>;
1659 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1660 clocks = <&cpg CPG_MOD 512>;
1661 clock-names = "fck";
1662 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1663 dma-names = "rx", "rx";
1664 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1665 resets = <&cpg 512>;
1666 renesas,bonding = <&drif10>;
1667 status = "disabled";
1668 };
1669
1670 drif20: rif@e6f80000 {
1671 compatible = "renesas,r8a77965-drif",
1672 "renesas,rcar-gen3-drif";
1673 reg = <0 0xe6f80000 0 0x84>;
1674 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1675 clocks = <&cpg CPG_MOD 511>;
1676 clock-names = "fck";
1677 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1678 dma-names = "rx", "rx";
1679 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1680 resets = <&cpg 511>;
1681 renesas,bonding = <&drif21>;
1682 status = "disabled";
1683 };
1684
1685 drif21: rif@e6f90000 {
1686 compatible = "renesas,r8a77965-drif",
1687 "renesas,rcar-gen3-drif";
1688 reg = <0 0xe6f90000 0 0x84>;
1689 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1690 clocks = <&cpg CPG_MOD 510>;
1691 clock-names = "fck";
1692 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1693 dma-names = "rx", "rx";
1694 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1695 resets = <&cpg 510>;
1696 renesas,bonding = <&drif20>;
1697 status = "disabled";
1698 };
1699
1700 drif30: rif@e6fa0000 {
1701 compatible = "renesas,r8a77965-drif",
1702 "renesas,rcar-gen3-drif";
1703 reg = <0 0xe6fa0000 0 0x84>;
1704 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1705 clocks = <&cpg CPG_MOD 509>;
1706 clock-names = "fck";
1707 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1708 dma-names = "rx", "rx";
1709 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1710 resets = <&cpg 509>;
1711 renesas,bonding = <&drif31>;
1712 status = "disabled";
1713 };
1714
1715 drif31: rif@e6fb0000 {
1716 compatible = "renesas,r8a77965-drif",
1717 "renesas,rcar-gen3-drif";
1718 reg = <0 0xe6fb0000 0 0x84>;
1719 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1720 clocks = <&cpg CPG_MOD 508>;
1721 clock-names = "fck";
1722 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1723 dma-names = "rx", "rx";
1724 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1725 resets = <&cpg 508>;
1726 renesas,bonding = <&drif30>;
1727 status = "disabled";
1728 };
1729
1730 rcar_sound: sound@ec500000 {
1731 /*
1732 * #sound-dai-cells is required if simple-card
1733 *
1734 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1735 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1736 */
1737 /*
1738 * #clock-cells is required for audio_clkout0/1/2/3
1739 *
1740 * clkout : #clock-cells = <0>; <&rcar_sound>;
1741 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1742 */
1743 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1744 reg = <0 0xec500000 0 0x1000>, /* SCU */
1745 <0 0xec5a0000 0 0x100>, /* ADG */
1746 <0 0xec540000 0 0x1000>, /* SSIU */
1747 <0 0xec541000 0 0x280>, /* SSI */
1748 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1749 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1750
1751 clocks = <&cpg CPG_MOD 1005>,
1752 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1753 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1754 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1755 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1756 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1757 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1758 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1759 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1760 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1761 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1762 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1763 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1764 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1765 <&audio_clk_a>, <&audio_clk_b>,
1766 <&audio_clk_c>,
1767 <&cpg CPG_MOD 922>;
1768 clock-names = "ssi-all",
1769 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1770 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1771 "ssi.1", "ssi.0",
1772 "src.9", "src.8", "src.7", "src.6",
1773 "src.5", "src.4", "src.3", "src.2",
1774 "src.1", "src.0",
1775 "mix.1", "mix.0",
1776 "ctu.1", "ctu.0",
1777 "dvc.0", "dvc.1",
1778 "clk_a", "clk_b", "clk_c", "clk_i";
1779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1780 resets = <&cpg 1005>,
1781 <&cpg 1006>, <&cpg 1007>,
1782 <&cpg 1008>, <&cpg 1009>,
1783 <&cpg 1010>, <&cpg 1011>,
1784 <&cpg 1012>, <&cpg 1013>,
1785 <&cpg 1014>, <&cpg 1015>;
1786 reset-names = "ssi-all",
1787 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1788 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1789 "ssi.1", "ssi.0";
1790 status = "disabled";
1791
1792 rcar_sound,dvc {
1793 dvc0: dvc-0 {
1794 dmas = <&audma1 0xbc>;
1795 dma-names = "tx";
1796 };
1797 dvc1: dvc-1 {
1798 dmas = <&audma1 0xbe>;
1799 dma-names = "tx";
1800 };
1801 };
1802
1803 rcar_sound,mix {
1804 mix0: mix-0 { };
1805 mix1: mix-1 { };
1806 };
1807
1808 rcar_sound,ctu {
1809 ctu00: ctu-0 { };
1810 ctu01: ctu-1 { };
1811 ctu02: ctu-2 { };
1812 ctu03: ctu-3 { };
1813 ctu10: ctu-4 { };
1814 ctu11: ctu-5 { };
1815 ctu12: ctu-6 { };
1816 ctu13: ctu-7 { };
1817 };
1818
1819 rcar_sound,src {
1820 src0: src-0 {
1821 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1822 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1823 dma-names = "rx", "tx";
1824 };
1825 src1: src-1 {
1826 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1827 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1828 dma-names = "rx", "tx";
1829 };
1830 src2: src-2 {
1831 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1832 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1833 dma-names = "rx", "tx";
1834 };
1835 src3: src-3 {
1836 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1837 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1838 dma-names = "rx", "tx";
1839 };
1840 src4: src-4 {
1841 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1842 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1843 dma-names = "rx", "tx";
1844 };
1845 src5: src-5 {
1846 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1847 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1848 dma-names = "rx", "tx";
1849 };
1850 src6: src-6 {
1851 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1852 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1853 dma-names = "rx", "tx";
1854 };
1855 src7: src-7 {
1856 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1857 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1858 dma-names = "rx", "tx";
1859 };
1860 src8: src-8 {
1861 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1862 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1863 dma-names = "rx", "tx";
1864 };
1865 src9: src-9 {
1866 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1867 dmas = <&audma0 0x97>, <&audma1 0xba>;
1868 dma-names = "rx", "tx";
1869 };
1870 };
1871
1872 rcar_sound,ssiu {
1873 ssiu00: ssiu-0 {
1874 dmas = <&audma0 0x15>, <&audma1 0x16>;
1875 dma-names = "rx", "tx";
1876 };
1877 ssiu01: ssiu-1 {
1878 dmas = <&audma0 0x35>, <&audma1 0x36>;
1879 dma-names = "rx", "tx";
1880 };
1881 ssiu02: ssiu-2 {
1882 dmas = <&audma0 0x37>, <&audma1 0x38>;
1883 dma-names = "rx", "tx";
1884 };
1885 ssiu03: ssiu-3 {
1886 dmas = <&audma0 0x47>, <&audma1 0x48>;
1887 dma-names = "rx", "tx";
1888 };
1889 ssiu04: ssiu-4 {
1890 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1891 dma-names = "rx", "tx";
1892 };
1893 ssiu05: ssiu-5 {
1894 dmas = <&audma0 0x43>, <&audma1 0x44>;
1895 dma-names = "rx", "tx";
1896 };
1897 ssiu06: ssiu-6 {
1898 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1899 dma-names = "rx", "tx";
1900 };
1901 ssiu07: ssiu-7 {
1902 dmas = <&audma0 0x53>, <&audma1 0x54>;
1903 dma-names = "rx", "tx";
1904 };
1905 ssiu10: ssiu-8 {
1906 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1907 dma-names = "rx", "tx";
1908 };
1909 ssiu11: ssiu-9 {
1910 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1911 dma-names = "rx", "tx";
1912 };
1913 ssiu12: ssiu-10 {
1914 dmas = <&audma0 0x57>, <&audma1 0x58>;
1915 dma-names = "rx", "tx";
1916 };
1917 ssiu13: ssiu-11 {
1918 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1919 dma-names = "rx", "tx";
1920 };
1921 ssiu14: ssiu-12 {
1922 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1923 dma-names = "rx", "tx";
1924 };
1925 ssiu15: ssiu-13 {
1926 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1927 dma-names = "rx", "tx";
1928 };
1929 ssiu16: ssiu-14 {
1930 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1931 dma-names = "rx", "tx";
1932 };
1933 ssiu17: ssiu-15 {
1934 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1935 dma-names = "rx", "tx";
1936 };
1937 ssiu20: ssiu-16 {
1938 dmas = <&audma0 0x63>, <&audma1 0x64>;
1939 dma-names = "rx", "tx";
1940 };
1941 ssiu21: ssiu-17 {
1942 dmas = <&audma0 0x67>, <&audma1 0x68>;
1943 dma-names = "rx", "tx";
1944 };
1945 ssiu22: ssiu-18 {
1946 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1947 dma-names = "rx", "tx";
1948 };
1949 ssiu23: ssiu-19 {
1950 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1951 dma-names = "rx", "tx";
1952 };
1953 ssiu24: ssiu-20 {
1954 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1955 dma-names = "rx", "tx";
1956 };
1957 ssiu25: ssiu-21 {
1958 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1959 dma-names = "rx", "tx";
1960 };
1961 ssiu26: ssiu-22 {
1962 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1963 dma-names = "rx", "tx";
1964 };
1965 ssiu27: ssiu-23 {
1966 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1967 dma-names = "rx", "tx";
1968 };
1969 ssiu30: ssiu-24 {
1970 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1971 dma-names = "rx", "tx";
1972 };
1973 ssiu31: ssiu-25 {
1974 dmas = <&audma0 0x21>, <&audma1 0x22>;
1975 dma-names = "rx", "tx";
1976 };
1977 ssiu32: ssiu-26 {
1978 dmas = <&audma0 0x23>, <&audma1 0x24>;
1979 dma-names = "rx", "tx";
1980 };
1981 ssiu33: ssiu-27 {
1982 dmas = <&audma0 0x25>, <&audma1 0x26>;
1983 dma-names = "rx", "tx";
1984 };
1985 ssiu34: ssiu-28 {
1986 dmas = <&audma0 0x27>, <&audma1 0x28>;
1987 dma-names = "rx", "tx";
1988 };
1989 ssiu35: ssiu-29 {
1990 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1991 dma-names = "rx", "tx";
1992 };
1993 ssiu36: ssiu-30 {
1994 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1995 dma-names = "rx", "tx";
1996 };
1997 ssiu37: ssiu-31 {
1998 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1999 dma-names = "rx", "tx";
2000 };
2001 ssiu40: ssiu-32 {
2002 dmas = <&audma0 0x71>, <&audma1 0x72>;
2003 dma-names = "rx", "tx";
2004 };
2005 ssiu41: ssiu-33 {
2006 dmas = <&audma0 0x17>, <&audma1 0x18>;
2007 dma-names = "rx", "tx";
2008 };
2009 ssiu42: ssiu-34 {
2010 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2011 dma-names = "rx", "tx";
2012 };
2013 ssiu43: ssiu-35 {
2014 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2015 dma-names = "rx", "tx";
2016 };
2017 ssiu44: ssiu-36 {
2018 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2019 dma-names = "rx", "tx";
2020 };
2021 ssiu45: ssiu-37 {
2022 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2023 dma-names = "rx", "tx";
2024 };
2025 ssiu46: ssiu-38 {
2026 dmas = <&audma0 0x31>, <&audma1 0x32>;
2027 dma-names = "rx", "tx";
2028 };
2029 ssiu47: ssiu-39 {
2030 dmas = <&audma0 0x33>, <&audma1 0x34>;
2031 dma-names = "rx", "tx";
2032 };
2033 ssiu50: ssiu-40 {
2034 dmas = <&audma0 0x73>, <&audma1 0x74>;
2035 dma-names = "rx", "tx";
2036 };
2037 ssiu60: ssiu-41 {
2038 dmas = <&audma0 0x75>, <&audma1 0x76>;
2039 dma-names = "rx", "tx";
2040 };
2041 ssiu70: ssiu-42 {
2042 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2043 dma-names = "rx", "tx";
2044 };
2045 ssiu80: ssiu-43 {
2046 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2047 dma-names = "rx", "tx";
2048 };
2049 ssiu90: ssiu-44 {
2050 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2051 dma-names = "rx", "tx";
2052 };
2053 ssiu91: ssiu-45 {
2054 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2055 dma-names = "rx", "tx";
2056 };
2057 ssiu92: ssiu-46 {
2058 dmas = <&audma0 0x81>, <&audma1 0x82>;
2059 dma-names = "rx", "tx";
2060 };
2061 ssiu93: ssiu-47 {
2062 dmas = <&audma0 0x83>, <&audma1 0x84>;
2063 dma-names = "rx", "tx";
2064 };
2065 ssiu94: ssiu-48 {
2066 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2067 dma-names = "rx", "tx";
2068 };
2069 ssiu95: ssiu-49 {
2070 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2071 dma-names = "rx", "tx";
2072 };
2073 ssiu96: ssiu-50 {
2074 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2075 dma-names = "rx", "tx";
2076 };
2077 ssiu97: ssiu-51 {
2078 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2079 dma-names = "rx", "tx";
2080 };
2081 };
2082
2083 rcar_sound,ssi {
2084 ssi0: ssi-0 {
2085 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2086 dmas = <&audma0 0x01>, <&audma1 0x02>;
2087 dma-names = "rx", "tx";
2088 };
2089 ssi1: ssi-1 {
2090 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2091 dmas = <&audma0 0x03>, <&audma1 0x04>;
2092 dma-names = "rx", "tx";
2093 };
2094 ssi2: ssi-2 {
2095 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2096 dmas = <&audma0 0x05>, <&audma1 0x06>;
2097 dma-names = "rx", "tx";
2098 };
2099 ssi3: ssi-3 {
2100 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2101 dmas = <&audma0 0x07>, <&audma1 0x08>;
2102 dma-names = "rx", "tx";
2103 };
2104 ssi4: ssi-4 {
2105 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2106 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2107 dma-names = "rx", "tx";
2108 };
2109 ssi5: ssi-5 {
2110 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2111 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2112 dma-names = "rx", "tx";
2113 };
2114 ssi6: ssi-6 {
2115 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2116 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2117 dma-names = "rx", "tx";
2118 };
2119 ssi7: ssi-7 {
2120 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2121 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2122 dma-names = "rx", "tx";
2123 };
2124 ssi8: ssi-8 {
2125 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2126 dmas = <&audma0 0x11>, <&audma1 0x12>;
2127 dma-names = "rx", "tx";
2128 };
2129 ssi9: ssi-9 {
2130 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2131 dmas = <&audma0 0x13>, <&audma1 0x14>;
2132 dma-names = "rx", "tx";
2133 };
2134 };
2135 };
2136
2137 mlp: mlp@ec520000 {
2138 compatible = "renesas,r8a77965-mlp",
2139 "renesas,rcar-gen3-mlp";
2140 reg = <0 0xec520000 0 0x800>;
2141 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2142 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2143 clocks = <&cpg CPG_MOD 802>;
2144 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2145 resets = <&cpg 802>;
2146 status = "disabled";
2147 };
2148
2149 audma0: dma-controller@ec700000 {
2150 compatible = "renesas,dmac-r8a77965",
2151 "renesas,rcar-dmac";
2152 reg = <0 0xec700000 0 0x10000>;
2153 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2154 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2155 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2156 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2157 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2158 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2159 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2160 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2161 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2162 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2163 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2164 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2165 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2166 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2167 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2168 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2170 interrupt-names = "error",
2171 "ch0", "ch1", "ch2", "ch3",
2172 "ch4", "ch5", "ch6", "ch7",
2173 "ch8", "ch9", "ch10", "ch11",
2174 "ch12", "ch13", "ch14", "ch15";
2175 clocks = <&cpg CPG_MOD 502>;
2176 clock-names = "fck";
2177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2178 resets = <&cpg 502>;
2179 #dma-cells = <1>;
2180 dma-channels = <16>;
2181 };
2182
2183 audma1: dma-controller@ec720000 {
2184 compatible = "renesas,dmac-r8a77965",
2185 "renesas,rcar-dmac";
2186 reg = <0 0xec720000 0 0x10000>;
2187 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2188 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2189 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2190 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2191 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2192 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2193 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2194 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2195 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2196 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2197 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2198 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2199 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2200 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2201 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2202 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2204 interrupt-names = "error",
2205 "ch0", "ch1", "ch2", "ch3",
2206 "ch4", "ch5", "ch6", "ch7",
2207 "ch8", "ch9", "ch10", "ch11",
2208 "ch12", "ch13", "ch14", "ch15";
2209 clocks = <&cpg CPG_MOD 501>;
2210 clock-names = "fck";
2211 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2212 resets = <&cpg 501>;
2213 #dma-cells = <1>;
2214 dma-channels = <16>;
2215 };
2216
2217 xhci0: usb@ee000000 {
2218 compatible = "renesas,xhci-r8a77965",
2219 "renesas,rcar-gen3-xhci";
2220 reg = <0 0xee000000 0 0xc00>;
2221 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2222 clocks = <&cpg CPG_MOD 328>;
2223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2224 resets = <&cpg 328>;
2225 status = "disabled";
2226 };
2227
2228 usb3_peri0: usb@ee020000 {
2229 compatible = "renesas,r8a77965-usb3-peri",
2230 "renesas,rcar-gen3-usb3-peri";
2231 reg = <0 0xee020000 0 0x400>;
2232 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2233 clocks = <&cpg CPG_MOD 328>;
2234 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2235 resets = <&cpg 328>;
2236 status = "disabled";
2237 };
2238
2239 ohci0: usb@ee080000 {
2240 compatible = "generic-ohci";
2241 reg = <0 0xee080000 0 0x100>;
2242 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2243 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2244 phys = <&usb2_phy0 1>;
2245 phy-names = "usb";
2246 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2247 resets = <&cpg 703>, <&cpg 704>;
2248 status = "disabled";
2249 };
2250
2251 ohci1: usb@ee0a0000 {
2252 compatible = "generic-ohci";
2253 reg = <0 0xee0a0000 0 0x100>;
2254 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2255 clocks = <&cpg CPG_MOD 702>;
2256 phys = <&usb2_phy1 1>;
2257 phy-names = "usb";
2258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2259 resets = <&cpg 702>;
2260 status = "disabled";
2261 };
2262
2263 ehci0: usb@ee080100 {
2264 compatible = "generic-ehci";
2265 reg = <0 0xee080100 0 0x100>;
2266 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2267 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2268 phys = <&usb2_phy0 2>;
2269 phy-names = "usb";
2270 companion = <&ohci0>;
2271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2272 resets = <&cpg 703>, <&cpg 704>;
2273 status = "disabled";
2274 };
2275
2276 ehci1: usb@ee0a0100 {
2277 compatible = "generic-ehci";
2278 reg = <0 0xee0a0100 0 0x100>;
2279 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2280 clocks = <&cpg CPG_MOD 702>;
2281 phys = <&usb2_phy1 2>;
2282 phy-names = "usb";
2283 companion = <&ohci1>;
2284 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2285 resets = <&cpg 702>;
2286 status = "disabled";
2287 };
2288
2289 usb2_phy0: usb-phy@ee080200 {
2290 compatible = "renesas,usb2-phy-r8a77965",
2291 "renesas,rcar-gen3-usb2-phy";
2292 reg = <0 0xee080200 0 0x700>;
2293 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2294 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2295 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2296 resets = <&cpg 703>, <&cpg 704>;
2297 #phy-cells = <1>;
2298 status = "disabled";
2299 };
2300
2301 usb2_phy1: usb-phy@ee0a0200 {
2302 compatible = "renesas,usb2-phy-r8a77965",
2303 "renesas,rcar-gen3-usb2-phy";
2304 reg = <0 0xee0a0200 0 0x700>;
2305 clocks = <&cpg CPG_MOD 702>;
2306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2307 resets = <&cpg 702>;
2308 #phy-cells = <1>;
2309 status = "disabled";
2310 };
2311
2312 sdhi0: mmc@ee100000 {
2313 compatible = "renesas,sdhi-r8a77965",
2314 "renesas,rcar-gen3-sdhi";
2315 reg = <0 0xee100000 0 0x2000>;
2316 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2317 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
2318 clock-names = "core", "clkh";
2319 max-frequency = <200000000>;
2320 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2321 resets = <&cpg 314>;
2322 iommus = <&ipmmu_ds1 32>;
2323 status = "disabled";
2324 };
2325
2326 sdhi1: mmc@ee120000 {
2327 compatible = "renesas,sdhi-r8a77965",
2328 "renesas,rcar-gen3-sdhi";
2329 reg = <0 0xee120000 0 0x2000>;
2330 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2331 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
2332 clock-names = "core", "clkh";
2333 max-frequency = <200000000>;
2334 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2335 resets = <&cpg 313>;
2336 iommus = <&ipmmu_ds1 33>;
2337 status = "disabled";
2338 };
2339
2340 sdhi2: mmc@ee140000 {
2341 compatible = "renesas,sdhi-r8a77965",
2342 "renesas,rcar-gen3-sdhi";
2343 reg = <0 0xee140000 0 0x2000>;
2344 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2345 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
2346 clock-names = "core", "clkh";
2347 max-frequency = <200000000>;
2348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2349 resets = <&cpg 312>;
2350 iommus = <&ipmmu_ds1 34>;
2351 status = "disabled";
2352 };
2353
2354 sdhi3: mmc@ee160000 {
2355 compatible = "renesas,sdhi-r8a77965",
2356 "renesas,rcar-gen3-sdhi";
2357 reg = <0 0xee160000 0 0x2000>;
2358 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2359 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
2360 clock-names = "core", "clkh";
2361 max-frequency = <200000000>;
2362 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2363 resets = <&cpg 311>;
2364 iommus = <&ipmmu_ds1 35>;
2365 status = "disabled";
2366 };
2367
2368 rpc: spi@ee200000 {
2369 compatible = "renesas,r8a77965-rpc-if",
2370 "renesas,rcar-gen3-rpc-if";
2371 reg = <0 0xee200000 0 0x200>,
2372 <0 0x08000000 0 0x04000000>,
2373 <0 0xee208000 0 0x100>;
2374 reg-names = "regs", "dirmap", "wbuf";
2375 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2376 clocks = <&cpg CPG_MOD 917>;
2377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2378 resets = <&cpg 917>;
2379 #address-cells = <1>;
2380 #size-cells = <0>;
2381 status = "disabled";
2382 };
2383
2384 sata: sata@ee300000 {
2385 compatible = "renesas,sata-r8a77965",
2386 "renesas,rcar-gen3-sata";
2387 reg = <0 0xee300000 0 0x200000>;
2388 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2389 clocks = <&cpg CPG_MOD 815>;
2390 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2391 resets = <&cpg 815>;
2392 status = "disabled";
2393 };
2394
2395 gic: interrupt-controller@f1010000 {
2396 compatible = "arm,gic-400";
2397 #interrupt-cells = <3>;
2398 #address-cells = <0>;
2399 interrupt-controller;
2400 reg = <0x0 0xf1010000 0 0x1000>,
2401 <0x0 0xf1020000 0 0x20000>,
2402 <0x0 0xf1040000 0 0x20000>,
2403 <0x0 0xf1060000 0 0x20000>;
2404 interrupts = <GIC_PPI 9
2405 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2406 clocks = <&cpg CPG_MOD 408>;
2407 clock-names = "clk";
2408 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2409 resets = <&cpg 408>;
2410 };
2411
2412 pciec0: pcie@fe000000 {
2413 compatible = "renesas,pcie-r8a77965",
2414 "renesas,pcie-rcar-gen3";
2415 reg = <0 0xfe000000 0 0x80000>;
2416 #address-cells = <3>;
2417 #size-cells = <2>;
2418 bus-range = <0x00 0xff>;
2419 device_type = "pci";
2420 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2421 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2422 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2423 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2424 /* Map all possible DDR/IOMMU as inbound ranges */
2425 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2426 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2427 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2428 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2429 #interrupt-cells = <1>;
2430 interrupt-map-mask = <0 0 0 0>;
2431 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2432 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2433 clock-names = "pcie", "pcie_bus";
2434 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2435 resets = <&cpg 319>;
2436 iommu-map = <0 &ipmmu_hc 0 1>;
2437 iommu-map-mask = <0>;
2438 status = "disabled";
2439 };
2440
2441 pciec1: pcie@ee800000 {
2442 compatible = "renesas,pcie-r8a77965",
2443 "renesas,pcie-rcar-gen3";
2444 reg = <0 0xee800000 0 0x80000>;
2445 #address-cells = <3>;
2446 #size-cells = <2>;
2447 bus-range = <0x00 0xff>;
2448 device_type = "pci";
2449 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2450 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2451 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2452 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2453 /* Map all possible DDR/IOMMU as inbound ranges */
2454 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2455 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2456 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2457 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2458 #interrupt-cells = <1>;
2459 interrupt-map-mask = <0 0 0 0>;
2460 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2461 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2462 clock-names = "pcie", "pcie_bus";
2463 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2464 resets = <&cpg 318>;
2465 iommu-map = <0 &ipmmu_hc 1 1>;
2466 iommu-map-mask = <0>;
2467 status = "disabled";
2468 };
2469
2470 fdp1@fe940000 {
2471 compatible = "renesas,fdp1";
2472 reg = <0 0xfe940000 0 0x2400>;
2473 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2474 clocks = <&cpg CPG_MOD 119>;
2475 power-domains = <&sysc R8A77965_PD_A3VP>;
2476 resets = <&cpg 119>;
2477 renesas,fcp = <&fcpf0>;
2478 };
2479
2480 fcpf0: fcp@fe950000 {
2481 compatible = "renesas,fcpf";
2482 reg = <0 0xfe950000 0 0x200>;
2483 clocks = <&cpg CPG_MOD 615>;
2484 power-domains = <&sysc R8A77965_PD_A3VP>;
2485 resets = <&cpg 615>;
2486 };
2487
2488 vspb: vsp@fe960000 {
2489 compatible = "renesas,vsp2";
2490 reg = <0 0xfe960000 0 0x8000>;
2491 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2492 clocks = <&cpg CPG_MOD 626>;
2493 power-domains = <&sysc R8A77965_PD_A3VP>;
2494 resets = <&cpg 626>;
2495
2496 renesas,fcp = <&fcpvb0>;
2497 };
2498
2499 vspi0: vsp@fe9a0000 {
2500 compatible = "renesas,vsp2";
2501 reg = <0 0xfe9a0000 0 0x8000>;
2502 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2503 clocks = <&cpg CPG_MOD 631>;
2504 power-domains = <&sysc R8A77965_PD_A3VP>;
2505 resets = <&cpg 631>;
2506
2507 renesas,fcp = <&fcpvi0>;
2508 };
2509
2510 vspd0: vsp@fea20000 {
2511 compatible = "renesas,vsp2";
2512 reg = <0 0xfea20000 0 0x5000>;
2513 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2514 clocks = <&cpg CPG_MOD 623>;
2515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2516 resets = <&cpg 623>;
2517
2518 renesas,fcp = <&fcpvd0>;
2519 };
2520
2521 vspd1: vsp@fea28000 {
2522 compatible = "renesas,vsp2";
2523 reg = <0 0xfea28000 0 0x5000>;
2524 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2525 clocks = <&cpg CPG_MOD 622>;
2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2527 resets = <&cpg 622>;
2528
2529 renesas,fcp = <&fcpvd1>;
2530 };
2531
2532 fcpvb0: fcp@fe96f000 {
2533 compatible = "renesas,fcpv";
2534 reg = <0 0xfe96f000 0 0x200>;
2535 clocks = <&cpg CPG_MOD 607>;
2536 power-domains = <&sysc R8A77965_PD_A3VP>;
2537 resets = <&cpg 607>;
2538 };
2539
2540 fcpvd0: fcp@fea27000 {
2541 compatible = "renesas,fcpv";
2542 reg = <0 0xfea27000 0 0x200>;
2543 clocks = <&cpg CPG_MOD 603>;
2544 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2545 resets = <&cpg 603>;
2546 };
2547
2548 fcpvd1: fcp@fea2f000 {
2549 compatible = "renesas,fcpv";
2550 reg = <0 0xfea2f000 0 0x200>;
2551 clocks = <&cpg CPG_MOD 602>;
2552 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2553 resets = <&cpg 602>;
2554 };
2555
2556 fcpvi0: fcp@fe9af000 {
2557 compatible = "renesas,fcpv";
2558 reg = <0 0xfe9af000 0 0x200>;
2559 clocks = <&cpg CPG_MOD 611>;
2560 power-domains = <&sysc R8A77965_PD_A3VP>;
2561 resets = <&cpg 611>;
2562 };
2563
2564 cmm0: cmm@fea40000 {
2565 compatible = "renesas,r8a77965-cmm",
2566 "renesas,rcar-gen3-cmm";
2567 reg = <0 0xfea40000 0 0x1000>;
2568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2569 clocks = <&cpg CPG_MOD 711>;
2570 resets = <&cpg 711>;
2571 };
2572
2573 cmm1: cmm@fea50000 {
2574 compatible = "renesas,r8a77965-cmm",
2575 "renesas,rcar-gen3-cmm";
2576 reg = <0 0xfea50000 0 0x1000>;
2577 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2578 clocks = <&cpg CPG_MOD 710>;
2579 resets = <&cpg 710>;
2580 };
2581
2582 cmm3: cmm@fea70000 {
2583 compatible = "renesas,r8a77965-cmm",
2584 "renesas,rcar-gen3-cmm";
2585 reg = <0 0xfea70000 0 0x1000>;
2586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2587 clocks = <&cpg CPG_MOD 708>;
2588 resets = <&cpg 708>;
2589 };
2590
2591 csi20: csi2@fea80000 {
2592 compatible = "renesas,r8a77965-csi2";
2593 reg = <0 0xfea80000 0 0x10000>;
2594 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2595 clocks = <&cpg CPG_MOD 714>;
2596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2597 resets = <&cpg 714>;
2598 status = "disabled";
2599
2600 ports {
2601 #address-cells = <1>;
2602 #size-cells = <0>;
2603
2604 port@0 {
2605 reg = <0>;
2606 };
2607
2608 port@1 {
2609 #address-cells = <1>;
2610 #size-cells = <0>;
2611
2612 reg = <1>;
2613
2614 csi20vin0: endpoint@0 {
2615 reg = <0>;
2616 remote-endpoint = <&vin0csi20>;
2617 };
2618 csi20vin1: endpoint@1 {
2619 reg = <1>;
2620 remote-endpoint = <&vin1csi20>;
2621 };
2622 csi20vin2: endpoint@2 {
2623 reg = <2>;
2624 remote-endpoint = <&vin2csi20>;
2625 };
2626 csi20vin3: endpoint@3 {
2627 reg = <3>;
2628 remote-endpoint = <&vin3csi20>;
2629 };
2630 csi20vin4: endpoint@4 {
2631 reg = <4>;
2632 remote-endpoint = <&vin4csi20>;
2633 };
2634 csi20vin5: endpoint@5 {
2635 reg = <5>;
2636 remote-endpoint = <&vin5csi20>;
2637 };
2638 csi20vin6: endpoint@6 {
2639 reg = <6>;
2640 remote-endpoint = <&vin6csi20>;
2641 };
2642 csi20vin7: endpoint@7 {
2643 reg = <7>;
2644 remote-endpoint = <&vin7csi20>;
2645 };
2646 };
2647 };
2648 };
2649
2650 csi40: csi2@feaa0000 {
2651 compatible = "renesas,r8a77965-csi2";
2652 reg = <0 0xfeaa0000 0 0x10000>;
2653 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2654 clocks = <&cpg CPG_MOD 716>;
2655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2656 resets = <&cpg 716>;
2657 status = "disabled";
2658
2659 ports {
2660 #address-cells = <1>;
2661 #size-cells = <0>;
2662
2663 port@0 {
2664 reg = <0>;
2665 };
2666
2667 port@1 {
2668 #address-cells = <1>;
2669 #size-cells = <0>;
2670
2671 reg = <1>;
2672
2673 csi40vin0: endpoint@0 {
2674 reg = <0>;
2675 remote-endpoint = <&vin0csi40>;
2676 };
2677 csi40vin1: endpoint@1 {
2678 reg = <1>;
2679 remote-endpoint = <&vin1csi40>;
2680 };
2681 csi40vin2: endpoint@2 {
2682 reg = <2>;
2683 remote-endpoint = <&vin2csi40>;
2684 };
2685 csi40vin3: endpoint@3 {
2686 reg = <3>;
2687 remote-endpoint = <&vin3csi40>;
2688 };
2689 csi40vin4: endpoint@4 {
2690 reg = <4>;
2691 remote-endpoint = <&vin4csi40>;
2692 };
2693 csi40vin5: endpoint@5 {
2694 reg = <5>;
2695 remote-endpoint = <&vin5csi40>;
2696 };
2697 csi40vin6: endpoint@6 {
2698 reg = <6>;
2699 remote-endpoint = <&vin6csi40>;
2700 };
2701 csi40vin7: endpoint@7 {
2702 reg = <7>;
2703 remote-endpoint = <&vin7csi40>;
2704 };
2705 };
2706 };
2707 };
2708
2709 hdmi0: hdmi@fead0000 {
2710 compatible = "renesas,r8a77965-hdmi",
2711 "renesas,rcar-gen3-hdmi";
2712 reg = <0 0xfead0000 0 0x10000>;
2713 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2714 clocks = <&cpg CPG_MOD 729>,
2715 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2716 clock-names = "iahb", "isfr";
2717 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2718 resets = <&cpg 729>;
2719 status = "disabled";
2720
2721 ports {
2722 #address-cells = <1>;
2723 #size-cells = <0>;
2724 port@0 {
2725 reg = <0>;
2726 dw_hdmi0_in: endpoint {
2727 remote-endpoint = <&du_out_hdmi0>;
2728 };
2729 };
2730 port@1 {
2731 reg = <1>;
2732 };
2733 };
2734 };
2735
2736 du: display@feb00000 {
2737 compatible = "renesas,du-r8a77965";
2738 reg = <0 0xfeb00000 0 0x80000>;
2739 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2740 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2741 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2742 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2743 <&cpg CPG_MOD 721>;
2744 clock-names = "du.0", "du.1", "du.3";
2745 resets = <&cpg 724>, <&cpg 722>;
2746 reset-names = "du.0", "du.3";
2747
2748 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2749 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2750
2751 status = "disabled";
2752
2753 ports {
2754 #address-cells = <1>;
2755 #size-cells = <0>;
2756
2757 port@0 {
2758 reg = <0>;
2759 };
2760 port@1 {
2761 reg = <1>;
2762 du_out_hdmi0: endpoint {
2763 remote-endpoint = <&dw_hdmi0_in>;
2764 };
2765 };
2766 port@2 {
2767 reg = <2>;
2768 du_out_lvds0: endpoint {
2769 remote-endpoint = <&lvds0_in>;
2770 };
2771 };
2772 };
2773 };
2774
2775 lvds0: lvds@feb90000 {
2776 compatible = "renesas,r8a77965-lvds";
2777 reg = <0 0xfeb90000 0 0x14>;
2778 clocks = <&cpg CPG_MOD 727>;
2779 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2780 resets = <&cpg 727>;
2781 status = "disabled";
2782
2783 ports {
2784 #address-cells = <1>;
2785 #size-cells = <0>;
2786
2787 port@0 {
2788 reg = <0>;
2789 lvds0_in: endpoint {
2790 remote-endpoint = <&du_out_lvds0>;
2791 };
2792 };
2793 port@1 {
2794 reg = <1>;
2795 };
2796 };
2797 };
2798
2799 prr: chipid@fff00044 {
2800 compatible = "renesas,prr";
2801 reg = <0 0xfff00044 0 4>;
2802 };
2803 };
2804
2805 thermal-zones {
2806 sensor1_thermal: sensor1-thermal {
2807 polling-delay-passive = <250>;
2808 polling-delay = <1000>;
2809 thermal-sensors = <&tsc 0>;
2810 sustainable-power = <2439>;
2811
2812 trips {
2813 sensor1_crit: sensor1-crit {
2814 temperature = <120000>;
2815 hysteresis = <1000>;
2816 type = "critical";
2817 };
2818 };
2819 };
2820
2821 sensor2_thermal: sensor2-thermal {
2822 polling-delay-passive = <250>;
2823 polling-delay = <1000>;
2824 thermal-sensors = <&tsc 1>;
2825 sustainable-power = <2439>;
2826
2827 trips {
2828 sensor2_crit: sensor2-crit {
2829 temperature = <120000>;
2830 hysteresis = <1000>;
2831 type = "critical";
2832 };
2833 };
2834 };
2835
2836 sensor3_thermal: sensor3-thermal {
2837 polling-delay-passive = <250>;
2838 polling-delay = <1000>;
2839 thermal-sensors = <&tsc 2>;
2840 sustainable-power = <2439>;
2841
2842 trips {
2843 target: trip-point1 {
2844 /* miliCelsius */
2845 temperature = <100000>;
2846 hysteresis = <1000>;
2847 type = "passive";
2848 };
2849
2850 sensor3_crit: sensor3-crit {
2851 temperature = <120000>;
2852 hysteresis = <1000>;
2853 type = "critical";
2854 };
2855 };
2856
2857 cooling-maps {
2858 map0 {
2859 trip = <&target>;
2860 cooling-device = <&a57_0 2 4>;
2861 contribution = <1024>;
2862 };
2863 };
2864 };
2865 };
2866
2867 timer {
2868 compatible = "arm,armv8-timer";
2869 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2870 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2871 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2872 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2873 };
2874
2875 /* External USB clocks - can be overridden by the board */
2876 usb3s0_clk: usb3s0 {
2877 compatible = "fixed-clock";
2878 #clock-cells = <0>;
2879 clock-frequency = <0>;
2880 };
2881
2882 usb_extal_clk: usb_extal {
2883 compatible = "fixed-clock";
2884 #clock-cells = <0>;
2885 clock-frequency = <0>;
2886 };
2887};