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git01.mediatek.com / filogic / uboot / 93743d241c64bc1f7ecbf3262d1683176551e11f / . / src / arm64 / qcom / pmi632.dtsi
blob: 4eb79e0ce40a5e9715d15d5dfadecac7dbe0fbab [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (C) 2023 Luca Weiss <luca@z3ntu.xyz>
4 */
5
6#include <dt-bindings/iio/qcom,spmi-vadc.h>
7#include <dt-bindings/interrupt-controller/irq.h>
8#include <dt-bindings/spmi/spmi.h>
9
10/ {
11 thermal-zones {
12 pmi632-thermal {
13 polling-delay-passive = <100>;
14 polling-delay = <0>;
15
16 thermal-sensors = <&pmi632_temp>;
17
18 trips {
19 trip0 {
20 temperature = <95000>;
21 hysteresis = <0>;
22 type = "passive";
23 };
24
25 trip1 {
26 temperature = <115000>;
27 hysteresis = <0>;
28 type = "hot";
29 };
30
31 trip2 {
32 temperature = <125000>;
33 hysteresis = <0>;
34 type = "critical";
35 };
36 };
37 };
38 };
39};
40
41&spmi_bus {
42 pmic@2 {
43 compatible = "qcom,pmi632", "qcom,spmi-pmic";
44 reg = <0x2 SPMI_USID>;
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 pmi632_temp: temp-alarm@2400 {
49 compatible = "qcom,spmi-temp-alarm";
50 reg = <0x2400>;
51 interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
52 #thermal-sensor-cells = <0>;
53 };
54
55 pmi632_adc: adc@3100 {
56 compatible = "qcom,spmi-adc5";
57 reg = <0x3100>;
58 #address-cells = <1>;
59 #size-cells = <0>;
60 #io-channel-cells = <1>;
61 interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
62
63 channel@0 {
64 reg = <ADC5_REF_GND>;
65 qcom,pre-scaling = <1 1>;
66 label = "ref_gnd";
67 };
68
69 channel@1 {
70 reg = <ADC5_1P25VREF>;
71 qcom,pre-scaling = <1 1>;
72 label = "vref_1p25";
73 };
74
75 channel@6 {
76 reg = <ADC5_DIE_TEMP>;
77 qcom,pre-scaling = <1 1>;
78 label = "die_temp";
79 };
80
81 channel@7 {
82 reg = <ADC5_USB_IN_I>;
83 qcom,pre-scaling = <1 1>;
84 label = "usb_in_i_uv";
85 };
86
87 channel@8 {
88 reg = <ADC5_USB_IN_V_16>;
89 qcom,pre-scaling = <1 16>;
90 label = "usb_in_v_div_16";
91 };
92
93 channel@9 {
94 reg = <ADC5_CHG_TEMP>;
95 qcom,pre-scaling = <1 1>;
96 label = "chg_temp";
97 };
98
99 channel@4b {
100 reg = <ADC5_BAT_ID_100K_PU>;
101 qcom,hw-settle-time = <200>;
102 qcom,pre-scaling = <1 1>;
103 qcom,ratiometric;
104 label = "bat_id";
105 };
106
107 channel@83 {
108 reg = <ADC5_VPH_PWR>;
109 qcom,pre-scaling = <1 3>;
110 label = "vph_pwr";
111 };
112
113 channel@84 {
114 reg = <ADC5_VBAT_SNS>;
115 qcom,pre-scaling = <1 3>;
116 label = "vbat_sns";
117 };
118 };
119
120 pmi632_adc_tm: adc-tm@3500 {
121 compatible = "qcom,spmi-adc-tm5";
122 reg = <0x3500>;
123 interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
124 #thermal-sensor-cells = <1>;
125 #address-cells = <1>;
126 #size-cells = <0>;
127 status = "disabled";
128 };
129
130 pmi632_sdam_7: nvram@b600 {
131 compatible = "qcom,spmi-sdam";
132 reg = <0xb600>;
133 #address-cells = <1>;
134 #size-cells = <1>;
135 ranges = <0 0xb600 0x100>;
136 };
137
138 pmi632_gpios: gpio@c000 {
139 compatible = "qcom,pmi632-gpio", "qcom,spmi-gpio";
140 reg = <0xc000>;
141 gpio-controller;
142 gpio-ranges = <&pmi632_gpios 0 0 8>;
143 #gpio-cells = <2>;
144 interrupt-controller;
145 #interrupt-cells = <2>;
146 };
147 };
148
149 pmic@3 {
150 compatible = "qcom,pmi632", "qcom,spmi-pmic";
151 reg = <0x3 SPMI_USID>;
152 #address-cells = <1>;
153 #size-cells = <0>;
154
155 pmi632_lpg: pwm {
156 compatible = "qcom,pmi632-lpg";
157
158 #address-cells = <1>;
159 #size-cells = <0>;
160 #pwm-cells = <2>;
161
162 status = "disabled";
163 };
164 };
165};