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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Benard2e66f3b2014-04-04 19:05:55 +02002/*
3 * Copyright (C) 2014 Eukréa Electromatique
4 * Author: Eric Bénard <eric@eukrea.com>
5 *
6 * Configuration settings for the Embest RIoTboard
7 *
8 * based on mx6*sabre*.h which are :
9 * Copyright (C) 2012 Freescale Semiconductor, Inc.
Eric Benard2e66f3b2014-04-04 19:05:55 +020010 */
11
12#ifndef __RIOTBOARD_CONFIG_H
13#define __RIOTBOARD_CONFIG_H
14
Eric Benard2e66f3b2014-04-04 19:05:55 +020015#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060016#define CONSOLE_DEV "ttymxc1"
Eric Benard2e66f3b2014-04-04 19:05:55 +020017
18#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
19
Eric Benard2e66f3b2014-04-04 19:05:55 +020020/* USB Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020021#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
22#define CONFIG_MXC_USB_FLAGS 0
23
24/* MMC Configs */
Tom Rini376b88a2022-10-28 20:27:13 -040025#define CFG_SYS_FSL_ESDHC_ADDR 0
Eric Benard2e66f3b2014-04-04 19:05:55 +020026
Eric Benard2e66f3b2014-04-04 19:05:55 +020027/* Physical Memory Map */
Eric Benard2e66f3b2014-04-04 19:05:55 +020028#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
29
Tom Rinibb4dd962022-11-16 13:10:37 -050030#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
Tom Rini6a5dccc2022-11-16 13:10:41 -050031#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
32#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Eric Benard2e66f3b2014-04-04 19:05:55 +020033
Peter Robinson4b671502015-05-22 17:30:45 +010034/* Environment organization */
Eric Benard2e66f3b2014-04-04 19:05:55 +020035
36#if defined(CONFIG_ENV_IS_IN_MMC)
37/* RiOTboard */
Iain Patone90c9ab2014-12-14 14:51:46 +000038#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Tom Rini376b88a2022-10-28 20:27:13 -040039#define CFG_SYS_FSL_USDHC_NUM 3
Eric Benard2e66f3b2014-04-04 19:05:55 +020040#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
41/* MarSBoard */
Iain Patone90c9ab2014-12-14 14:51:46 +000042#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Tom Rini376b88a2022-10-28 20:27:13 -040043#define CFG_SYS_FSL_USDHC_NUM 2
Eric Benard2e66f3b2014-04-04 19:05:55 +020044#endif
45
Eric Benard2e66f3b2014-04-04 19:05:55 +020046/* Framebuffer */
Eric Benard2e66f3b2014-04-04 19:05:55 +020047#define CONFIG_IMX_HDMI
48#define CONFIG_IMX_VIDEO_SKIP
49
Peter Robinsonbe6c5f12015-05-22 17:30:52 +010050#include "mx6_common.h"
Iain Paton2e891152014-12-14 14:51:32 +000051
Iain Patone90c9ab2014-12-14 14:51:46 +000052/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
53 * 1M script, 1M pxe and the ramdisk at the end */
54#define MEM_LAYOUT_ENV_SETTINGS \
55 "bootm_size=0x10000000\0" \
56 "kernel_addr_r=0x12000000\0" \
57 "fdt_addr_r=0x13000000\0" \
58 "scriptaddr=0x13100000\0" \
59 "pxefile_addr_r=0x13200000\0" \
60 "ramdisk_addr_r=0x13300000\0"
61
62#define BOOT_TARGET_DEVICES(func) \
63 func(MMC, mmc, 0) \
64 func(MMC, mmc, 1) \
65 func(MMC, mmc, 2) \
66 func(USB, usb, 0) \
67 func(PXE, pxe, na) \
68 func(DHCP, dhcp, na)
69
70#include <config_distro_bootcmd.h>
71
72#define CONSOLE_STDIN_SETTINGS \
73 "stdin=serial\0"
74
75#define CONSOLE_STDOUT_SETTINGS \
76 "stdout=serial\0" \
77 "stderr=serial\0"
78
79#define CONSOLE_ENV_SETTINGS \
80 CONSOLE_STDIN_SETTINGS \
81 CONSOLE_STDOUT_SETTINGS
82
83#define CONFIG_EXTRA_ENV_SETTINGS \
84 CONSOLE_ENV_SETTINGS \
85 MEM_LAYOUT_ENV_SETTINGS \
86 "fdtfile=" CONFIG_FDTFILE "\0" \
Fabio Bertoncd681b22017-07-10 17:04:11 -030087 "finduuid=part uuid mmc 0:1 uuid\0" \
Iain Patone90c9ab2014-12-14 14:51:46 +000088 BOOTENV
89
Eric Benard2e66f3b2014-04-04 19:05:55 +020090#endif /* __RIOTBOARD_CONFIG_H */