blob: 694b4e3d9c55a6792f81ccf1aa4fa127a2c49d5e [file] [log] [blame]
Aaron Williams5e21bb32022-04-07 09:11:41 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018-2022 Marvell International Ltd.
4 */
5
6#include <errno.h>
7#include <log.h>
8#include <time.h>
9#include <linux/delay.h>
10
11#include <mach/cvmx-regs.h>
12#include <mach/cvmx-csr.h>
13#include <mach/cvmx-bootmem.h>
14#include <mach/octeon-model.h>
15#include <mach/cvmx-fuse.h>
16#include <mach/octeon-feature.h>
17#include <mach/cvmx-qlm.h>
18#include <mach/octeon_qlm.h>
19#include <mach/cvmx-pcie.h>
20#include <mach/cvmx-coremask.h>
21#include <mach/cvmx-range.h>
22#include <mach/cvmx-global-resources.h>
23
24#include <mach/cvmx-agl-defs.h>
25#include <mach/cvmx-bgxx-defs.h>
26#include <mach/cvmx-ciu-defs.h>
27#include <mach/cvmx-gmxx-defs.h>
28#include <mach/cvmx-gserx-defs.h>
29#include <mach/cvmx-ilk-defs.h>
30#include <mach/cvmx-ipd-defs.h>
31#include <mach/cvmx-pcsx-defs.h>
32#include <mach/cvmx-pcsxx-defs.h>
33#include <mach/cvmx-pki-defs.h>
34#include <mach/cvmx-pko-defs.h>
35#include <mach/cvmx-xcv-defs.h>
36
37#include <mach/cvmx-hwpko.h>
38#include <mach/cvmx-ilk.h>
39#include <mach/cvmx-ipd.h>
40#include <mach/cvmx-pki.h>
41#include <mach/cvmx-pko3.h>
42#include <mach/cvmx-pko3-queue.h>
43#include <mach/cvmx-pko3-resources.h>
44
45#include <mach/cvmx-helper.h>
46#include <mach/cvmx-helper-board.h>
47#include <mach/cvmx-helper-cfg.h>
48
49#include <mach/cvmx-helper-bgx.h>
50#include <mach/cvmx-helper-cfg.h>
51#include <mach/cvmx-helper-util.h>
52#include <mach/cvmx-helper-pki.h>
53
54union interface_port {
55 struct {
56 int port;
57 int interface;
58 } s;
59 u64 u64;
60};
61
62static int dbg;
63
64static int port_range_init;
65
66int __cvmx_pko_internal_ports_range_init(void)
67{
68 int rv = 0;
69
70 if (port_range_init)
71 return 0;
72 port_range_init = 1;
73 rv = cvmx_create_global_resource_range(CVMX_GR_TAG_PKO_IPORTS,
74 CVMX_HELPER_CFG_MAX_PKO_QUEUES);
75 if (rv != 0)
76 debug("ERROR : Failed to initialize pko internal port range\n");
77 return rv;
78}
79
80int cvmx_pko_internal_ports_alloc(int xiface, int port, u64 count)
81{
82 int ret_val = -1;
83 union interface_port inf_port;
84 struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
85
86 __cvmx_pko_internal_ports_range_init();
87 inf_port.s.interface = xi.interface;
88 inf_port.s.port = port;
89 ret_val = cvmx_allocate_global_resource_range(CVMX_GR_TAG_PKO_IPORTS,
90 inf_port.u64, count, 1);
91 if (dbg)
92 debug("internal port alloc : port=%02d base=%02d count=%02d\n",
93 (int)port, ret_val, (int)count);
94 if (ret_val == -1)
95 return ret_val;
96 cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_port_base = ret_val;
97 cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_num_ports = count;
98 return 0;
99}