blob: a3df37d252dec572456c08e11fa3f004f1bfb9f5 [file] [log] [blame]
developer3f7834c2023-07-19 17:17:54 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2022 MediaTek Inc.
4 * Author: Sam Shih <sam.shih@mediatek.com>
5 */
6
7/dts-v1/;
8#include "mt7988.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10
11/ {
12 model = "mt7988-rfb";
13 compatible = "mediatek,mt7988-rfb", "mediatek,mt7988-sd-rfb";
14
15 chosen {
16 stdout-path = &uart0;
17 };
18
19 memory@40000000 {
20 device_type = "memory";
21 reg = <0 0x40000000 0 0x10000000>;
22 };
23
24 reg_3p3v: regulator-3p3v {
25 compatible = "regulator-fixed";
26 regulator-name = "fixed-3.3V";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 regulator-boot-on;
30 regulator-always-on;
31 };
32};
33
34&uart0 {
35 status = "okay";
36};
37
38&i2c1 {
39 pinctrl-names = "default";
40 pinctrl-0 = <&i2c1_pins>;
41 status = "okay";
42};
43
44&eth {
45 status = "okay";
46 mediatek,gmac-id = <0>;
47 phy-mode = "usxgmii";
48 mediatek,switch = "mt7988";
49
50 fixed-link {
51 speed = <1000>;
52 full-duplex;
53 pause;
54 };
55};
56
57&pinctrl {
58 i2c1_pins: i2c1-pins {
59 mux {
60 function = "i2c";
61 groups = "i2c1_0";
62 };
63 };
64
65 pwm_pins: pwm-pins {
66 mux {
67 function = "pwm";
68 groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
69 "pwm5", "pwm6", "pwm7";
70 };
71 };
72
73 spi0_pins: spi0-pins {
74 mux {
75 function = "spi";
76 groups = "spi0", "spi0_wp_hold";
77 };
78 };
79
80 mmc1_pins_default: mmc1default {
81 mux {
82 function = "flash";
83 groups = "emmc_45";
84 };
85
86 conf-cmd-dat {
87 pins = "SPI2_CSB", "SPI2_MISO", "SPI2_MOSI",
88 "SPI2_CLK", "SPI2_HOLD";
89 input-enable;
90 };
91
92 conf-clk {
93 pins = "SPI2_WP";
94 };
95 };
96};
97
98&pwm {
99 pinctrl-names = "default";
100 pinctrl-0 = <&pwm_pins>;
101 status = "okay";
102};
103
104&spi0 {
105 pinctrl-names = "default";
106 pinctrl-0 = <&spi0_pins>;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 status = "okay";
110 must_tx;
111 enhance_timing;
112 dma_ext;
113 ipm_design;
114 support_quad;
115 tick_dly = <2>;
116 sample_sel = <0>;
117
118 spi_nand@0 {
119 compatible = "spi-nand";
120 reg = <0>;
121 spi-max-frequency = <52000000>;
122 };
123};
124
125&mmc0 {
126 pinctrl-names = "default";
127 pinctrl-0 = <&mmc1_pins_default>;
128 max-frequency = <52000000>;
129 bus-width = <4>;
130 cap-sd-highspeed;
131 vmmc-supply = <&reg_3p3v>;
132 vqmmc-supply = <&reg_3p3v>;
133 status = "okay";
134};