Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-j7200-som-p0.dtsi" |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 9 | #include <dt-bindings/gpio/gpio.h> |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 10 | #include <dt-bindings/net/ti-dp83867.h> |
Aswath Govindraju | 5f3022d | 2021-07-21 21:28:42 +0530 | [diff] [blame] | 11 | #include <dt-bindings/phy/phy.h> |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 12 | |
Nishanth Menon | 8a8a2c0 | 2023-09-11 09:43:59 -0500 | [diff] [blame] | 13 | #include "k3-serdes.h" |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 14 | |
| 15 | / { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 16 | compatible = "ti,j7200-evm", "ti,j7200"; |
| 17 | model = "Texas Instruments J7200 EVM"; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &wkup_uart0; |
| 21 | serial1 = &mcu_uart0; |
| 22 | serial2 = &main_uart0; |
| 23 | serial3 = &main_uart1; |
| 24 | serial5 = &main_uart3; |
| 25 | mmc0 = &main_sdhci0; |
| 26 | mmc1 = &main_sdhci1; |
| 27 | }; |
| 28 | |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 29 | chosen { |
| 30 | stdout-path = "serial2:115200n8"; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 31 | }; |
Suman Anna | e683316 | 2020-08-17 18:15:10 -0500 | [diff] [blame] | 32 | |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 33 | evm_12v0: fixedregulator-evm12v0 { |
| 34 | /* main supply */ |
| 35 | compatible = "regulator-fixed"; |
| 36 | regulator-name = "evm_12v0"; |
| 37 | regulator-min-microvolt = <12000000>; |
| 38 | regulator-max-microvolt = <12000000>; |
| 39 | regulator-always-on; |
| 40 | regulator-boot-on; |
| 41 | }; |
| 42 | |
| 43 | vsys_3v3: fixedregulator-vsys3v3 { |
| 44 | /* Output of LM5140 */ |
| 45 | compatible = "regulator-fixed"; |
| 46 | regulator-name = "vsys_3v3"; |
| 47 | regulator-min-microvolt = <3300000>; |
| 48 | regulator-max-microvolt = <3300000>; |
| 49 | vin-supply = <&evm_12v0>; |
| 50 | regulator-always-on; |
| 51 | regulator-boot-on; |
| 52 | }; |
| 53 | |
| 54 | vsys_5v0: fixedregulator-vsys5v0 { |
| 55 | /* Output of LM5140 */ |
| 56 | compatible = "regulator-fixed"; |
| 57 | regulator-name = "vsys_5v0"; |
| 58 | regulator-min-microvolt = <5000000>; |
| 59 | regulator-max-microvolt = <5000000>; |
| 60 | vin-supply = <&evm_12v0>; |
| 61 | regulator-always-on; |
| 62 | regulator-boot-on; |
Suman Anna | e683316 | 2020-08-17 18:15:10 -0500 | [diff] [blame] | 63 | }; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 64 | |
| 65 | vdd_mmc1: fixedregulator-sd { |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 66 | /* Output of TPS22918 */ |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 67 | compatible = "regulator-fixed"; |
| 68 | regulator-name = "vdd_mmc1"; |
| 69 | regulator-min-microvolt = <3300000>; |
| 70 | regulator-max-microvolt = <3300000>; |
| 71 | regulator-boot-on; |
| 72 | enable-active-high; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 73 | vin-supply = <&vsys_3v3>; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 74 | gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; |
| 75 | }; |
| 76 | |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 77 | vdd_sd_dv: gpio-regulator-TLV71033 { |
| 78 | /* Output of TLV71033 */ |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 79 | compatible = "regulator-gpio"; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 80 | regulator-name = "tlv71033"; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 81 | pinctrl-names = "default"; |
| 82 | pinctrl-0 = <&vdd_sd_dv_pins_default>; |
| 83 | regulator-min-microvolt = <1800000>; |
| 84 | regulator-max-microvolt = <3300000>; |
| 85 | regulator-boot-on; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 86 | vin-supply = <&vsys_5v0>; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 87 | gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 88 | states = <1800000 0x0>, |
| 89 | <3300000 0x1>; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 90 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | &wkup_pmx0 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 94 | mcu_uart0_pins_default: mcu-uart0-default-pins { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 95 | pinctrl-single,pins = < |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 96 | J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */ |
| 97 | J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */ |
| 98 | J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */ |
| 99 | J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */ |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 100 | >; |
| 101 | }; |
| 102 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 103 | wkup_uart0_pins_default: wkup-uart0-default-pins { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 104 | pinctrl-single,pins = < |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 105 | J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ |
| 106 | J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 107 | >; |
| 108 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 109 | }; |
| 110 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 111 | &wkup_pmx2 { |
| 112 | mcu_cpsw_pins_default: mcu-cpsw-default-pins { |
| 113 | pinctrl-single,pins = < |
| 114 | J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ |
| 115 | J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ |
| 116 | J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ |
| 117 | J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ |
| 118 | J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ |
| 119 | J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ |
| 120 | J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ |
| 121 | J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ |
| 122 | J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ |
| 123 | J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ |
| 124 | J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */ |
| 125 | J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ |
| 126 | >; |
| 127 | }; |
| 128 | |
| 129 | wkup_gpio_pins_default: wkup-gpio-default-pins { |
| 130 | pinctrl-single,pins = < |
| 131 | J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */ |
| 132 | >; |
| 133 | }; |
| 134 | |
| 135 | mcu_mdio_pins_default: mcu-mdio1-default-pins { |
| 136 | pinctrl-single,pins = < |
| 137 | J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ |
| 138 | J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ |
| 139 | >; |
| 140 | }; |
| 141 | }; |
| 142 | |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 143 | &main_pmx0 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 144 | main_uart0_pins_default: main-uart0-default-pins { |
| 145 | pinctrl-single,pins = < |
| 146 | J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */ |
| 147 | J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ |
| 148 | J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */ |
| 149 | J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */ |
| 150 | >; |
| 151 | }; |
| 152 | |
| 153 | main_uart1_pins_default: main-uart1-default-pins { |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 154 | pinctrl-single,pins = < |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 155 | J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */ |
| 156 | J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */ |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 157 | >; |
| 158 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 159 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 160 | main_uart3_pins_default: main-uart3-default-pins { |
| 161 | pinctrl-single,pins = < |
| 162 | J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */ |
| 163 | J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */ |
| 164 | >; |
| 165 | }; |
| 166 | |
| 167 | main_i2c1_pins_default: main-i2c1-default-pins { |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 168 | pinctrl-single,pins = < |
| 169 | J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */ |
| 170 | J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */ |
| 171 | >; |
| 172 | }; |
| 173 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 174 | main_mmc1_pins_default: main-mmc1-default-pins { |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 175 | pinctrl-single,pins = < |
| 176 | J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ |
| 177 | J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ |
| 178 | J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ |
| 179 | J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */ |
| 180 | J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */ |
| 181 | J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ |
| 182 | J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ |
| 183 | J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ |
| 184 | >; |
| 185 | }; |
| 186 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 187 | vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 188 | pinctrl-single,pins = < |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 189 | J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 190 | >; |
| 191 | }; |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 192 | }; |
Faiz Abbas | 131c332 | 2021-02-04 15:11:00 +0530 | [diff] [blame] | 193 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 194 | &main_pmx1 { |
| 195 | main_usbss0_pins_default: main-usbss0-default-pins { |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 196 | pinctrl-single,pins = < |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 197 | J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 198 | >; |
| 199 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 200 | }; |
| 201 | |
| 202 | &wkup_uart0 { |
| 203 | /* Wakeup UART is used by System firmware */ |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 204 | status = "reserved"; |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 205 | pinctrl-names = "default"; |
| 206 | pinctrl-0 = <&wkup_uart0_pins_default>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 207 | }; |
| 208 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 209 | &mcu_uart0 { |
| 210 | status = "okay"; |
| 211 | pinctrl-names = "default"; |
| 212 | pinctrl-0 = <&mcu_uart0_pins_default>; |
| 213 | clock-frequency = <96000000>; |
| 214 | }; |
| 215 | |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 216 | &main_uart0 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 217 | status = "okay"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 218 | /* Shared with ATF on this platform */ |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 219 | power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 220 | pinctrl-names = "default"; |
| 221 | pinctrl-0 = <&main_uart0_pins_default>; |
| 222 | }; |
| 223 | |
| 224 | &main_uart1 { |
| 225 | status = "okay"; |
| 226 | /* Default pinmux */ |
| 227 | pinctrl-names = "default"; |
| 228 | pinctrl-0 = <&main_uart1_pins_default>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 229 | }; |
| 230 | |
| 231 | &main_uart2 { |
| 232 | /* MAIN UART 2 is used by R5F firmware */ |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 233 | status = "reserved"; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 234 | }; |
| 235 | |
| 236 | &main_uart3 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 237 | /* Shared with MCAN Interface */ |
| 238 | status = "okay"; |
| 239 | pinctrl-names = "default"; |
| 240 | pinctrl-0 = <&main_uart3_pins_default>; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 241 | }; |
| 242 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 243 | &main_gpio0 { |
| 244 | status = "okay"; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 245 | }; |
| 246 | |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 247 | &wkup_gpio0 { |
| 248 | status = "okay"; |
| 249 | pinctrl-names = "default"; |
| 250 | pinctrl-0 = <&wkup_gpio_pins_default>; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 251 | }; |
| 252 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 253 | &mcu_cpsw { |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 254 | pinctrl-names = "default"; |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 255 | pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 256 | }; |
| 257 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 258 | &davinci_mdio { |
| 259 | phy0: ethernet-phy@0 { |
| 260 | reg = <0>; |
| 261 | ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
| 262 | ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| 263 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 264 | }; |
| 265 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 266 | &cpsw_port1 { |
| 267 | phy-mode = "rgmii-rxid"; |
| 268 | phy-handle = <&phy0>; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 269 | }; |
| 270 | |
| 271 | &main_i2c0 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 272 | status = "okay"; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 273 | pinctrl-names = "default"; |
| 274 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 275 | clock-frequency = <400000>; |
| 276 | |
| 277 | exp1: gpio@20 { |
| 278 | compatible = "ti,tca6416"; |
| 279 | reg = <0x20>; |
| 280 | gpio-controller; |
| 281 | #gpio-cells = <2>; |
| 282 | }; |
| 283 | |
| 284 | exp2: gpio@22 { |
| 285 | compatible = "ti,tca6424"; |
| 286 | reg = <0x22>; |
| 287 | gpio-controller; |
| 288 | #gpio-cells = <2>; |
| 289 | }; |
| 290 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 291 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 292 | /* |
| 293 | * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be |
| 294 | * swapped on the CPB. |
| 295 | * |
| 296 | * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3. |
| 297 | * The i2c1 of the CPB (as it is labeled) is not connected to j7200. |
| 298 | */ |
| 299 | &main_i2c1 { |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 300 | status = "okay"; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 301 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 302 | pinctrl-0 = <&main_i2c1_pins_default>; |
| 303 | clock-frequency = <400000>; |
| 304 | |
| 305 | exp3: gpio@20 { |
| 306 | compatible = "ti,tca6408"; |
| 307 | reg = <0x20>; |
| 308 | gpio-controller; |
| 309 | #gpio-cells = <2>; |
| 310 | gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn", |
| 311 | "UB926_LOCK", "UB926_PWR_SW_CNTRL", |
| 312 | "UB926_TUNER_RESET", "UB926_GPIO_SPARE", ""; |
| 313 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 314 | }; |
| 315 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 316 | &main_sdhci0 { |
| 317 | /* eMMC */ |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 318 | status = "okay"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 319 | non-removable; |
| 320 | ti,driver-strength-ohm = <50>; |
| 321 | disable-wp; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 322 | }; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 323 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 324 | &main_sdhci1 { |
| 325 | /* SD card */ |
Reid Tonking | 7a2826a | 2023-10-05 13:12:58 -0500 | [diff] [blame] | 326 | status = "okay"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 327 | pinctrl-0 = <&main_mmc1_pins_default>; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 328 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 329 | vmmc-supply = <&vdd_mmc1>; |
| 330 | vqmmc-supply = <&vdd_sd_dv>; |
| 331 | ti,driver-strength-ohm = <50>; |
| 332 | disable-wp; |
Vignesh Raghavendra | 2fae722 | 2020-08-07 00:26:58 +0530 | [diff] [blame] | 333 | }; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 334 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 335 | &serdes_ln_ctrl { |
| 336 | idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>, |
| 337 | <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>; |
| 338 | }; |
| 339 | |
| 340 | &usb_serdes_mux { |
| 341 | idle-states = <1>; /* USB0 to SERDES lane 3 */ |
| 342 | }; |
| 343 | |
| 344 | &usbss0 { |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 345 | pinctrl-names = "default"; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 346 | pinctrl-0 = <&main_usbss0_pins_default>; |
| 347 | ti,vbus-divider; |
| 348 | ti,usb2-only; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 349 | }; |
| 350 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 351 | &usb0 { |
| 352 | dr_mode = "otg"; |
| 353 | maximum-speed = "high-speed"; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 354 | }; |
| 355 | |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 356 | &tscadc0 { |
| 357 | adc { |
| 358 | ti,adc-channels = <0 1 2 3 4 5 6 7>; |
| 359 | }; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 360 | }; |
Aswath Govindraju | 5f3022d | 2021-07-21 21:28:42 +0530 | [diff] [blame] | 361 | |
| 362 | &serdes_refclk { |
| 363 | clock-frequency = <100000000>; |
| 364 | }; |
| 365 | |
| 366 | &serdes0 { |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 367 | serdes0_pcie_link: phy@0 { |
Aswath Govindraju | 5f3022d | 2021-07-21 21:28:42 +0530 | [diff] [blame] | 368 | reg = <0>; |
| 369 | cdns,num-lanes = <2>; |
| 370 | #phy-cells = <0>; |
| 371 | cdns,phy-type = <PHY_TYPE_PCIE>; |
| 372 | resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; |
| 373 | }; |
| 374 | |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 375 | serdes0_qsgmii_link: phy@1 { |
Aswath Govindraju | 5f3022d | 2021-07-21 21:28:42 +0530 | [diff] [blame] | 376 | reg = <2>; |
| 377 | cdns,num-lanes = <1>; |
| 378 | #phy-cells = <0>; |
| 379 | cdns,phy-type = <PHY_TYPE_QSGMII>; |
| 380 | resets = <&serdes_wiz0 3>; |
| 381 | }; |
| 382 | }; |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 383 | |
| 384 | &pcie1_rc { |
| 385 | reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; |
| 386 | phys = <&serdes0_pcie_link>; |
| 387 | phy-names = "pcie-phy"; |
| 388 | num-lanes = <2>; |
| 389 | }; |
| 390 | |
| 391 | &pcie1_ep { |
| 392 | phys = <&serdes0_pcie_link>; |
| 393 | phy-names = "pcie-phy"; |
| 394 | num-lanes = <2>; |
| 395 | status = "disabled"; |
| 396 | }; |