blob: 1b9dc51978b555256532f22e1cfd317bacee5b37 [file] [log] [blame]
Peng Fana181afe2019-09-16 03:09:55 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 */
5
Marek Vasutf87338f2022-02-19 17:13:54 +01006#include <asm/io.h>
Peng Fan6660af82025-01-09 11:29:07 +08007#include <env.h>
8#include <init.h>
Peng Fana181afe2019-09-16 03:09:55 +00009
Marek Vasutf87338f2022-02-19 17:13:54 +010010int board_mmc_get_env_dev(int devno)
Peng Fana181afe2019-09-16 03:09:55 +000011{
Marek Vasutf87338f2022-02-19 17:13:54 +010012 return devno;
13}
14
15static void setup_fec(void)
16{
17 struct iomuxc_gpr_base_regs *gpr =
18 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
19
20 /* Use 125M anatop REF_CLK1 for ENET1, not from external */
21 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
22}
23
Marek Vasutf87338f2022-02-19 17:13:54 +010024int board_init(void)
Peng Fan42219a72020-01-06 16:16:32 +080025{
Marek Vasutf87338f2022-02-19 17:13:54 +010026 setup_fec();
27
28 return 0;
Peng Fan42219a72020-01-06 16:16:32 +080029}
30
Peng Fana181afe2019-09-16 03:09:55 +000031int board_late_init(void)
32{
33#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
34 env_set("board_name", "DDR4 EVK");
35 env_set("board_rev", "iMX8MN");
36#endif
37 return 0;
38}