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git01.mediatek.com / filogic / uboot / 6de36a7fbe145833be03be44f5c70c3f39c66007 / . / configs / am65x_hs_evm_r5_defconfig
blob: 39ce5276f4e5991cfe55bdd997423c8ae6215147 [file] [log] [blame]
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_TI_SECURE_DEVICE=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x2000000
5CONFIG_SYS_MALLOC_F_LEN=0x55000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=2
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]10CONFIG_SOC_K3_AM6=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]11CONFIG_K3_EARLY_CONS=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]12CONFIG_TARGET_AM654_R5_EVM=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]13CONFIG_ENV_SIZE=0x20000
14CONFIG_DM_GPIO=y
Tom Rini6c75e632020-06-16 19:06:29 -0400[diff] [blame]15CONFIG_SPL_DM_SPI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]17CONFIG_SPL_TEXT_BASE=0x41c00000
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]18CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]19CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]20CONFIG_SPL_DRIVERS_MISC=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]21CONFIG_SPL_STACK_R_ADDR=0x82000000
22CONFIG_SPL_FS_FAT=y
23CONFIG_SPL_LIBDISK_SUPPORT=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]24CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]25CONFIG_SPL_SPI=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]26CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
27CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]28# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
29CONFIG_SPL_LOAD_FIT=y
Simon Glass5d144112020-07-19 13:56:10 -0600[diff] [blame]30# CONFIG_USE_SPL_FIT_GENERATOR is not set
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]31CONFIG_USE_BOOTCOMMAND=y
32# CONFIG_DISPLAY_CPUINFO is not set
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]33CONFIG_SPL_MAX_SIZE=0x58000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]34CONFIG_SPL_BSS_MAX_SIZE=0xc00
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]35CONFIG_SPL_STACK_R=y
36CONFIG_SPL_SEPARATE_BSS=y
Andreas Dannenberg355f0632019-06-04 17:55:52 -0500[diff] [blame]37CONFIG_SPL_EARLY_BSS=y
Andreas Dannenberg598a7e12019-06-04 17:55:54 -0500[diff] [blame]38CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
39CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]40CONFIG_SPL_DMA=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]41CONFIG_SPL_I2C=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]42CONFIG_SPL_DM_MAILBOX=y
Lukasz Majewski76f442982020-06-04 23:11:53 +0800[diff] [blame]43CONFIG_SPL_DM_SPI_FLASH=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]44CONFIG_SPL_DM_RESET=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]45CONFIG_SPL_POWER_DOMAIN=y
46CONFIG_SPL_RAM_SUPPORT=y
47CONFIG_SPL_RAM_DEVICE=y
48CONFIG_SPL_REMOTEPROC=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]49# CONFIG_SPL_SPI_FLASH_TINY is not set
50CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
51CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]52CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]53CONFIG_SPL_YMODEM_SUPPORT=y
54CONFIG_HUSH_PARSER=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]55CONFIG_SYS_MAXARGS=64
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]56CONFIG_CMD_BOOTZ=y
57CONFIG_CMD_ASKENV=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]58CONFIG_CMD_GPT=y
Andreas Dannenberg46051df2019-06-04 18:08:17 -0500[diff] [blame]59CONFIG_CMD_I2C=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]60CONFIG_CMD_MMC=y
61CONFIG_CMD_REMOTEPROC=y
62# CONFIG_CMD_SETEXPR is not set
63CONFIG_CMD_TIME=y
64CONFIG_CMD_FAT=y
65CONFIG_OF_CONTROL=y
66CONFIG_SPL_OF_CONTROL=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]67CONFIG_SPL_MULTI_DTB_FIT=y
68CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]69CONFIG_ENV_OVERWRITE=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]70CONFIG_ENV_IS_IN_FAT=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]71CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]72CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]73CONFIG_DM=y
74CONFIG_SPL_DM=y
75CONFIG_SPL_DM_SEQ_ALIAS=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]76CONFIG_REGMAP=y
77CONFIG_SPL_REGMAP=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]78CONFIG_SPL_OF_TRANSLATE=y
79CONFIG_CLK=y
80CONFIG_SPL_CLK=y
81CONFIG_CLK_TI_SCI=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]82CONFIG_DMA_CHANNELS=y
83CONFIG_TI_K3_NAVSS_UDMA=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]84CONFIG_TI_SCI_PROTOCOL=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]85CONFIG_DA8XX_GPIO=y
Andreas Dannenberg46051df2019-06-04 18:08:17 -0500[diff] [blame]86CONFIG_DM_I2C=y
87CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
88CONFIG_SYS_I2C_OMAP24XX=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]89CONFIG_DM_MAILBOX=y
90CONFIG_K3_SEC_PROXY=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]91CONFIG_K3_AVS0=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]92CONFIG_MMC_SDHCI=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]93CONFIG_SPL_MMC_SDHCI_ADMA=y
94CONFIG_MMC_SDHCI_AM654=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]95CONFIG_DM_SPI_FLASH=y
96CONFIG_SPI_FLASH_SFDP_SUPPORT=y
97CONFIG_SPI_FLASH_STMICRO=y
98# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]99CONFIG_PINCTRL=y
100# CONFIG_PINCTRL_GENERIC is not set
101CONFIG_SPL_PINCTRL=y
102# CONFIG_SPL_PINCTRL_GENERIC is not set
103CONFIG_PINCTRL_SINGLE=y
104CONFIG_POWER_DOMAIN=y
105CONFIG_TI_SCI_POWER_DOMAIN=y
106CONFIG_DM_REGULATOR=y
107CONFIG_SPL_DM_REGULATOR=y
108CONFIG_DM_REGULATOR_GPIO=y
109CONFIG_SPL_DM_REGULATOR_GPIO=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]110CONFIG_DM_REGULATOR_TPS62360=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]111CONFIG_RAM=y
112CONFIG_SPL_RAM=y
113CONFIG_K3_SYSTEM_CONTROLLER=y
Lokesh Vutla247418b2019-06-07 19:25:59 +0530[diff] [blame]114CONFIG_REMOTEPROC_TI_K3_ARM64=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]115CONFIG_DM_RESET=y
116CONFIG_RESET_TI_SCI=y
117CONFIG_DM_SERIAL=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]118CONFIG_SOC_DEVICE=y
119CONFIG_SOC_DEVICE_TI_K3=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]120CONFIG_SOC_TI=y
121CONFIG_SPI=y
122CONFIG_DM_SPI=y
123CONFIG_CADENCE_QSPI=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]124CONFIG_SYSRESET=y
Kever Yang525ea472019-04-02 20:41:25 +0800[diff] [blame]125CONFIG_SPL_SYSRESET=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]126CONFIG_SYSRESET_TI_SCI=y
127CONFIG_TIMER=y
128CONFIG_SPL_TIMER=y
129CONFIG_OMAP_TIMER=y
Andreas Dannenberg355f0632019-06-04 17:55:52 -0500[diff] [blame]130CONFIG_FS_FAT_MAX_CLUSTSIZE=16384