Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000-2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 6 | */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/processor.h> |
Stefan Roese | a5d182e | 2007-08-14 14:44:41 +0200 | [diff] [blame] | 10 | #include <asm/io.h> |
| 11 | |
| 12 | long int spd_sdram(void); |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 13 | |
| 14 | int board_early_init_f(void) |
| 15 | { |
Stefan Roese | 707fd36 | 2009-09-24 09:55:50 +0200 | [diff] [blame] | 16 | mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
| 17 | mtdcr(UIC0ER, 0x00000000); /* disable all ints */ |
| 18 | mtdcr(UIC0CR, 0x00000010); |
| 19 | mtdcr(UIC0PR, 0xFFFF7FF0); /* set int polarities */ |
| 20 | mtdcr(UIC0TR, 0x00000010); /* set int trigger levels */ |
| 21 | mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 22 | |
Stefan Roese | a5d182e | 2007-08-14 14:44:41 +0200 | [diff] [blame] | 23 | /* |
| 24 | * Configure CPC0_PCI to enable PerWE as output |
| 25 | * and enable the internal PCI arbiter if selected |
| 26 | */ |
| 27 | if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB) |
Stefan Roese | 918010a | 2009-09-09 16:25:29 +0200 | [diff] [blame] | 28 | mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN); |
Stefan Roese | a5d182e | 2007-08-14 14:44:41 +0200 | [diff] [blame] | 29 | else |
Stefan Roese | 918010a | 2009-09-09 16:25:29 +0200 | [diff] [blame] | 30 | mtdcr(CPC0_PCI, CPC0_PCI_HOST_CFG_EN); |
Stefan Roese | a5d182e | 2007-08-14 14:44:41 +0200 | [diff] [blame] | 31 | |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 32 | return 0; |
| 33 | } |
| 34 | |
| 35 | /* |
| 36 | * Check Board Identity: |
| 37 | */ |
| 38 | int checkboard(void) |
| 39 | { |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 40 | char buf[64]; |
| 41 | int i = getenv_f("serial#", buf, sizeof(buf)); |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 42 | |
| 43 | puts("Board: Bubinga - AMCC PPC405EP Evaluation Board"); |
| 44 | |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 45 | if (i > 0) { |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 46 | puts(", serial# "); |
Wolfgang Denk | 5c1cfee | 2011-05-04 10:32:28 +0000 | [diff] [blame] | 47 | puts(buf); |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 48 | } |
| 49 | putc('\n'); |
| 50 | |
| 51 | return (0); |
| 52 | } |
| 53 | |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 54 | /* ------------------------------------------------------------------------- |
| 55 | initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of |
| 56 | the necessary info for SDRAM controller configuration |
| 57 | ------------------------------------------------------------------------- */ |
Becky Bruce | bd99ae7 | 2008-06-09 16:03:40 -0500 | [diff] [blame] | 58 | phys_size_t initdram(int board_type) |
Stefan Roese | 3e1f1b3 | 2005-08-01 16:49:12 +0200 | [diff] [blame] | 59 | { |
| 60 | long int ret; |
| 61 | |
| 62 | ret = spd_sdram(); |
| 63 | return ret; |
| 64 | } |