Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Texas Instruments, <www.ti.com> |
| 4 | * |
| 5 | * Aneesh V <aneesh@ti.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | #ifndef _OMAP_COMMON_H_ |
| 26 | #define _OMAP_COMMON_H_ |
| 27 | |
Aneesh V | 0d2628b | 2011-07-21 09:10:07 -0400 | [diff] [blame] | 28 | /* Max value for DPLL multiplier M */ |
| 29 | #define OMAP_DPLL_MAX_N 127 |
| 30 | |
Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 31 | /* HW Init Context */ |
| 32 | #define OMAP_INIT_CONTEXT_SPL 0 |
| 33 | #define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1 |
| 34 | #define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL 2 |
| 35 | #define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH 3 |
| 36 | |
Aneesh V | b8e60b9 | 2011-07-21 09:10:21 -0400 | [diff] [blame] | 37 | void preloader_console_init(void); |
| 38 | |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 39 | /* Boot device */ |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 40 | #ifdef CONFIG_OMAP54XX |
| 41 | #define BOOT_DEVICE_NONE 0 |
| 42 | #define BOOT_DEVICE_XIP 1 |
| 43 | #define BOOT_DEVICE_XIPWAIT 2 |
| 44 | #define BOOT_DEVICE_NAND 3 |
| 45 | #define BOOT_DEVICE_ONE_NAND 4 |
| 46 | #define BOOT_DEVICE_MMC1 5 |
| 47 | #define BOOT_DEVICE_MMC2 6 |
| 48 | #define BOOT_DEVICE_MMC3 7 |
| 49 | #elif defined(CONFIG_OMAP44XX) /* OMAP4 */ |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 50 | #define BOOT_DEVICE_NONE 0 |
| 51 | #define BOOT_DEVICE_XIP 1 |
| 52 | #define BOOT_DEVICE_XIPWAIT 2 |
| 53 | #define BOOT_DEVICE_NAND 3 |
| 54 | #define BOOT_DEVICE_ONE_NAND 4 |
| 55 | #define BOOT_DEVICE_MMC1 5 |
| 56 | #define BOOT_DEVICE_MMC2 6 |
Sandeep Paulraj | 5f70166 | 2011-09-16 12:35:00 -0400 | [diff] [blame] | 57 | #elif defined(CONFIG_OMAP34XX) /* OMAP3 */ |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame] | 58 | #define BOOT_DEVICE_NONE 0 |
| 59 | #define BOOT_DEVICE_XIP 1 |
| 60 | #define BOOT_DEVICE_NAND 2 |
| 61 | #define BOOT_DEVICE_ONE_NAND 3 |
| 62 | #define BOOT_DEVICE_MMC2 5 /*emmc*/ |
| 63 | #define BOOT_DEVICE_MMC1 6 |
| 64 | #define BOOT_DEVICE_XIPWAIT 7 |
Chandan Nath | 77a73fe | 2012-01-09 20:38:59 +0000 | [diff] [blame] | 65 | #elif defined(CONFIG_AM33XX) /* AM33XX */ |
| 66 | #define BOOT_DEVICE_NAND 5 |
| 67 | #define BOOT_DEVICE_MMC1 8 |
| 68 | #define BOOT_DEVICE_MMC2 0 |
| 69 | #define BOOT_DEVICE_UART 65 |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame] | 70 | #endif |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 71 | |
| 72 | /* Boot type */ |
| 73 | #define MMCSD_MODE_UNDEFINED 0 |
| 74 | #define MMCSD_MODE_RAW 1 |
| 75 | #define MMCSD_MODE_FAT 2 |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame] | 76 | #define NAND_MODE_HW_ECC 3 |
| 77 | |
| 78 | struct spl_image_info { |
| 79 | const char *name; |
| 80 | u8 os; |
| 81 | u32 load_addr; |
| 82 | u32 entry_point; |
| 83 | u32 size; |
| 84 | }; |
| 85 | |
| 86 | extern struct spl_image_info spl_image; |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 87 | |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 88 | extern u32* boot_params_ptr; |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 89 | u32 omap_boot_device(void); |
| 90 | u32 omap_boot_mode(void); |
| 91 | |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame] | 92 | /* SPL common function s*/ |
| 93 | void spl_parse_image_header(const struct image_header *header); |
Andreas Müller | 0cda7a4 | 2012-01-04 15:26:24 +0000 | [diff] [blame] | 94 | void omap_rev_string(void); |
Simon Schwarz | 992dcf7 | 2011-09-14 15:29:26 -0400 | [diff] [blame] | 95 | |
| 96 | /* NAND SPL functions */ |
| 97 | void spl_nand_load_image(void); |
| 98 | |
| 99 | /* MMC SPL functions */ |
| 100 | void spl_mmc_load_image(void); |
| 101 | |
Tom Rini | ead66c1 | 2011-11-23 05:13:06 +0000 | [diff] [blame] | 102 | #ifdef CONFIG_SPL_BOARD_INIT |
| 103 | void spl_board_init(void); |
| 104 | #endif |
| 105 | |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 106 | /* |
| 107 | * silicon revisions. |
| 108 | * Moving this to common, so that most of code can be moved to common, |
| 109 | * directories. |
| 110 | */ |
| 111 | |
| 112 | /* omap4 */ |
| 113 | #define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF |
| 114 | #define OMAP4430_ES1_0 0x44300100 |
| 115 | #define OMAP4430_ES2_0 0x44300200 |
| 116 | #define OMAP4430_ES2_1 0x44300210 |
| 117 | #define OMAP4430_ES2_2 0x44300220 |
| 118 | #define OMAP4430_ES2_3 0x44300230 |
| 119 | #define OMAP4460_ES1_0 0x44600100 |
Aneesh V | a04c304 | 2011-11-21 23:39:03 +0000 | [diff] [blame] | 120 | #define OMAP4460_ES1_1 0x44600110 |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 121 | |
| 122 | /* omap5 */ |
| 123 | #define OMAP5430_SILICON_ID_INVALID 0 |
| 124 | #define OMAP5430_ES1_0 0x54300100 |
Aneesh V | 3067942 | 2011-07-21 09:09:59 -0400 | [diff] [blame] | 125 | #endif /* _OMAP_COMMON_H_ */ |