blob: 23368de624e13e9dd3a2dc0217d2266e2912f1fe [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
Pali Rohár10a953d2020-04-01 00:35:08 +02004 * Pali Rohár <pali@kernel.org>
Pali Rohár248ef0a2012-10-29 07:54:01 +00005 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
25
26#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
27
Pali Rohár248ef0a2012-10-29 07:54:01 +000028#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050029#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000030#include <asm/arch/mem.h>
31#include <linux/stringify.h>
32
Pali Rohár248ef0a2012-10-29 07:54:01 +000033/* Clock Defines */
34#define V_OSCK 26000000 /* Clock output from T2 */
35#define V_SCLK (V_OSCK >> 1)
36
Pali Rohár248ef0a2012-10-29 07:54:01 +000037#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
38
39#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
40#define CONFIG_INITRD_TAG /* enable passing initrd */
41#define CONFIG_REVISION_TAG /* enable passing revision tag*/
42#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
43
44/*
45 * Size of malloc() pool
46 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000047#define CONFIG_UBI_SIZE (512 << 10)
48#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
49 (128 << 10))
50
51/*
52 * Hardware drivers
53 */
54
55/*
56 * NS16550 Configuration
57 */
58#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
59
Pali Rohár248ef0a2012-10-29 07:54:01 +000060#define CONFIG_SYS_NS16550_SERIAL
61#define CONFIG_SYS_NS16550_REG_SIZE (-4)
62#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
63
64/*
65 * select serial console configuration
66 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000067#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000068
Pali Rohár248ef0a2012-10-29 07:54:01 +000069#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000070
Pali Rohár248ef0a2012-10-29 07:54:01 +000071/* USB device configuration */
72#define CONFIG_USB_DEVICE
Pali Rohárbba0bba2021-02-20 11:50:15 +010073#define CONFIG_USB_TTY
Pali Rohár248ef0a2012-10-29 07:54:01 +000074#define CONFIG_USBD_VENDORID 0x0421
Pali Rohárbba0bba2021-02-20 11:50:15 +010075#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8
76#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8
Pali Rohár248ef0a2012-10-29 07:54:01 +000077#define CONFIG_USBD_MANUFACTURER "Nokia"
Pali Rohárbba0bba2021-02-20 11:50:15 +010078#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)"
Pali Rohár248ef0a2012-10-29 07:54:01 +000079
Pali Rohár248ef0a2012-10-29 07:54:01 +000080#define GPIO_SLIDE 71
81
82/*
83 * Board ONENAND Info.
84 */
85
Pali Rohár248ef0a2012-10-29 07:54:01 +000086#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000087
Pali Rohár248ef0a2012-10-29 07:54:01 +000088/* Watchdog support */
89#define CONFIG_HW_WATCHDOG
90
91/*
92 * Framebuffer
93 */
94/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +000095#define CONFIG_VIDEO_LOGO
96#define VIDEO_FB_16BPP_PIXEL_SWAP
97#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000098
99/* functions for cfb_console */
100#define VIDEO_KBD_INIT_FCT rx51_kp_init()
101#define VIDEO_TSTC_FCT rx51_kp_tstc
102#define VIDEO_GETC_FCT rx51_kp_getc
103#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600104struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000105int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600106int rx51_kp_tstc(struct stdio_dev *sdev);
107int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000108#endif
109
Pali Rohár248ef0a2012-10-29 07:54:01 +0000110/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000111#define CONFIG_EXTRA_ENV_SETTINGS \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000112 "usbtty=cdc_acm\0" \
Pali Rohárbba0bba2021-02-20 11:50:15 +0100113 "stdin=usbtty,serial,vga\0" \
114 "stdout=usbtty,serial,vga\0" \
115 "stderr=usbtty,serial,vga\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000116 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
117 "switchmmc=mmc dev ${mmcnum}\0" \
118 "kernaddr=0x82008000\0" \
119 "initrdaddr=0x84008000\0" \
120 "scriptaddr=0x86008000\0" \
121 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
122 "${loadaddr} ${mmcfile}\0" \
123 "kernload=setenv loadaddr ${kernaddr};" \
124 "setenv mmcfile ${mmckernfile};" \
125 "run fileload\0" \
126 "initrdload=setenv loadaddr ${initrdaddr};" \
127 "setenv mmcfile ${mmcinitrdfile};" \
128 "run fileload\0" \
129 "scriptload=setenv loadaddr ${scriptaddr};" \
130 "setenv mmcfile ${mmcscriptfile};" \
131 "run fileload\0" \
132 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
133 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
134 "kernboot=echo Booting ${mmckernfile} from mmc " \
135 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
136 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
137 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
138 "attachboot=echo Booting attached kernel image ...;" \
139 "setenv setup_omap_atag 1;" \
140 "bootm ${attkernaddr};" \
141 "setenv setup_omap_atag\0" \
142 "trymmcscriptboot=if run switchmmc; then " \
143 "if run scriptload; then " \
144 "run scriptboot;" \
145 "fi;" \
146 "fi\0" \
147 "trymmckernboot=if run switchmmc; then " \
148 "if run kernload; then " \
149 "run kernboot;" \
150 "fi;" \
151 "fi\0" \
152 "trymmckerninitrdboot=if run switchmmc; then " \
153 "if run initrdload; then " \
154 "if run kernload; then " \
155 "run kerninitrdboot;" \
156 "fi;" \
157 "fi; " \
158 "fi\0" \
159 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
160 "setenv mmckernfile uImage; run trymmckernboot\0" \
161 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
162 "setenv mmcpart 2; run trymmcpartboot;" \
163 "setenv mmcpart 3; run trymmcpartboot;" \
164 "setenv mmcpart 4; run trymmcpartboot\0" \
165 "trymmcboot=if run switchmmc; then " \
166 "setenv mmctype fat;" \
167 "run trymmcallpartboot;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000168 "setenv mmctype ext4;" \
169 "run trymmcallpartboot;" \
170 "fi\0" \
171 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
172 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200173 "preboot=setenv mmcnum 1; setenv mmcpart 1;" \
174 "setenv mmcscriptfile bootmenu.scr;" \
175 "if run switchmmc; then " \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200176 "setenv mmctype fat;" \
Pali Rohár61d39fb2020-11-30 20:10:34 +0100177 "if run scriptload; then run scriptboot; else " \
178 "setenv mmctype ext4;" \
179 "if run scriptload; then run scriptboot; fi;" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200180 "fi;" \
181 "fi;" \
182 "if run slide; then true; else " \
183 "setenv bootmenu_delay 0;" \
184 "setenv bootdelay 0;" \
185 "fi\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000186 "menucmd=bootmenu\0" \
187 "bootmenu_0=Attached kernel=run attachboot\0" \
188 "bootmenu_1=Internal eMMC=run emmcboot\0" \
189 "bootmenu_2=External SD card=run sdboot\0" \
190 "bootmenu_3=U-Boot boot order=boot\0" \
191 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000192 ""
193
Pali Rohár13eb3e42013-03-07 05:15:19 +0000194#define CONFIG_POSTBOOTMENU \
195 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000196 "echo Extra commands:;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000197 "echo run sdboot - Boot from SD card slot.;" \
198 "echo run emmcboot - Boot internal eMMC memory.;" \
199 "echo run attachboot - Boot attached kernel image.;" \
200 "echo"
201
202#define CONFIG_BOOTCOMMAND \
203 "run sdboot;" \
204 "run emmcboot;" \
205 "run attachboot;" \
206 "echo"
207
Pali Rohár248ef0a2012-10-29 07:54:01 +0000208/* default load address */
209#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
210
211/*
212 * OMAP3 has 12 GP timers, they can be driven by the system clock
213 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
214 * This rate is divided by a local divisor.
215 */
216#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
217#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000218
219/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000220 * Physical Memory Map
221 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000222#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
223
224/*
225 * FLASH and environment organization
226 */
227
Pali Rohár248ef0a2012-10-29 07:54:01 +0000228#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
229#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
230#define CONFIG_SYS_INIT_RAM_SIZE 0x800
231#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
232 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
233
234/*
235 * Attached kernel image
236 */
237
238#define SDRAM_SIZE 0x10000000 /* 256 MB */
239#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
240
241#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
242#define KERNEL_OFFSET 0x40000 /* 256 kB */
243#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
244#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
245
246/* Reserve protected RAM for attached kernel */
247#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
248
249#endif /* __CONFIG_H */