| Siew Chin Lim | 612ee82 | 2021-03-15 15:59:16 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2020 Intel Corporation. All rights reserved |
| Tien Fong Chee | 43975a1 | 2025-02-18 16:34:59 +0800 | [diff] [blame] | 4 | * Copyright (C) 2025 Altera Corporation <www.altera.com> |
| Siew Chin Lim | 612ee82 | 2021-03-15 15:59:16 +0800 | [diff] [blame] | 5 | * |
| 6 | */ |
| 7 | |
| Tien Fong Chee | 43975a1 | 2025-02-18 16:34:59 +0800 | [diff] [blame] | 8 | #include <hang.h> |
| Siew Chin Lim | 612ee82 | 2021-03-15 15:59:16 +0800 | [diff] [blame] | 9 | #include <spl.h> |
| Tien Fong Chee | 43975a1 | 2025-02-18 16:34:59 +0800 | [diff] [blame] | 10 | #include <dm/uclass.h> |
| Siew Chin Lim | 612ee82 | 2021-03-15 15:59:16 +0800 | [diff] [blame] | 11 | |
| 12 | DECLARE_GLOBAL_DATA_PTR; |
| 13 | |
| 14 | u32 spl_boot_device(void) |
| 15 | { |
| 16 | return BOOT_DEVICE_MMC1; |
| 17 | } |
| 18 | |
| Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 19 | #if IS_ENABLED(CONFIG_SPL_MMC) |
| Siew Chin Lim | 612ee82 | 2021-03-15 15:59:16 +0800 | [diff] [blame] | 20 | u32 spl_boot_mode(const u32 boot_device) |
| 21 | { |
| 22 | if (IS_ENABLED(CONFIG_SPL_FS_FAT) || IS_ENABLED(CONFIG_SPL_FS_EXT4)) |
| 23 | return MMCSD_MODE_FS; |
| 24 | else |
| 25 | return MMCSD_MODE_RAW; |
| 26 | } |
| 27 | #endif |
| Tien Fong Chee | 43975a1 | 2025-02-18 16:34:59 +0800 | [diff] [blame] | 28 | |
| 29 | /* board specific function prior loading SSBL / U-Boot */ |
| 30 | void spl_perform_fixups(struct spl_image_info *spl_image) |
| 31 | { |
| 32 | int ret; |
| 33 | struct udevice *dev; |
| 34 | |
| 35 | ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-smmu-secure-config", &dev); |
| 36 | if (ret) { |
| 37 | printf("HPS SMMU secure settings init failed: %d\n", ret); |
| 38 | hang(); |
| 39 | } |
| 40 | } |