blob: 1bcfe67c947e28c70d5188e5ab251f4b2365689f [file] [log] [blame]
Graeme Russ85cc39f2009-02-24 21:14:32 +11001/*
Graeme Russ45fc1d82011-04-13 19:43:26 +10002 * (C) Copyright 2008-2011
3 * Graeme Russ, <graeme.russ@gmail.com>
4 *
Graeme Russ85cc39f2009-02-24 21:14:32 +11005 * (C) Copyright 2002
Graeme Russ45fc1d82011-04-13 19:43:26 +10006 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
Graeme Russ85cc39f2009-02-24 21:14:32 +11007 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
Graeme Russ85cc39f2009-02-24 21:14:32 +110027#include <common.h>
Graeme Russ0c5ced72010-04-24 00:05:37 +100028#include <asm/io.h>
Graeme Russ85cc39f2009-02-24 21:14:32 +110029#include <asm/interrupt.h>
30#include <asm/ic/sc520.h>
31
Graeme Russ7679d1f2009-02-24 21:14:45 +110032void sc520_timer_isr(void)
Graeme Russ85cc39f2009-02-24 21:14:32 +110033{
Graeme Russ7679d1f2009-02-24 21:14:45 +110034 /* Ack the GP Timer Interrupt */
Graeme Russ0c5ced72010-04-24 00:05:37 +100035 writeb(0x02, &sc520_mmcr->gptmrsta);
Graeme Russ85cc39f2009-02-24 21:14:32 +110036}
37
Graeme Russ7679d1f2009-02-24 21:14:45 +110038int timer_init(void)
Graeme Russ85cc39f2009-02-24 21:14:32 +110039{
Graeme Russcc272eb2009-11-24 20:04:17 +110040 /* Register the SC520 specific timer interrupt handler */
41 register_timer_isr (sc520_timer_isr);
42
43 /* Install interrupt handler for GP Timer 1 */
44 irq_install_handler (0, timer_isr, NULL);
45
Graeme Russ7679d1f2009-02-24 21:14:45 +110046 /* Map GP Timer 1 to Master PIC IR0 */
Graeme Russ0c5ced72010-04-24 00:05:37 +100047 writeb(0x01, &sc520_mmcr->gp_tmr_int_map[1]);
Graeme Russ85cc39f2009-02-24 21:14:32 +110048
Graeme Russ7679d1f2009-02-24 21:14:45 +110049 /* Disable GP Timers 1 & 2 - Allow configuration writes */
Graeme Russ0c5ced72010-04-24 00:05:37 +100050 writew(0x4000, &sc520_mmcr->gptmr1ctl);
51 writew(0x4000, &sc520_mmcr->gptmr2ctl);
Graeme Russ85cc39f2009-02-24 21:14:32 +110052
Graeme Russ7679d1f2009-02-24 21:14:45 +110053 /* Reset GP Timers 1 & 2 */
Graeme Russ0c5ced72010-04-24 00:05:37 +100054 writew(0x0000, &sc520_mmcr->gptmr1cnt);
55 writew(0x0000, &sc520_mmcr->gptmr2cnt);
Graeme Russ7679d1f2009-02-24 21:14:45 +110056
57 /* Setup GP Timer 2 as a 100kHz (10us) prescaler */
Graeme Russ0c5ced72010-04-24 00:05:37 +100058 writew(83, &sc520_mmcr->gptmr2maxcmpa);
59 writew(0xc001, &sc520_mmcr->gptmr2ctl);
Graeme Russ7679d1f2009-02-24 21:14:45 +110060
61 /* Setup GP Timer 1 as a 1000 Hz (1ms) interrupt generator */
Graeme Russ0c5ced72010-04-24 00:05:37 +100062 writew(100, &sc520_mmcr->gptmr1maxcmpa);
63 writew(0xe009, &sc520_mmcr->gptmr1ctl);
Graeme Russ7679d1f2009-02-24 21:14:45 +110064
Graeme Russ7679d1f2009-02-24 21:14:45 +110065 unmask_irq (0);
66
Graeme Russcf2fb0c2009-08-23 12:59:49 +100067 /* Clear the GP Timer 1 status register to get the show rolling*/
Graeme Russ0c5ced72010-04-24 00:05:37 +100068 writeb(0x02, &sc520_mmcr->gptmrsta);
Graeme Russcf2fb0c2009-08-23 12:59:49 +100069
Graeme Russ7679d1f2009-02-24 21:14:45 +110070 return 0;
71}
Graeme Russ85cc39f2009-02-24 21:14:32 +110072
Graeme Russf5f18282010-04-24 00:05:50 +100073/* Allow boards to override udelay implementation */
Ingo van Lilf0f778a2009-11-24 14:09:21 +010074void __udelay(unsigned long usec)
Graeme Russf5f18282010-04-24 00:05:50 +100075 __attribute__((weak, alias("sc520_udelay")));
76
77void sc520_udelay(unsigned long usec)
Graeme Russ85cc39f2009-02-24 21:14:32 +110078{
Graeme Russ7679d1f2009-02-24 21:14:45 +110079 int m = 0;
Graeme Russ85cc39f2009-02-24 21:14:32 +110080 long u;
Graeme Russ1d977dc2009-08-23 12:59:56 +100081 long temp;
Graeme Russ85cc39f2009-02-24 21:14:32 +110082
Graeme Russ0c5ced72010-04-24 00:05:37 +100083 temp = readw(&sc520_mmcr->swtmrmilli);
84 temp = readw(&sc520_mmcr->swtmrmicro);
Graeme Russ85cc39f2009-02-24 21:14:32 +110085
Graeme Russ7679d1f2009-02-24 21:14:45 +110086 do {
Graeme Russ0c5ced72010-04-24 00:05:37 +100087 m += readw(&sc520_mmcr->swtmrmilli);
88 u = readw(&sc520_mmcr->swtmrmicro) + (m * 1000);
Graeme Russ7679d1f2009-02-24 21:14:45 +110089 } while (u < usec);
Graeme Russ85cc39f2009-02-24 21:14:32 +110090}