| Andre Przywara | 97ede93 | 2018-10-29 00:56:50 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" |
| Andre Przywara | 97ede93 | 2018-10-29 00:56:50 +0000 | [diff] [blame] | 4 | CONFIG_SPL=y |
| 5 | CONFIG_MACH_SUN50I=y |
| 6 | CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y |
| 7 | CONFIG_DRAM_CLK=552 |
| 8 | CONFIG_DRAM_ZQ=3881949 |
| 9 | CONFIG_MMC0_CD_PIN="" |
| 10 | CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |
| 11 | CONFIG_SPL_SPI_SUNXI=y |
| Tom Rini | 8461027 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 12 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Tom Rini | 8a14ac4 | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 13 | CONFIG_SPL_STACK=0x54000 |
| Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 14 | CONFIG_SYS_PBSIZE=1024 |
| Tom Rini | f3c2f99 | 2022-06-25 19:29:46 -0400 | [diff] [blame] | 15 | CONFIG_SYS_BOOTM_LEN=0x2000000 |
| Andre Przywara | b51a765 | 2021-07-12 11:06:51 +0100 | [diff] [blame] | 16 | CONFIG_SUPPORT_EMMC_BOOT=y |
| Andre Przywara | 87afc08 | 2022-01-11 12:46:06 +0000 | [diff] [blame] | 17 | CONFIG_SPI_FLASH_WINBOND=y |
| Andre Przywara | 97ede93 | 2018-10-29 00:56:50 +0000 | [diff] [blame] | 18 | CONFIG_SUN8I_EMAC=y |
| Andre Przywara | 06435db | 2022-01-11 12:46:02 +0000 | [diff] [blame] | 19 | CONFIG_SPI=y |
| Andre Przywara | 97ede93 | 2018-10-29 00:56:50 +0000 | [diff] [blame] | 20 | CONFIG_USB_EHCI_HCD=y |
| Andre Przywara | cfb2623 | 2019-03-09 01:03:31 +0000 | [diff] [blame] | 21 | CONFIG_USB_OHCI_HCD=y |