Sekhar Nori | 5ffad63 | 2009-11-12 11:09:25 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2008 Texas Instruments, Inc <www.ti.com> |
| 3 | * |
| 4 | * Based on davinci_dvevm.h. Original Copyrights follow: |
| 5 | * |
| 6 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __CONFIG_H |
| 25 | #define __CONFIG_H |
| 26 | |
| 27 | /* |
| 28 | * Board |
| 29 | */ |
| 30 | |
| 31 | /* |
| 32 | * SoC Configuration |
| 33 | */ |
| 34 | #define CONFIG_MACH_DAVINCI_DA830_EVM |
| 35 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ |
| 36 | #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ |
| 37 | #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) |
| 38 | #define CONFIG_SYS_OSCIN_FREQ 24000000 |
| 39 | #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE |
| 40 | #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) |
| 41 | #define CONFIG_SYS_HZ 1000 |
| 42 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 43 | #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ |
| 44 | |
| 45 | /* |
| 46 | * Memory Info |
| 47 | */ |
| 48 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ |
| 49 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ |
| 50 | #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ |
| 51 | #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ |
| 52 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */ |
| 53 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */ |
| 54 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 55 | #define CONFIG_STACKSIZE (256*1024) /* regular stack */ |
| 56 | |
| 57 | /* |
| 58 | * Serial Driver info |
| 59 | */ |
| 60 | #define CONFIG_SYS_NS16550 |
| 61 | #define CONFIG_SYS_NS16550_SERIAL |
| 62 | #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ |
| 63 | #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ |
| 64 | #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) |
| 65 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
| 66 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
| 67 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 68 | |
| 69 | /* |
| 70 | * I2C Configuration |
| 71 | */ |
| 72 | #define CONFIG_HARD_I2C |
| 73 | #define CONFIG_DRIVER_DAVINCI_I2C |
| 74 | #define CONFIG_SYS_I2C_SPEED 25000 /* 100Kbps won't work, H/W bug */ |
| 75 | #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ |
| 76 | |
| 77 | /* |
| 78 | * I2C EEPROM definitions for catalyst 24W256 EEPROM chip |
| 79 | */ |
| 80 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
| 81 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 82 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 |
| 83 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 |
| 84 | |
| 85 | /* |
| 86 | * Network & Ethernet Configuration |
| 87 | */ |
| 88 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 89 | #define CONFIG_MII |
| 90 | #define CONFIG_BOOTP_DEFAULT |
| 91 | #define CONFIG_BOOTP_DNS |
| 92 | #define CONFIG_BOOTP_DNS2 |
| 93 | #define CONFIG_BOOTP_SEND_HOSTNAME |
| 94 | #define CONFIG_NET_RETRY_COUNT 10 |
| 95 | #define CONFIG_NET_MULTI |
| 96 | #endif |
| 97 | |
| 98 | /* |
| 99 | * Flash & Environment |
| 100 | */ |
| 101 | #ifdef CONFIG_USE_NAND |
| 102 | #undef CONFIG_ENV_IS_IN_FLASH |
| 103 | #define CONFIG_NAND_DAVINCI |
| 104 | #define CONFIG_SYS_NO_FLASH |
| 105 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ |
| 106 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ |
| 107 | #define CONFIG_ENV_SIZE (128 << 10) |
| 108 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST |
| 109 | #define CONFIG_SYS_NAND_CS 3 |
| 110 | #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE |
| 111 | #define CONFIG_SYS_CLE_MASK 0x10 |
| 112 | #define CONFIG_SYS_ALE_MASK 0x8 |
| 113 | #define CONFIG_SYS_NAND_HW_ECC |
| 114 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ |
| 115 | #define NAND_MAX_CHIPS 1 |
| 116 | #define DEF_BOOTM "" |
| 117 | #endif |
| 118 | |
| 119 | #ifdef CONFIG_USE_NOR |
| 120 | #define CONFIG_ENV_IS_IN_FLASH |
| 121 | #undef CONFIG_SYS_NO_FLASH |
| 122 | #define CONFIG_SYS_FLASH_CFI_DRIVER |
| 123 | #define CONFIG_SYS_FLASH_CFI |
| 124 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ |
| 125 | #define CONFIG_SYS_FLASH_SECT_SZ (64 << 10) /* 64KB */ |
| 126 | #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3) |
| 127 | #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE |
| 128 | #define PHYS_FLASH_SIZE (32 << 20) /* Flash size 32MB */ |
| 129 | #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) |
| 130 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ |
| 131 | #define CONFIG_SYS_FLASH_SPL_ACCESS |
| 132 | #endif |
| 133 | |
| 134 | #ifdef CONFIG_USE_SPIFLASH |
| 135 | #undef CONFIG_ENV_IS_IN_FLASH |
| 136 | #undef CONFIG_ENV_IS_IN_NAND |
| 137 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 138 | #define CONFIG_ENV_SIZE (16 << 10) |
| 139 | #define CONFIG_ENV_OFFSET (256 << 10) |
| 140 | #define CONFIG_ENV_SECT_SIZE 4096 |
| 141 | #define CONFIG_SYS_NO_FLASH |
| 142 | #define CONFIG_SPI |
| 143 | #define CONFIG_SPI_FLASH |
| 144 | #define CONFIG_SPI_FLASH_WINBOND |
| 145 | #define CONFIG_DAVINCI_SPI |
| 146 | #define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE |
| 147 | #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) |
| 148 | #define CONFIG_SF_DEFAULT_SPEED 50000000 |
| 149 | #define CONFIG_SYS_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED |
| 150 | #endif |
| 151 | |
| 152 | |
| 153 | /* |
| 154 | * U-Boot general configuration |
| 155 | */ |
| 156 | #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
| 157 | #undef CONFIG_MISC_INIT_R |
| 158 | #undef CONFIG_BOOTDELAY |
| 159 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
| 160 | #define CONFIG_SYS_PROMPT "DA830-evm > " /* Command Prompt */ |
| 161 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 162 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 163 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 164 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ |
| 165 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + 0x700000) |
| 166 | #define CONFIG_VERSION_VARIABLE |
| 167 | #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ |
| 168 | #define CONFIG_SYS_HUSH_PARSER |
| 169 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| 170 | #define CONFIG_CMDLINE_EDITING |
| 171 | #define CONFIG_SYS_LONGHELP |
| 172 | #define CONFIG_CRC32_VERIFY |
| 173 | #define CONFIG_MX_CYCLIC |
| 174 | |
| 175 | /* |
| 176 | * Linux Information |
| 177 | */ |
| 178 | #define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) |
| 179 | #define CONFIG_CMDLINE_TAG |
| 180 | #define CONFIG_SETUP_MEMORY_TAGS |
| 181 | #define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" |
| 182 | #define CONFIG_BOOTCOMMAND "" |
| 183 | #define CONFIG_BOOTDELAY 3 |
| 184 | |
| 185 | /* |
| 186 | * U-Boot commands |
| 187 | */ |
| 188 | #include <config_cmd_default.h> |
| 189 | #define CONFIG_CMD_ENV |
| 190 | #define CONFIG_CMD_ASKENV |
| 191 | #define CONFIG_CMD_DHCP |
| 192 | #define CONFIG_CMD_DIAG |
| 193 | #define CONFIG_CMD_MII |
| 194 | #define CONFIG_CMD_PING |
| 195 | #define CONFIG_CMD_SAVES |
| 196 | #define CONFIG_CMD_MEMORY |
| 197 | #undef CONFIG_CMD_FPGA |
| 198 | #undef CONFIG_CMD_SETGETDCR |
| 199 | #define CONFIG_CMD_EEPROM |
| 200 | |
| 201 | #ifndef CONFIG_DRIVER_TI_EMAC |
| 202 | #undef CONFIG_CMD_NET |
| 203 | #undef CONFIG_CMD_DHCP |
| 204 | #undef CONFIG_CMD_MII |
| 205 | #undef CONFIG_CMD_PING |
| 206 | #endif |
| 207 | |
| 208 | #ifdef CONFIG_USE_NAND |
| 209 | #undef CONFIG_CMD_FLASH |
| 210 | #undef CONFIG_CMD_IMLS |
| 211 | #define CONFIG_CMD_NAND |
| 212 | #define CONFIG_CMD_MTDPARTS |
| 213 | #define CONFIG_MTD_PARTITIONS |
| 214 | #define CONFIG_CMD_UBI |
| 215 | #define CONFIG_RBTREE |
| 216 | #endif |
| 217 | |
| 218 | #ifdef CONFIG_USE_SPIFLASH |
| 219 | #undef CONFIG_CMD_IMLS |
| 220 | #undef CONFIG_CMD_FLASH |
| 221 | #define CONFIG_CMD_SPI |
| 222 | #define CONFIG_CMD_SAVEENV |
| 223 | #endif |
| 224 | |
| 225 | #if !defined(CONFIG_USE_NAND) && \ |
| 226 | !defined(CONFIG_USE_NOR) && \ |
| 227 | !defined(CONFIG_USE_SPIFLASH) |
| 228 | #define CONFIG_ENV_IS_NOWHERE |
| 229 | #define CONFIG_SYS_NO_FLASH |
| 230 | #define CONFIG_ENV_SIZE (16 << 10) |
| 231 | #undef CONFIG_CMD_IMLS |
| 232 | #undef CONFIG_CMD_FLASH |
| 233 | #undef CONFIG_CMD_ENV |
| 234 | #endif |
| 235 | |
| 236 | #ifdef CONFIG_USB_DA8XX |
| 237 | #define CONFIG_CMD_USB /* include support for usb */ |
| 238 | #define CONFIG_CMD_STORAGE /* include support for usb */ |
| 239 | #define CONFIG_CMD_FAT /* include support for FAT/storage*/ |
| 240 | #define CONFIG_DOS_PARTITION /* include support for FAT/storage*/ |
| 241 | #endif |
| 242 | |
| 243 | #endif /* __CONFIG_H */ |