blob: c54d6dc14539226182a41ab193fa80847841361d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2002
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7#include <fpga.h>
8
9#ifndef _XILINX_H_
10#define _XILINX_H_
11
wdenkc6097192002-11-03 00:24:07 +000012/* Xilinx types
13 *********************************************************************/
Michal Simekb4079cf2014-03-13 12:58:20 +010014typedef enum { /* typedef xilinx_iface */
Wolfgang Denka1be4762008-05-20 16:00:29 +020015 min_xilinx_iface_type, /* low range check value */
16 slave_serial, /* serial data and external clock */
17 master_serial, /* serial data w/ internal clock (not used) */
18 slave_parallel, /* parallel data w/ external latch */
19 jtag_mode, /* jtag/tap serial (not used ) */
20 master_selectmap, /* master SelectMap (virtex2) */
21 slave_selectmap, /* slave SelectMap (virtex2) */
Michal Simek15d654c2013-04-22 15:43:02 +020022 devcfg, /* devcfg interface (zynq) */
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053023 csu_dma, /* csu_dma interface (zynqmp) */
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053024 cfi, /* CFI interface(versal) */
Wolfgang Denka1be4762008-05-20 16:00:29 +020025 max_xilinx_iface_type /* insert all new types before this */
Michal Simekb4079cf2014-03-13 12:58:20 +010026} xilinx_iface; /* end, typedef xilinx_iface */
wdenkc6097192002-11-03 00:24:07 +000027
Michal Simekb4079cf2014-03-13 12:58:20 +010028typedef enum { /* typedef xilinx_family */
Wolfgang Denka1be4762008-05-20 16:00:29 +020029 min_xilinx_type, /* low range check value */
Michal Simek5206cca2014-03-13 11:23:43 +010030 xilinx_spartan2, /* Spartan-II Family */
Michal Simekb4079cf2014-03-13 12:58:20 +010031 xilinx_virtexE, /* Virtex-E Family */
Michal Simek90258882014-03-13 11:33:36 +010032 xilinx_virtex2, /* Virtex2 Family */
Michal Simek2091a0c2014-03-13 11:28:42 +010033 xilinx_spartan3, /* Spartan-III Family */
Michal Simek15d654c2013-04-22 15:43:02 +020034 xilinx_zynq, /* Zynq Family */
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053035 xilinx_zynqmp, /* ZynqMP Family */
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053036 xilinx_versal, /* Versal Family */
Prasad Kummari1a39a742025-03-27 16:21:58 +053037 xilinx_versal_net, /* Versal NET Family */
Prasad Kummari48630ae2025-03-27 16:21:59 +053038 xilinx_versal2, /* Versal Gen 2 Family */
Wolfgang Denka1be4762008-05-20 16:00:29 +020039 max_xilinx_type /* insert all new types before this */
Michal Simekb4079cf2014-03-13 12:58:20 +010040} xilinx_family; /* end, typedef xilinx_family */
wdenkc6097192002-11-03 00:24:07 +000041
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030042/* FPGA bitstream supported types */
43#define FPGA_LEGACY BIT(0)
Oleksandr Suvorov17773572022-07-22 17:16:13 +030044#define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
Adrian Fiergolski0d6bb432022-07-22 17:16:14 +030045#define FPGA_XILINX_ZYNQMP_ENC BIT(2)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030046
Michal Simek25e1e2e2014-03-13 12:49:21 +010047typedef struct { /* typedef xilinx_desc */
Michal Simekb4079cf2014-03-13 12:58:20 +010048 xilinx_family family; /* part type */
49 xilinx_iface iface; /* interface type */
Wolfgang Denka1be4762008-05-20 16:00:29 +020050 size_t size; /* bytes of data part can accept */
51 void *iface_fns; /* interface function table */
52 int cookie; /* implementation specific cookie */
Michal Simek75fafac2014-03-13 13:07:57 +010053 struct xilinx_fpga_op *operations; /* operations */
Michal Simek6ff890d2013-04-26 15:04:48 +020054 char *name; /* device name in bitstream */
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030055 int flags; /* compatible flags */
Michal Simek25e1e2e2014-03-13 12:49:21 +010056} xilinx_desc; /* end, typedef xilinx_desc */
wdenkc6097192002-11-03 00:24:07 +000057
Michal Simek75fafac2014-03-13 13:07:57 +010058struct xilinx_fpga_op {
Oleksandr Suvorovbb14d172022-07-22 17:16:03 +030059 int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
Oleksandr Suvorovc0806cc2022-07-22 17:16:10 +030060 bitstream_type bstype, int flags);
Oleksandr Suvorovbb14d172022-07-22 17:16:03 +030061 int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
62 fpga_fs_info *fpga_fsinfo);
Siva Durga Prasad Paladugu6809e812018-05-31 15:10:23 +053063 int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
64 struct fpga_secure_info *fpga_sec_info);
Oleksandr Suvorovbb14d172022-07-22 17:16:03 +030065 int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
66 int (*info)(xilinx_desc *desc);
Oleksandr Suvorov60ae6c12022-07-22 17:16:05 +030067#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
68 int (*str2flag)(xilinx_desc *desc, const char *string);
69#endif
Michal Simek75fafac2014-03-13 13:07:57 +010070};
71
wdenkc6097192002-11-03 00:24:07 +000072/* Generic Xilinx Functions
73 *********************************************************************/
Michal Simek14663652014-05-02 14:09:30 +020074int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
Oleksandr Suvorov5055cf22022-07-22 17:16:06 +030075 bitstream_type bstype, int flags);
Michal Simek25e1e2e2014-03-13 12:49:21 +010076int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
77int xilinx_info(xilinx_desc *desc);
Siva Durga Prasad Paladugu9112b4c2014-03-14 16:35:37 +053078int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
79 fpga_fs_info *fpga_fsinfo);
Siva Durga Prasad Paladugu6809e812018-05-31 15:10:23 +053080int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
81 struct fpga_secure_info *fpga_sec_info);
wdenkc6097192002-11-03 00:24:07 +000082
83/* Board specific implementation specific function types
84 *********************************************************************/
Michal Simekb4079cf2014-03-13 12:58:20 +010085typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);
86typedef int (*xilinx_init_fn)(int cookie);
87typedef int (*xilinx_err_fn)(int cookie);
88typedef int (*xilinx_done_fn)(int cookie);
89typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);
90typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);
91typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);
92typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);
93typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);
94typedef int (*xilinx_busy_fn)(int cookie);
95typedef int (*xilinx_abort_fn)(int cookie);
96typedef int (*xilinx_pre_fn)(int cookie);
97typedef int (*xilinx_post_fn)(int cookie);
98typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);
wdenkc6097192002-11-03 00:24:07 +000099
100#endif /* _XILINX_H_ */