Miquel Raynal | a633804 | 2025-04-03 09:39:09 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * i.MX8 MEDIAMIX control block driver |
| 4 | * Copyright (C) 2024 Miquel Raynal <miquel.raynal@bootlin.com> |
| 5 | * Inspired from Marek Vasut <marex@denx.de> work on the hsiomix driver. |
| 6 | */ |
| 7 | |
| 8 | #include <asm/io.h> |
| 9 | #include <clk.h> |
| 10 | #include <dm.h> |
| 11 | #include <power-domain-uclass.h> |
| 12 | #include <linux/delay.h> |
| 13 | |
| 14 | #include <dt-bindings/power/imx8mp-power.h> |
| 15 | |
| 16 | #define BLK_SFT_RSTN 0x0 |
| 17 | #define BLK_CLK_EN 0x4 |
| 18 | |
| 19 | struct imx8mp_mediamix_priv { |
| 20 | void __iomem *base; |
| 21 | struct clk clk_apb; |
| 22 | struct clk clk_axi; |
| 23 | struct clk clk_disp2; |
| 24 | struct power_domain pd_bus; |
| 25 | struct power_domain pd_lcdif2; |
| 26 | }; |
| 27 | |
| 28 | static int imx8mp_mediamix_on(struct power_domain *power_domain) |
| 29 | { |
| 30 | struct udevice *dev = power_domain->dev; |
| 31 | struct imx8mp_mediamix_priv *priv = dev_get_priv(dev); |
| 32 | struct power_domain *domain; |
| 33 | struct clk *clk; |
| 34 | u32 reset; |
| 35 | int ret; |
| 36 | |
| 37 | switch (power_domain->id) { |
| 38 | case IMX8MP_MEDIABLK_PD_LCDIF_2: |
| 39 | domain = &priv->pd_lcdif2; |
| 40 | clk = &priv->clk_disp2; |
| 41 | reset = BIT(11) | BIT(12) | BIT(24); |
| 42 | break; |
| 43 | default: |
| 44 | return -EINVAL; |
| 45 | } |
| 46 | |
| 47 | /* Make sure bus domain is awake */ |
| 48 | ret = power_domain_on(&priv->pd_bus); |
| 49 | if (ret) |
| 50 | return ret; |
| 51 | |
| 52 | /* Put devices into reset */ |
| 53 | clrbits_le32(priv->base + BLK_SFT_RSTN, reset); |
| 54 | |
| 55 | /* Enable upstream clocks */ |
| 56 | ret = clk_enable(&priv->clk_apb); |
| 57 | if (ret) |
| 58 | goto dis_bus_pd; |
| 59 | |
| 60 | ret = clk_enable(&priv->clk_axi); |
| 61 | if (ret) |
| 62 | goto dis_apb_clk; |
| 63 | |
| 64 | /* Enable blk-ctrl clock to allow reset to propagate */ |
| 65 | ret = clk_enable(clk); |
| 66 | if (ret) |
| 67 | goto dis_axi_clk; |
| 68 | setbits_le32(priv->base + BLK_CLK_EN, reset); |
| 69 | |
| 70 | /* Power up upstream GPC domain */ |
| 71 | ret = power_domain_on(domain); |
| 72 | if (ret) |
| 73 | goto dis_lcdif_clk; |
| 74 | |
| 75 | /* Wait for reset to propagate */ |
| 76 | udelay(5); |
| 77 | |
| 78 | /* Release reset */ |
| 79 | setbits_le32(priv->base + BLK_SFT_RSTN, reset); |
| 80 | |
| 81 | return 0; |
| 82 | |
| 83 | dis_lcdif_clk: |
| 84 | clk_disable(clk); |
| 85 | dis_axi_clk: |
| 86 | clk_disable(&priv->clk_axi); |
| 87 | dis_apb_clk: |
| 88 | clk_disable(&priv->clk_apb); |
| 89 | dis_bus_pd: |
| 90 | power_domain_off(&priv->pd_bus); |
| 91 | |
| 92 | return ret; |
| 93 | } |
| 94 | |
| 95 | static int imx8mp_mediamix_off(struct power_domain *power_domain) |
| 96 | { |
| 97 | struct udevice *dev = power_domain->dev; |
| 98 | struct imx8mp_mediamix_priv *priv = dev_get_priv(dev); |
| 99 | struct power_domain *domain; |
| 100 | struct clk *clk; |
| 101 | u32 reset; |
| 102 | |
| 103 | switch (power_domain->id) { |
| 104 | case IMX8MP_MEDIABLK_PD_LCDIF_2: |
| 105 | domain = &priv->pd_lcdif2; |
| 106 | clk = &priv->clk_disp2; |
| 107 | reset = BIT(11) | BIT(12) | BIT(24); |
| 108 | break; |
| 109 | default: |
| 110 | return -EINVAL; |
| 111 | } |
| 112 | |
| 113 | /* Put devices into reset and disable clocks */ |
| 114 | clrbits_le32(priv->base + BLK_SFT_RSTN, reset); |
| 115 | clrbits_le32(priv->base + BLK_CLK_EN, reset); |
| 116 | |
| 117 | /* Power down upstream GPC domain */ |
| 118 | power_domain_off(domain); |
| 119 | |
| 120 | clk_disable(clk); |
| 121 | clk_disable(&priv->clk_axi); |
| 122 | clk_disable(&priv->clk_apb); |
| 123 | |
| 124 | /* Allow bus domain to suspend */ |
| 125 | power_domain_off(&priv->pd_bus); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | static int imx8mp_mediamix_of_xlate(struct power_domain *power_domain, |
| 131 | struct ofnode_phandle_args *args) |
| 132 | { |
| 133 | power_domain->id = args->args[0]; |
| 134 | |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | static int imx8mp_mediamix_bind(struct udevice *dev) |
| 139 | { |
| 140 | /* Bind child lcdif */ |
| 141 | return dm_scan_fdt_dev(dev); |
| 142 | } |
| 143 | |
| 144 | static int imx8mp_mediamix_probe(struct udevice *dev) |
| 145 | { |
Miquel Raynal | 887da2b | 2025-04-25 08:49:33 +0200 | [diff] [blame] | 146 | struct power_domain_plat *plat = dev_get_uclass_plat(dev); |
Miquel Raynal | a633804 | 2025-04-03 09:39:09 +0200 | [diff] [blame] | 147 | struct imx8mp_mediamix_priv *priv = dev_get_priv(dev); |
| 148 | int ret; |
| 149 | |
Miquel Raynal | 887da2b | 2025-04-25 08:49:33 +0200 | [diff] [blame] | 150 | /* Definitions are in imx8mp-power.h */ |
| 151 | plat->subdomains = 9; |
| 152 | |
Miquel Raynal | a633804 | 2025-04-03 09:39:09 +0200 | [diff] [blame] | 153 | priv->base = dev_read_addr_ptr(dev); |
| 154 | |
| 155 | ret = clk_get_by_name(dev, "apb", &priv->clk_apb); |
| 156 | if (ret < 0) |
| 157 | return ret; |
| 158 | |
| 159 | ret = clk_get_by_name(dev, "axi", &priv->clk_axi); |
| 160 | if (ret < 0) |
| 161 | return ret; |
| 162 | |
| 163 | ret = clk_get_by_name(dev, "disp2", &priv->clk_disp2); |
| 164 | if (ret < 0) |
| 165 | return ret; |
| 166 | |
| 167 | ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus"); |
| 168 | if (ret < 0) |
| 169 | return ret; |
| 170 | |
| 171 | ret = power_domain_get_by_name(dev, &priv->pd_lcdif2, "lcdif2"); |
| 172 | if (ret < 0) |
| 173 | goto free_bus_pd; |
| 174 | |
| 175 | return 0; |
| 176 | |
| 177 | free_bus_pd: |
| 178 | power_domain_free(&priv->pd_bus); |
| 179 | return ret; |
| 180 | } |
| 181 | |
| 182 | static int imx8mp_mediamix_remove(struct udevice *dev) |
| 183 | { |
| 184 | struct imx8mp_mediamix_priv *priv = dev_get_priv(dev); |
| 185 | |
| 186 | power_domain_free(&priv->pd_lcdif2); |
| 187 | power_domain_free(&priv->pd_bus); |
| 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | static const struct udevice_id imx8mp_mediamix_ids[] = { |
| 193 | { .compatible = "fsl,imx8mp-media-blk-ctrl" }, |
| 194 | { } |
| 195 | }; |
| 196 | |
| 197 | struct power_domain_ops imx8mp_mediamix_ops = { |
| 198 | .on = imx8mp_mediamix_on, |
| 199 | .off = imx8mp_mediamix_off, |
| 200 | .of_xlate = imx8mp_mediamix_of_xlate, |
| 201 | }; |
| 202 | |
| 203 | U_BOOT_DRIVER(imx8mp_mediamix) = { |
| 204 | .name = "imx8mp_mediamix", |
| 205 | .id = UCLASS_POWER_DOMAIN, |
| 206 | .of_match = imx8mp_mediamix_ids, |
| 207 | .bind = imx8mp_mediamix_bind, |
| 208 | .probe = imx8mp_mediamix_probe, |
| 209 | .remove = imx8mp_mediamix_remove, |
| 210 | .priv_auto = sizeof(struct imx8mp_mediamix_priv), |
| 211 | .ops = &imx8mp_mediamix_ops, |
| 212 | }; |