blob: bc8b3f8cf77f9042e2bc4ce0df19674fd2579773 [file] [log] [blame]
Patrick Delaunay990e0572024-01-15 15:05:56 +01001if STM32MP13X
Patrick Delaunay123687c2022-05-20 18:24:46 +02002
3choice
4 prompt "STM32MP13x board select"
5 optional
6
Patrick Delaunay990e0572024-01-15 15:05:56 +01007config TARGET_ST_STM32MP13X
Patrick Delaunay123687c2022-05-20 18:24:46 +02008 bool "STMicroelectronics STM32MP13x boards"
9 imply BOOTSTAGE
10 imply CMD_BOOTSTAGE
11 imply CMD_CLS if CMD_BMP
12 imply DISABLE_CONSOLE
13 imply PRE_CONSOLE_BUFFER
14 imply SILENT_CONSOLE
15 help
16 target the STMicroelectronics board with SOC STM32MP13x
17 managed by board/st/stm32mp1.
18 The difference between board are managed with devicetree
19
20endchoice
21
Simon Glass72cc5382022-10-20 18:22:39 -060022config TEXT_BASE
Patrick Delaunay123687c2022-05-20 18:24:46 +020023 default 0xC0000000
24
25config PRE_CON_BUF_ADDR
26 default 0xC0800000
27
28config PRE_CON_BUF_SZ
29 default 4096
30
Patrick Delaunay123687c2022-05-20 18:24:46 +020031if BOOTCOUNT_GENERIC
32config SYS_BOOTCOUNT_SINGLEWORD
33 default y
34
35# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(31)
36config SYS_BOOTCOUNT_ADDR
37 default 0x5C00A17C
38endif
39
40if DEBUG_UART
41
42# debug on UART4 by default
43config DEBUG_UART_BASE
44 default 0x40010000
45
46# clock source is HSI on reset
47config DEBUG_UART_CLOCK
48 default 48000000 if STM32_FPGA
49 default 64000000
50endif
51
52source "board/st/stm32mp1/Kconfig"
53
54endif