| Joshua Riek | a3b328e | 2024-01-09 20:30:24 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Device tree definitions for the Turing RK1 SoM. |
| 4 | * |
| 5 | * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com> |
| 6 | * |
| 7 | * Based on RK3588-EVB1 devicetree |
| 8 | * Copyright (c) 2021 Rockchip Electronics Co., Ltd. |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/pinctrl/rockchip.h> |
| 14 | #include "rk3588.dtsi" |
| 15 | |
| 16 | / { |
| 17 | compatible = "turing,rk1", "rockchip,rk3588"; |
| 18 | |
| 19 | aliases { |
| 20 | ethernet0 = &gmac1; |
| 21 | mmc0 = &sdhci; |
| 22 | serial2 = &uart2; |
| 23 | serial9 = &uart9; |
| 24 | }; |
| 25 | |
| 26 | fan: pwm-fan { |
| 27 | compatible = "pwm-fan"; |
| 28 | cooling-levels = <0 25 95 145 195 255>; |
| 29 | fan-supply = <&vcc5v0_sys>; |
| 30 | pinctrl-names = "default"; |
| 31 | pinctrl-0 = <&pwm0m2_pins &fan_int>; |
| 32 | interrupt-parent = <&gpio0>; |
| 33 | interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>; |
| 34 | pwms = <&pwm0 0 50000 0>; |
| 35 | #cooling-cells = <2>; |
| 36 | }; |
| 37 | |
| 38 | vcc3v3_pcie30: vcc3v3-pcie30-regulator { |
| 39 | compatible = "regulator-fixed"; |
| 40 | regulator-name = "vcc3v3_pcie30"; |
| 41 | regulator-min-microvolt = <3300000>; |
| 42 | regulator-max-microvolt = <3300000>; |
| 43 | enable-active-high; |
| 44 | gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; |
| 45 | pinctrl-names = "default"; |
| 46 | pinctrl-0 = <&vcc3v3_pcie30_en>; |
| 47 | startup-delay-us = <5000>; |
| 48 | }; |
| 49 | |
| 50 | vcc5v0_sys: vcc5v0-sys-regulator { |
| 51 | compatible = "regulator-fixed"; |
| 52 | regulator-name = "vcc5v0_sys"; |
| 53 | regulator-always-on; |
| 54 | regulator-boot-on; |
| 55 | regulator-min-microvolt = <5000000>; |
| 56 | regulator-max-microvolt = <5000000>; |
| 57 | }; |
| 58 | |
| 59 | vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { |
| 60 | compatible = "regulator-fixed"; |
| 61 | regulator-name = "vcc_1v1_nldo_s3"; |
| 62 | regulator-always-on; |
| 63 | regulator-boot-on; |
| 64 | regulator-min-microvolt = <1100000>; |
| 65 | regulator-max-microvolt = <1100000>; |
| 66 | vin-supply = <&vcc5v0_sys>; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | &combphy2_psu { |
| 71 | status = "okay"; |
| 72 | }; |
| 73 | |
| 74 | &cpu_b0 { |
| 75 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 76 | }; |
| 77 | |
| 78 | &cpu_b1 { |
| 79 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 80 | }; |
| 81 | |
| 82 | &cpu_b2 { |
| 83 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 84 | }; |
| 85 | |
| 86 | &cpu_b3 { |
| 87 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 88 | }; |
| 89 | |
| 90 | &cpu_l0 { |
| 91 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 92 | }; |
| 93 | |
| 94 | &cpu_l1 { |
| 95 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 96 | }; |
| 97 | |
| 98 | &cpu_l2 { |
| 99 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 100 | }; |
| 101 | |
| 102 | &cpu_l3 { |
| 103 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 104 | }; |
| 105 | |
| 106 | &gmac1 { |
| 107 | clock_in_out = "output"; |
| 108 | phy-handle = <&rgmii_phy>; |
| 109 | phy-mode = "rgmii-rxid"; |
| 110 | pinctrl-0 = <&gmac1_miim |
| 111 | &gmac1_tx_bus2 |
| 112 | &gmac1_rx_bus2 |
| 113 | &gmac1_rgmii_clk |
| 114 | &gmac1_rgmii_bus>; |
| 115 | pinctrl-names = "default"; |
| 116 | rx_delay = <0x00>; |
| 117 | tx_delay = <0x43>; |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &i2c0 { |
| 122 | pinctrl-names = "default"; |
| 123 | pinctrl-0 = <&i2c0m2_xfer>; |
| 124 | status = "okay"; |
| 125 | |
| 126 | vdd_cpu_big0_s0: regulator@42 { |
| 127 | compatible = "rockchip,rk8602"; |
| 128 | reg = <0x42>; |
| 129 | fcs,suspend-voltage-selector = <1>; |
| 130 | regulator-name = "vdd_cpu_big0_s0"; |
| 131 | regulator-always-on; |
| 132 | regulator-boot-on; |
| 133 | regulator-min-microvolt = <550000>; |
| 134 | regulator-max-microvolt = <1050000>; |
| 135 | regulator-ramp-delay = <2300>; |
| 136 | vin-supply = <&vcc5v0_sys>; |
| 137 | |
| 138 | regulator-state-mem { |
| 139 | regulator-off-in-suspend; |
| 140 | }; |
| 141 | }; |
| 142 | |
| 143 | vdd_cpu_big1_s0: regulator@43 { |
| 144 | compatible = "rockchip,rk8603", "rockchip,rk8602"; |
| 145 | reg = <0x43>; |
| 146 | fcs,suspend-voltage-selector = <1>; |
| 147 | regulator-name = "vdd_cpu_big1_s0"; |
| 148 | regulator-always-on; |
| 149 | regulator-boot-on; |
| 150 | regulator-min-microvolt = <550000>; |
| 151 | regulator-max-microvolt = <1050000>; |
| 152 | regulator-ramp-delay = <2300>; |
| 153 | vin-supply = <&vcc5v0_sys>; |
| 154 | |
| 155 | regulator-state-mem { |
| 156 | regulator-off-in-suspend; |
| 157 | }; |
| 158 | }; |
| 159 | }; |
| 160 | |
| 161 | &i2c1 { |
| 162 | pinctrl-names = "default"; |
| 163 | pinctrl-0 = <&i2c1m2_xfer>; |
| 164 | status = "okay"; |
| 165 | |
| 166 | vdd_npu_s0: regulator@42 { |
| 167 | compatible = "rockchip,rk8602"; |
| 168 | reg = <0x42>; |
| 169 | fcs,suspend-voltage-selector = <1>; |
| 170 | regulator-name = "vdd_npu_s0"; |
| 171 | regulator-always-on; |
| 172 | regulator-boot-on; |
| 173 | regulator-min-microvolt = <550000>; |
| 174 | regulator-max-microvolt = <950000>; |
| 175 | regulator-ramp-delay = <2300>; |
| 176 | vin-supply = <&vcc5v0_sys>; |
| 177 | |
| 178 | regulator-state-mem { |
| 179 | regulator-off-in-suspend; |
| 180 | }; |
| 181 | }; |
| 182 | }; |
| 183 | |
| 184 | &i2c6 { |
| 185 | status = "okay"; |
| 186 | |
| 187 | hym8563: rtc@51 { |
| 188 | compatible = "haoyu,hym8563"; |
| 189 | reg = <0x51>; |
| 190 | #clock-cells = <0>; |
| 191 | clock-output-names = "hym8563"; |
| 192 | pinctrl-names = "default"; |
| 193 | pinctrl-0 = <&hym8563_int>; |
| 194 | interrupt-parent = <&gpio0>; |
| 195 | interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; |
| 196 | wakeup-source; |
| 197 | }; |
| 198 | }; |
| 199 | |
| 200 | &mdio1 { |
| 201 | rgmii_phy: ethernet-phy@1 { |
| 202 | /* RTL8211F */ |
| 203 | compatible = "ethernet-phy-id001c.c916", |
| 204 | "ethernet-phy-ieee802.3-c22"; |
| 205 | reg = <0x1>; |
| 206 | pinctrl-names = "default"; |
| 207 | pinctrl-0 = <&rtl8211f_rst>; |
| 208 | reset-assert-us = <15000>; |
| 209 | reset-deassert-us = <50000>; |
| 210 | reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; |
| 211 | }; |
| 212 | }; |
| 213 | |
| 214 | &pcie2x1l1 { |
| 215 | linux,pci-domain = <1>; |
| 216 | pinctrl-names = "default"; |
| 217 | pinctrl-0 = <&pcie2_reset>; |
| 218 | reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; |
| 219 | status = "okay"; |
| 220 | }; |
| 221 | |
| 222 | &pcie30phy { |
| 223 | status = "okay"; |
| 224 | }; |
| 225 | |
| 226 | &pcie3x4 { |
| 227 | linux,pci-domain = <0>; |
| 228 | pinctrl-names = "default"; |
| 229 | pinctrl-0 = <&pcie3_reset>; |
| 230 | reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; |
| 231 | vpcie3v3-supply = <&vcc3v3_pcie30>; |
| 232 | status = "okay"; |
| 233 | }; |
| 234 | |
| 235 | &pinctrl { |
| 236 | fan { |
| 237 | fan_int: fan-int { |
| 238 | rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; |
| 239 | }; |
| 240 | }; |
| 241 | |
| 242 | hym8563 { |
| 243 | hym8563_int: hym8563-int { |
| 244 | rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |
| 245 | }; |
| 246 | }; |
| 247 | |
| 248 | pcie2 { |
| 249 | pcie2_reset: pcie2-reset { |
| 250 | rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 251 | }; |
| 252 | }; |
| 253 | |
| 254 | pcie3 { |
| 255 | pcie3_reset: pcie3-reset { |
| 256 | rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; |
| 257 | }; |
| 258 | |
| 259 | vcc3v3_pcie30_en: pcie3-reg { |
| 260 | rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; |
| 261 | }; |
| 262 | }; |
| 263 | |
| 264 | rtl8211f { |
| 265 | rtl8211f_rst: rtl8211f-rst { |
| 266 | rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; |
| 267 | }; |
| 268 | }; |
| 269 | }; |
| 270 | |
| 271 | &pwm0 { |
| 272 | status = "okay"; |
| 273 | }; |
| 274 | |
| 275 | &sdhci { |
| 276 | bus-width = <8>; |
| 277 | no-sdio; |
| 278 | no-sd; |
| 279 | non-removable; |
| 280 | mmc-hs400-1_8v; |
| 281 | mmc-hs400-enhanced-strobe; |
| 282 | status = "okay"; |
| 283 | }; |
| 284 | |
| 285 | &spi2 { |
| 286 | status = "okay"; |
| 287 | pinctrl-names = "default"; |
| 288 | pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; |
| 289 | num-cs = <1>; |
| 290 | |
| 291 | pmic@0 { |
| 292 | compatible = "rockchip,rk806"; |
| 293 | spi-max-frequency = <1000000>; |
| 294 | reg = <0x0>; |
| 295 | |
| 296 | interrupt-parent = <&gpio0>; |
| 297 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| 298 | |
| 299 | pinctrl-names = "default"; |
| 300 | pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, |
| 301 | <&rk806_dvs2_null>, <&rk806_dvs3_null>; |
| 302 | |
| 303 | vcc1-supply = <&vcc5v0_sys>; |
| 304 | vcc2-supply = <&vcc5v0_sys>; |
| 305 | vcc3-supply = <&vcc5v0_sys>; |
| 306 | vcc4-supply = <&vcc5v0_sys>; |
| 307 | vcc5-supply = <&vcc5v0_sys>; |
| 308 | vcc6-supply = <&vcc5v0_sys>; |
| 309 | vcc7-supply = <&vcc5v0_sys>; |
| 310 | vcc8-supply = <&vcc5v0_sys>; |
| 311 | vcc9-supply = <&vcc5v0_sys>; |
| 312 | vcc10-supply = <&vcc5v0_sys>; |
| 313 | vcc11-supply = <&vcc_2v0_pldo_s3>; |
| 314 | vcc12-supply = <&vcc5v0_sys>; |
| 315 | vcc13-supply = <&vcc_1v1_nldo_s3>; |
| 316 | vcc14-supply = <&vcc_1v1_nldo_s3>; |
| 317 | vcca-supply = <&vcc5v0_sys>; |
| 318 | |
| 319 | gpio-controller; |
| 320 | #gpio-cells = <2>; |
| 321 | |
| 322 | rk806_dvs1_null: dvs1-null-pins { |
| 323 | pins = "gpio_pwrctrl2"; |
| 324 | function = "pin_fun0"; |
| 325 | }; |
| 326 | |
| 327 | rk806_dvs2_null: dvs2-null-pins { |
| 328 | pins = "gpio_pwrctrl2"; |
| 329 | function = "pin_fun0"; |
| 330 | }; |
| 331 | |
| 332 | rk806_dvs3_null: dvs3-null-pins { |
| 333 | pins = "gpio_pwrctrl3"; |
| 334 | function = "pin_fun0"; |
| 335 | }; |
| 336 | |
| 337 | regulators { |
| 338 | vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { |
| 339 | regulator-boot-on; |
| 340 | regulator-min-microvolt = <550000>; |
| 341 | regulator-max-microvolt = <950000>; |
| 342 | regulator-ramp-delay = <12500>; |
| 343 | regulator-name = "vdd_gpu_s0"; |
| 344 | regulator-enable-ramp-delay = <400>; |
| 345 | |
| 346 | regulator-state-mem { |
| 347 | regulator-off-in-suspend; |
| 348 | }; |
| 349 | }; |
| 350 | |
| 351 | vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { |
| 352 | regulator-always-on; |
| 353 | regulator-boot-on; |
| 354 | regulator-min-microvolt = <550000>; |
| 355 | regulator-max-microvolt = <950000>; |
| 356 | regulator-ramp-delay = <12500>; |
| 357 | regulator-name = "vdd_cpu_lit_s0"; |
| 358 | |
| 359 | regulator-state-mem { |
| 360 | regulator-off-in-suspend; |
| 361 | }; |
| 362 | }; |
| 363 | |
| 364 | vdd_log_s0: dcdc-reg3 { |
| 365 | regulator-always-on; |
| 366 | regulator-boot-on; |
| 367 | regulator-min-microvolt = <675000>; |
| 368 | regulator-max-microvolt = <750000>; |
| 369 | regulator-ramp-delay = <12500>; |
| 370 | regulator-name = "vdd_log_s0"; |
| 371 | |
| 372 | regulator-state-mem { |
| 373 | regulator-off-in-suspend; |
| 374 | regulator-suspend-microvolt = <750000>; |
| 375 | }; |
| 376 | }; |
| 377 | |
| 378 | vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { |
| 379 | regulator-always-on; |
| 380 | regulator-boot-on; |
| 381 | regulator-min-microvolt = <550000>; |
| 382 | regulator-max-microvolt = <950000>; |
| 383 | regulator-ramp-delay = <12500>; |
| 384 | regulator-name = "vdd_vdenc_s0"; |
| 385 | |
| 386 | regulator-state-mem { |
| 387 | regulator-off-in-suspend; |
| 388 | }; |
| 389 | }; |
| 390 | |
| 391 | vdd_ddr_s0: dcdc-reg5 { |
| 392 | regulator-always-on; |
| 393 | regulator-boot-on; |
| 394 | regulator-min-microvolt = <675000>; |
| 395 | regulator-max-microvolt = <900000>; |
| 396 | regulator-ramp-delay = <12500>; |
| 397 | regulator-name = "vdd_ddr_s0"; |
| 398 | |
| 399 | regulator-state-mem { |
| 400 | regulator-off-in-suspend; |
| 401 | regulator-suspend-microvolt = <850000>; |
| 402 | }; |
| 403 | }; |
| 404 | |
| 405 | vdd2_ddr_s3: dcdc-reg6 { |
| 406 | regulator-always-on; |
| 407 | regulator-boot-on; |
| 408 | regulator-name = "vdd2_ddr_s3"; |
| 409 | |
| 410 | regulator-state-mem { |
| 411 | regulator-on-in-suspend; |
| 412 | }; |
| 413 | }; |
| 414 | |
| 415 | vcc_2v0_pldo_s3: dcdc-reg7 { |
| 416 | regulator-always-on; |
| 417 | regulator-boot-on; |
| 418 | regulator-min-microvolt = <2000000>; |
| 419 | regulator-max-microvolt = <2000000>; |
| 420 | regulator-ramp-delay = <12500>; |
| 421 | regulator-name = "vdd_2v0_pldo_s3"; |
| 422 | |
| 423 | regulator-state-mem { |
| 424 | regulator-on-in-suspend; |
| 425 | regulator-suspend-microvolt = <2000000>; |
| 426 | }; |
| 427 | }; |
| 428 | |
| 429 | vcc_3v3_s3: dcdc-reg8 { |
| 430 | regulator-always-on; |
| 431 | regulator-boot-on; |
| 432 | regulator-min-microvolt = <3300000>; |
| 433 | regulator-max-microvolt = <3300000>; |
| 434 | regulator-name = "vcc_3v3_s3"; |
| 435 | |
| 436 | regulator-state-mem { |
| 437 | regulator-on-in-suspend; |
| 438 | regulator-suspend-microvolt = <3300000>; |
| 439 | }; |
| 440 | }; |
| 441 | |
| 442 | vddq_ddr_s0: dcdc-reg9 { |
| 443 | regulator-always-on; |
| 444 | regulator-boot-on; |
| 445 | regulator-name = "vddq_ddr_s0"; |
| 446 | |
| 447 | regulator-state-mem { |
| 448 | regulator-off-in-suspend; |
| 449 | }; |
| 450 | }; |
| 451 | |
| 452 | vcc_1v8_s3: dcdc-reg10 { |
| 453 | regulator-always-on; |
| 454 | regulator-boot-on; |
| 455 | regulator-min-microvolt = <1800000>; |
| 456 | regulator-max-microvolt = <1800000>; |
| 457 | regulator-name = "vcc_1v8_s3"; |
| 458 | |
| 459 | regulator-state-mem { |
| 460 | regulator-on-in-suspend; |
| 461 | regulator-suspend-microvolt = <1800000>; |
| 462 | }; |
| 463 | }; |
| 464 | |
| 465 | avcc_1v8_s0: pldo-reg1 { |
| 466 | regulator-always-on; |
| 467 | regulator-boot-on; |
| 468 | regulator-min-microvolt = <1800000>; |
| 469 | regulator-max-microvolt = <1800000>; |
| 470 | regulator-name = "avcc_1v8_s0"; |
| 471 | |
| 472 | regulator-state-mem { |
| 473 | regulator-off-in-suspend; |
| 474 | }; |
| 475 | }; |
| 476 | |
| 477 | vcc_1v8_s0: pldo-reg2 { |
| 478 | regulator-always-on; |
| 479 | regulator-boot-on; |
| 480 | regulator-min-microvolt = <1800000>; |
| 481 | regulator-max-microvolt = <1800000>; |
| 482 | regulator-name = "vcc_1v8_s0"; |
| 483 | |
| 484 | regulator-state-mem { |
| 485 | regulator-off-in-suspend; |
| 486 | regulator-suspend-microvolt = <1800000>; |
| 487 | }; |
| 488 | }; |
| 489 | |
| 490 | avdd_1v2_s0: pldo-reg3 { |
| 491 | regulator-always-on; |
| 492 | regulator-boot-on; |
| 493 | regulator-min-microvolt = <1200000>; |
| 494 | regulator-max-microvolt = <1200000>; |
| 495 | regulator-name = "avdd_1v2_s0"; |
| 496 | |
| 497 | regulator-state-mem { |
| 498 | regulator-off-in-suspend; |
| 499 | }; |
| 500 | }; |
| 501 | |
| 502 | vcc_3v3_s0: pldo-reg4 { |
| 503 | regulator-always-on; |
| 504 | regulator-boot-on; |
| 505 | regulator-min-microvolt = <3300000>; |
| 506 | regulator-max-microvolt = <3300000>; |
| 507 | regulator-ramp-delay = <12500>; |
| 508 | regulator-name = "vcc_3v3_s0"; |
| 509 | |
| 510 | regulator-state-mem { |
| 511 | regulator-off-in-suspend; |
| 512 | }; |
| 513 | }; |
| 514 | |
| 515 | vccio_sd_s0: pldo-reg5 { |
| 516 | regulator-always-on; |
| 517 | regulator-boot-on; |
| 518 | regulator-min-microvolt = <1800000>; |
| 519 | regulator-max-microvolt = <3300000>; |
| 520 | regulator-ramp-delay = <12500>; |
| 521 | regulator-name = "vccio_sd_s0"; |
| 522 | |
| 523 | regulator-state-mem { |
| 524 | regulator-off-in-suspend; |
| 525 | }; |
| 526 | }; |
| 527 | |
| 528 | pldo6_s3: pldo-reg6 { |
| 529 | regulator-always-on; |
| 530 | regulator-boot-on; |
| 531 | regulator-min-microvolt = <1800000>; |
| 532 | regulator-max-microvolt = <1800000>; |
| 533 | regulator-name = "pldo6_s3"; |
| 534 | |
| 535 | regulator-state-mem { |
| 536 | regulator-on-in-suspend; |
| 537 | regulator-suspend-microvolt = <1800000>; |
| 538 | }; |
| 539 | }; |
| 540 | |
| 541 | vdd_0v75_s3: nldo-reg1 { |
| 542 | regulator-always-on; |
| 543 | regulator-boot-on; |
| 544 | regulator-min-microvolt = <750000>; |
| 545 | regulator-max-microvolt = <750000>; |
| 546 | regulator-name = "vdd_0v75_s3"; |
| 547 | |
| 548 | regulator-state-mem { |
| 549 | regulator-on-in-suspend; |
| 550 | regulator-suspend-microvolt = <750000>; |
| 551 | }; |
| 552 | }; |
| 553 | |
| 554 | vdd_ddr_pll_s0: nldo-reg2 { |
| 555 | regulator-always-on; |
| 556 | regulator-boot-on; |
| 557 | regulator-min-microvolt = <850000>; |
| 558 | regulator-max-microvolt = <850000>; |
| 559 | regulator-name = "vdd_ddr_pll_s0"; |
| 560 | |
| 561 | regulator-state-mem { |
| 562 | regulator-off-in-suspend; |
| 563 | regulator-suspend-microvolt = <850000>; |
| 564 | }; |
| 565 | }; |
| 566 | |
| 567 | avdd_0v75_s0: nldo-reg3 { |
| 568 | regulator-always-on; |
| 569 | regulator-boot-on; |
| 570 | regulator-min-microvolt = <750000>; |
| 571 | regulator-max-microvolt = <750000>; |
| 572 | regulator-name = "avdd_0v75_s0"; |
| 573 | |
| 574 | regulator-state-mem { |
| 575 | regulator-off-in-suspend; |
| 576 | }; |
| 577 | }; |
| 578 | |
| 579 | vdd_0v85_s0: nldo-reg4 { |
| 580 | regulator-always-on; |
| 581 | regulator-boot-on; |
| 582 | regulator-min-microvolt = <850000>; |
| 583 | regulator-max-microvolt = <850000>; |
| 584 | regulator-name = "vdd_0v85_s0"; |
| 585 | |
| 586 | regulator-state-mem { |
| 587 | regulator-off-in-suspend; |
| 588 | }; |
| 589 | }; |
| 590 | |
| 591 | vdd_0v75_s0: nldo-reg5 { |
| 592 | regulator-always-on; |
| 593 | regulator-boot-on; |
| 594 | regulator-min-microvolt = <750000>; |
| 595 | regulator-max-microvolt = <750000>; |
| 596 | regulator-name = "vdd_0v75_s0"; |
| 597 | |
| 598 | regulator-state-mem { |
| 599 | regulator-off-in-suspend; |
| 600 | }; |
| 601 | }; |
| 602 | }; |
| 603 | }; |
| 604 | }; |
| 605 | |
| 606 | &uart2 { |
| 607 | pinctrl-0 = <&uart2m0_xfer>; |
| 608 | status = "okay"; |
| 609 | }; |
| 610 | |
| 611 | &uart9 { |
| 612 | pinctrl-0 = <&uart9m0_xfer>; |
| 613 | status = "okay"; |
| 614 | }; |