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git01.mediatek.com / filogic / uboot / 5bfd41d15c34a2c2139a036729cc0c574feaa8de / . / arch / arm / dts / am437x-idk-evm.dts
blob: e454647165498a4c23f933e2e2c45d089a04c117 [file] [log] [blame]
Lokesh Vutlab64e0562016-05-16 11:11:18 +0530[diff] [blame]1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include "am4372.dtsi"
12#include <dt-bindings/pinctrl/am43xx.h>
13#include <dt-bindings/pwm/pwm.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16
17/ {
18 model = "TI AM437x Industrial Development Kit";
19 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
20
21 chosen {
22 stdout-path = &uart0;
23 tick-timer = &timer2;
24 };
25
26 v24_0d: fixed-regulator-v24_0d {
27 compatible = "regulator-fixed";
28 regulator-name = "V24_0D";
29 regulator-min-microvolt = <24000000>;
30 regulator-max-microvolt = <24000000>;
31 regulator-always-on;
32 regulator-boot-on;
33 };
34
35 v3_3d: fixed-regulator-v3_3d {
36 compatible = "regulator-fixed";
37 regulator-name = "V3_3D";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-always-on;
41 regulator-boot-on;
42 vin-supply = <&v24_0d>;
43 };
44
45 vdd_corereg: fixed-regulator-vdd_corereg {
46 compatible = "regulator-fixed";
47 regulator-name = "VDD_COREREG";
48 regulator-min-microvolt = <1100000>;
49 regulator-max-microvolt = <1100000>;
50 regulator-always-on;
51 regulator-boot-on;
52 vin-supply = <&v24_0d>;
53 };
54
55 vdd_core: fixed-regulator-vdd_core {
56 compatible = "regulator-fixed";
57 regulator-name = "VDD_CORE";
58 regulator-min-microvolt = <1100000>;
59 regulator-max-microvolt = <1100000>;
60 regulator-always-on;
61 regulator-boot-on;
62 vin-supply = <&vdd_corereg>;
63 };
64
65 v1_8dreg: fixed-regulator-v1_8dreg{
66 compatible = "regulator-fixed";
67 regulator-name = "V1_8DREG";
68 regulator-min-microvolt = <1800000>;
69 regulator-max-microvolt = <1800000>;
70 regulator-always-on;
71 regulator-boot-on;
72 vin-supply = <&v24_0d>;
73 };
74
75 v1_8d: fixed-regulator-v1_8d{
76 compatible = "regulator-fixed";
77 regulator-name = "V1_8D";
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <1800000>;
80 regulator-always-on;
81 regulator-boot-on;
82 vin-supply = <&v1_8dreg>;
83 };
84
85 v1_5dreg: fixed-regulator-v1_5dreg{
86 compatible = "regulator-fixed";
87 regulator-name = "V1_5DREG";
88 regulator-min-microvolt = <1500000>;
89 regulator-max-microvolt = <1500000>;
90 regulator-always-on;
91 regulator-boot-on;
92 vin-supply = <&v24_0d>;
93 };
94
95 v1_5d: fixed-regulator-v1_5d{
96 compatible = "regulator-fixed";
97 regulator-name = "V1_5D";
98 regulator-min-microvolt = <1500000>;
99 regulator-max-microvolt = <1500000>;
100 regulator-always-on;
101 regulator-boot-on;
102 vin-supply = <&v1_5dreg>;
103 };
104
105 gpio_keys: gpio_keys {
106 compatible = "gpio-keys";
107 pinctrl-names = "default";
108 pinctrl-0 = <&gpio_keys_pins_default>;
109 #address-cells = <1>;
110 #size-cells = <0>;
111
112 switch@0 {
113 label = "power-button";
114 linux,code = <KEY_POWER>;
115 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
116 };
117 };
118
119 /* fixed 32k external oscillator clock */
120 clk_32k_rtc: clk_32k_rtc {
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
123 clock-frequency = <32768>;
124 };
125};
126
127&am43xx_pinmux {
128 gpio_keys_pins_default: gpio_keys_pins_default {
129 pinctrl-single,pins = <
130 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
131 >;
132 };
133
134 i2c0_pins_default: i2c0_pins_default {
135 pinctrl-single,pins = <
136 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
137 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
138 >;
139 };
140
141 i2c0_pins_sleep: i2c0_pins_sleep {
142 pinctrl-single,pins = <
143 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
144 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
145 >;
146 };
147
148 i2c2_pins_default: i2c2_pins_default {
149 pinctrl-single,pins = <
150 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
151 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
152 >;
153 };
154
155 i2c2_pins_sleep: i2c2_pins_sleep {
156 pinctrl-single,pins = <
157 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
158 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
159 >;
160 };
161
162 mmc1_pins_default: pinmux_mmc1_pins_default {
163 pinctrl-single,pins = <
164 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
165 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
166 AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
167 AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
168 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
169 AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
170 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
171 >;
172 };
173
174 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
175 pinctrl-single,pins = <
176 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
177 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
178 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
179 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
180 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
181 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
182 AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
183 >;
184 };
185
186 ecap0_pins_default: backlight_pins_default {
187 pinctrl-single,pins = <
188 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
189 >;
190 };
191
192 cpsw_default: cpsw_default {
193 pinctrl-single,pins = <
194 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
195 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
196 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
197 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
198 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
199 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
200 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
201 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
202 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
203 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
204 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
205 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
206 >;
207 };
208
209 cpsw_sleep: cpsw_sleep {
210 pinctrl-single,pins = <
211 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
215 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
217 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
218 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
219 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
220 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
221 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
222 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
223 >;
224 };
225
226 davinci_mdio_default: davinci_mdio_default {
227 pinctrl-single,pins = <
228 /* MDIO */
229 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
230 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
231 >;
232 };
233
234 davinci_mdio_sleep: davinci_mdio_sleep {
235 pinctrl-single,pins = <
236 /* MDIO reset value */
237 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
238 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
239 >;
240 };
241
242 qspi_pins_default: qspi_pins_default {
243 pinctrl-single,pins = <
244 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
245 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
246 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
247 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
248 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
249 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
250 >;
251 };
252
253 qspi_pins_sleep: qspi_pins_sleep{
254 pinctrl-single,pins = <
255 AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
256 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
257 AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
258 AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
259 AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
260 AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
261 >;
262 };
263};
264
265&i2c0 {
266 status = "okay";
267 pinctrl-names = "default", "sleep";
268 pinctrl-0 = <&i2c0_pins_default>;
269 pinctrl-1 = <&i2c0_pins_sleep>;
270 clock-frequency = <400000>;
271
272 at24@50 {
273 compatible = "at24,24c256";
274 pagesize = <64>;
275 reg = <0x50>;
276 };
277
278 tps: tps62362@60 {
279 compatible = "ti,tps62362";
280 reg = <0x60>;
281 regulator-name = "VDD_MPU";
282 regulator-min-microvolt = <950000>;
283 regulator-max-microvolt = <1330000>;
284 regulator-boot-on;
285 regulator-always-on;
286 ti,vsel0-state-high;
287 ti,vsel1-state-high;
288 vin-supply = <&v3_3d>;
289 };
290};
291
292&i2c2 {
293 status = "okay";
294 pinctrl-names = "default", "sleep";
295 pinctrl-0 = <&i2c2_pins_default>;
296 pinctrl-1 = <&i2c2_pins_sleep>;
297 clock-frequency = <100000>;
298};
299
300&epwmss0 {
301 status = "okay";
302};
303
304&ecap0 {
305 status = "okay";
306 pinctrl-names = "default";
307 pinctrl-0 = <&ecap0_pins_default>;
308};
309
310&gpio0 {
311 status = "okay";
312};
313
314&gpio1 {
315 status = "okay";
316};
317
318&gpio4 {
319 status = "okay";
320};
321
322&gpio5 {
323 status = "okay";
324};
325
326&mmc1 {
327 status = "okay";
328 pinctrl-names = "default", "sleep";
329 pinctrl-0 = <&mmc1_pins_default>;
330 pinctrl-1 = <&mmc1_pins_sleep>;
331 vmmc-supply = <&v3_3d>;
332 bus-width = <4>;
333 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
334};
335
336&qspi {
337 status = "okay";
338 pinctrl-names = "default", "sleep";
339 pinctrl-0 = <&qspi_pins_default>;
340 pinctrl-1 = <&qspi_pins_sleep>;
341
342 spi-max-frequency = <48000000>;
343 m25p80@0 {
Vignesh Re2f917b2016-10-13 15:53:17 +0530[diff] [blame]344 compatible = "mx66l51235l", "spi-flash";
Lokesh Vutlab64e0562016-05-16 11:11:18 +0530[diff] [blame]345 spi-max-frequency = <48000000>;
346 reg = <0>;
347 spi-cpol;
348 spi-cpha;
349 spi-tx-bus-width = <1>;
350 spi-rx-bus-width = <4>;
351 #address-cells = <1>;
352 #size-cells = <1>;
353
354 /*
355 * MTD partition table. The ROM checks the first 512KiB for a
356 * valid file to boot(XIP).
357 */
358 partition@0 {
359 label = "QSPI.U_BOOT";
360 reg = <0x00000000 0x000080000>;
361 };
362 partition@1 {
363 label = "QSPI.U_BOOT.backup";
364 reg = <0x00080000 0x00080000>;
365 };
366 partition@2 {
367 label = "QSPI.U-BOOT-SPL_OS";
368 reg = <0x00100000 0x00010000>;
369 };
370 partition@3 {
371 label = "QSPI.U_BOOT_ENV";
372 reg = <0x00110000 0x00010000>;
373 };
374 partition@4 {
375 label = "QSPI.U-BOOT-ENV.backup";
376 reg = <0x00120000 0x00010000>;
377 };
378 partition@5 {
379 label = "QSPI.KERNEL";
380 reg = <0x00130000 0x0800000>;
381 };
382 partition@6 {
383 label = "QSPI.FILESYSTEM";
384 reg = <0x00930000 0x36D0000>;
385 };
386 };
387};
388
389&mac {
390 pinctrl-names = "default", "sleep";
391 pinctrl-0 = <&cpsw_default>;
392 pinctrl-1 = <&cpsw_sleep>;
393 status = "okay";
394};
395
396&davinci_mdio {
397 pinctrl-names = "default", "sleep";
398 pinctrl-0 = <&davinci_mdio_default>;
399 pinctrl-1 = <&davinci_mdio_sleep>;
400 status = "okay";
401};
402
403&cpsw_emac0 {
404 phy_id = <&davinci_mdio>, <0>;
405 phy-mode = "rgmii";
406};
407
408&rtc {
409 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
410 clock-names = "ext-clk", "int-clk";
411 status = "okay";
412};
413
414&wdt {
415 status = "okay";
416};
417
418&cpu {
419 cpu0-supply = <&tps>;
420};